using smbus ioctl()
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337
Host/i2c-dev.h
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337
Host/i2c-dev.h
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/*
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i2c-dev.h - i2c-bus driver, char device interface
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Copyright (C) 1995-97 Simon G. Vogl
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Copyright (C) 1998-99 Frodo Looijaard <frodol@dds.nl>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/* $Id: i2c-dev.h 4948 2007-10-14 11:21:00Z khali $ */
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#ifndef LIB_I2CDEV_H
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#define LIB_I2CDEV_H
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#include <linux/types.h>
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#include <sys/ioctl.h>
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/* -- i2c.h -- */
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/*
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* I2C Message - used for pure i2c transaction, also from /dev interface
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*/
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struct i2c_msg {
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__u16 addr; /* slave address */
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unsigned short flags;
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#define I2C_M_TEN 0x10 /* we have a ten bit chip address */
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#define I2C_M_RD 0x01
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#define I2C_M_NOSTART 0x4000
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#define I2C_M_REV_DIR_ADDR 0x2000
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#define I2C_M_IGNORE_NAK 0x1000
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#define I2C_M_NO_RD_ACK 0x0800
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short len; /* msg length */
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char *buf; /* pointer to msg data */
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};
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/* To determine what functionality is present */
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#define I2C_FUNC_I2C 0x00000001
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#define I2C_FUNC_10BIT_ADDR 0x00000002
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#define I2C_FUNC_PROTOCOL_MANGLING 0x00000004 /* I2C_M_{REV_DIR_ADDR,NOSTART,..} */
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#define I2C_FUNC_SMBUS_PEC 0x00000008
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#define I2C_FUNC_SMBUS_BLOCK_PROC_CALL 0x00008000 /* SMBus 2.0 */
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#define I2C_FUNC_SMBUS_QUICK 0x00010000
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#define I2C_FUNC_SMBUS_READ_BYTE 0x00020000
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#define I2C_FUNC_SMBUS_WRITE_BYTE 0x00040000
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#define I2C_FUNC_SMBUS_READ_BYTE_DATA 0x00080000
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#define I2C_FUNC_SMBUS_WRITE_BYTE_DATA 0x00100000
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#define I2C_FUNC_SMBUS_READ_WORD_DATA 0x00200000
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#define I2C_FUNC_SMBUS_WRITE_WORD_DATA 0x00400000
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#define I2C_FUNC_SMBUS_PROC_CALL 0x00800000
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#define I2C_FUNC_SMBUS_READ_BLOCK_DATA 0x01000000
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#define I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 0x02000000
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#define I2C_FUNC_SMBUS_READ_I2C_BLOCK 0x04000000 /* I2C-like block xfer */
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#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 0x08000000 /* w/ 1-byte reg. addr. */
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#define I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 0x10000000 /* I2C-like block xfer */
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#define I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2 0x20000000 /* w/ 2-byte reg. addr. */
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#define I2C_FUNC_SMBUS_BYTE (I2C_FUNC_SMBUS_READ_BYTE | \
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I2C_FUNC_SMBUS_WRITE_BYTE)
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#define I2C_FUNC_SMBUS_BYTE_DATA (I2C_FUNC_SMBUS_READ_BYTE_DATA | \
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I2C_FUNC_SMBUS_WRITE_BYTE_DATA)
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#define I2C_FUNC_SMBUS_WORD_DATA (I2C_FUNC_SMBUS_READ_WORD_DATA | \
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I2C_FUNC_SMBUS_WRITE_WORD_DATA)
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#define I2C_FUNC_SMBUS_BLOCK_DATA (I2C_FUNC_SMBUS_READ_BLOCK_DATA | \
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I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)
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#define I2C_FUNC_SMBUS_I2C_BLOCK (I2C_FUNC_SMBUS_READ_I2C_BLOCK | \
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I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)
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#define I2C_FUNC_SMBUS_I2C_BLOCK_2 (I2C_FUNC_SMBUS_READ_I2C_BLOCK_2 | \
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I2C_FUNC_SMBUS_WRITE_I2C_BLOCK_2)
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/* Old name, for compatibility */
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#define I2C_FUNC_SMBUS_HWPEC_CALC I2C_FUNC_SMBUS_PEC
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/*
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* Data for SMBus Messages
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*/
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#define I2C_SMBUS_BLOCK_MAX 32 /* As specified in SMBus standard */
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#define I2C_SMBUS_I2C_BLOCK_MAX 32 /* Not specified but we use same structure */
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union i2c_smbus_data {
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__u8 byte;
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__u16 word;
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__u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
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/* and one more for PEC */
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};
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/* smbus_access read or write markers */
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#define I2C_SMBUS_READ 1
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#define I2C_SMBUS_WRITE 0
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/* SMBus transaction types (size parameter in the above functions)
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Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */
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#define I2C_SMBUS_QUICK 0
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#define I2C_SMBUS_BYTE 1
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#define I2C_SMBUS_BYTE_DATA 2
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#define I2C_SMBUS_WORD_DATA 3
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#define I2C_SMBUS_PROC_CALL 4
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#define I2C_SMBUS_BLOCK_DATA 5
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#define I2C_SMBUS_I2C_BLOCK_BROKEN 6
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#define I2C_SMBUS_BLOCK_PROC_CALL 7 /* SMBus 2.0 */
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#define I2C_SMBUS_I2C_BLOCK_DATA 8
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/* ----- commands for the ioctl like i2c_command call:
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* note that additional calls are defined in the algorithm and hw
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* dependent layers - these can be listed here, or see the
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* corresponding header files.
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*/
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/* -> bit-adapter specific ioctls */
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#define I2C_RETRIES 0x0701 /* number of times a device address */
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/* should be polled when not */
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/* acknowledging */
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#define I2C_TIMEOUT 0x0702 /* set timeout - call with int */
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/* this is for i2c-dev.c */
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#define I2C_SLAVE 0x0703 /* Change slave address */
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/* Attn.: Slave address is 7 or 10 bits */
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#define I2C_SLAVE_FORCE 0x0706 /* Change slave address */
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/* Attn.: Slave address is 7 or 10 bits */
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/* This changes the address, even if it */
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/* is already taken! */
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#define I2C_TENBIT 0x0704 /* 0 for 7 bit addrs, != 0 for 10 bit */
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#define I2C_FUNCS 0x0705 /* Get the adapter functionality */
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#define I2C_RDWR 0x0707 /* Combined R/W transfer (one stop only)*/
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#define I2C_PEC 0x0708 /* != 0 for SMBus PEC */
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#define I2C_SMBUS 0x0720 /* SMBus-level access */
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/* -- i2c.h -- */
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/* Note: 10-bit addresses are NOT supported! */
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/* This is the structure as used in the I2C_SMBUS ioctl call */
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struct i2c_smbus_ioctl_data {
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char read_write;
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__u8 command;
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int size;
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union i2c_smbus_data *data;
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};
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/* This is the structure as used in the I2C_RDWR ioctl call */
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struct i2c_rdwr_ioctl_data {
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struct i2c_msg *msgs; /* pointers to i2c_msgs */
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int nmsgs; /* number of i2c_msgs */
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};
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static inline __s32 i2c_smbus_access(int file, char read_write, __u8 command,
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int size, union i2c_smbus_data *data)
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{
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struct i2c_smbus_ioctl_data args;
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args.read_write = read_write;
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args.command = command;
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args.size = size;
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args.data = data;
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return ioctl(file,I2C_SMBUS,&args);
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}
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static inline __s32 i2c_smbus_write_quick(int file, __u8 value)
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{
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return i2c_smbus_access(file,value,0,I2C_SMBUS_QUICK,NULL);
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}
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static inline __s32 i2c_smbus_read_byte(int file)
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{
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union i2c_smbus_data data;
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if (i2c_smbus_access(file,I2C_SMBUS_READ,0,I2C_SMBUS_BYTE,&data))
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return -1;
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else
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return 0x0FF & data.byte;
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}
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static inline __s32 i2c_smbus_write_byte(int file, __u8 value)
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{
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return i2c_smbus_access(file,I2C_SMBUS_WRITE,value,
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I2C_SMBUS_BYTE,NULL);
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}
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static inline __s32 i2c_smbus_read_byte_data(int file, __u8 command)
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{
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union i2c_smbus_data data;
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if (i2c_smbus_access(file,I2C_SMBUS_READ,command,
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I2C_SMBUS_BYTE_DATA,&data))
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return -1;
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else
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return 0x0FF & data.byte;
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}
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static inline __s32 i2c_smbus_write_byte_data(int file, __u8 command,
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__u8 value)
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{
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union i2c_smbus_data data;
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data.byte = value;
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return i2c_smbus_access(file,I2C_SMBUS_WRITE,command,
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I2C_SMBUS_BYTE_DATA, &data);
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}
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static inline __s32 i2c_smbus_read_word_data(int file, __u8 command)
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{
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union i2c_smbus_data data;
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if (i2c_smbus_access(file,I2C_SMBUS_READ,command,
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I2C_SMBUS_WORD_DATA,&data))
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return -1;
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else
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return 0x0FFFF & data.word;
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}
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static inline __s32 i2c_smbus_write_word_data(int file, __u8 command,
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__u16 value)
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{
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union i2c_smbus_data data;
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data.word = value;
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return i2c_smbus_access(file,I2C_SMBUS_WRITE,command,
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I2C_SMBUS_WORD_DATA, &data);
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}
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static inline __s32 i2c_smbus_process_call(int file, __u8 command, __u16 value)
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{
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union i2c_smbus_data data;
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data.word = value;
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if (i2c_smbus_access(file,I2C_SMBUS_WRITE,command,
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I2C_SMBUS_PROC_CALL,&data))
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return -1;
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else
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return 0x0FFFF & data.word;
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}
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/* Returns the number of read bytes */
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static inline __s32 i2c_smbus_read_block_data(int file, __u8 command,
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__u8 *values)
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{
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union i2c_smbus_data data;
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int i;
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if (i2c_smbus_access(file,I2C_SMBUS_READ,command,
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I2C_SMBUS_BLOCK_DATA,&data))
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return -1;
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else {
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for (i = 1; i <= data.block[0]; i++)
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values[i-1] = data.block[i];
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return data.block[0];
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}
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}
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static inline __s32 i2c_smbus_write_block_data(int file, __u8 command,
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__u8 length, __u8 *values)
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{
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union i2c_smbus_data data;
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int i;
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if (length > 32)
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length = 32;
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for (i = 1; i <= length; i++)
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data.block[i] = values[i-1];
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data.block[0] = length;
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return i2c_smbus_access(file,I2C_SMBUS_WRITE,command,
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I2C_SMBUS_BLOCK_DATA, &data);
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}
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/* Returns the number of read bytes */
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/* Until kernel 2.6.22, the length is hardcoded to 32 bytes. If you
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ask for less than 32 bytes, your code will only work with kernels
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2.6.23 and later. */
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static inline __s32 i2c_smbus_read_i2c_block_data(int file, __u8 command,
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__u8 length, __u8 *values)
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{
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union i2c_smbus_data data;
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int i;
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if (length > 32)
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length = 32;
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data.block[0] = length;
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if (i2c_smbus_access(file,I2C_SMBUS_READ,command,
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length == 32 ? I2C_SMBUS_I2C_BLOCK_BROKEN :
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I2C_SMBUS_I2C_BLOCK_DATA,&data))
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return -1;
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else {
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for (i = 1; i <= data.block[0]; i++)
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values[i-1] = data.block[i];
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return data.block[0];
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}
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}
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static inline __s32 i2c_smbus_write_i2c_block_data(int file, __u8 command,
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__u8 length, __u8 *values)
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{
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union i2c_smbus_data data;
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int i;
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if (length > 32)
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length = 32;
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for (i = 1; i <= length; i++)
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data.block[i] = values[i-1];
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data.block[0] = length;
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return i2c_smbus_access(file,I2C_SMBUS_WRITE,command,
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I2C_SMBUS_I2C_BLOCK_BROKEN, &data);
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}
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/* Returns the number of read bytes */
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static inline __s32 i2c_smbus_block_process_call(int file, __u8 command,
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__u8 length, __u8 *values)
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{
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union i2c_smbus_data data;
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int i;
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if (length > 32)
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length = 32;
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for (i = 1; i <= length; i++)
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data.block[i] = values[i-1];
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data.block[0] = length;
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if (i2c_smbus_access(file,I2C_SMBUS_WRITE,command,
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I2C_SMBUS_BLOCK_PROC_CALL,&data))
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return -1;
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else {
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for (i = 1; i <= data.block[0]; i++)
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values[i-1] = data.block[i];
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return data.block[0];
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}
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}
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#endif /* LIB_I2CDEV_H */
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@ -28,11 +28,26 @@
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#include <sys/stat.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include <fcntl.h>
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#include <linux/i2c.h>
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#include "i2c-dev.h"
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#include <linux/i2c-dev.h>
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struct read_data {
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enum {
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uint8_t sys_state;
|
REG_STATUS = 0x00,
|
||||||
|
|
||||||
|
REG_CURRENT = 0x10,
|
||||||
|
REG_UBAT = 0x11,
|
||||||
|
REG_UIN = 0x12,
|
||||||
|
|
||||||
|
REG_UIN_LOSS = 0x20,
|
||||||
|
REG_UIN_RESTORE = 0x21,
|
||||||
|
REG_UBAT_FULL = 0x22,
|
||||||
|
REG_UBAT_LOW = 0x23,
|
||||||
|
REG_UBAT_CRIT = 0x24,
|
||||||
|
REG_IBAT_FULL = 0x25,
|
||||||
|
REG_CRC = 0x26,
|
||||||
|
};
|
||||||
|
|
||||||
|
struct usv_data {
|
||||||
|
uint16_t sys_state;
|
||||||
|
|
||||||
int16_t adc_current;
|
int16_t adc_current;
|
||||||
int16_t adc_ubat;
|
int16_t adc_ubat;
|
||||||
@ -45,19 +60,7 @@ struct read_data {
|
|||||||
int16_t ubat_critical;
|
int16_t ubat_critical;
|
||||||
int16_t ibat_full;
|
int16_t ibat_full;
|
||||||
uint16_t crc16;
|
uint16_t crc16;
|
||||||
} __attribute__((__packed__));
|
};
|
||||||
|
|
||||||
struct write_data {
|
|
||||||
uint8_t sys_state;
|
|
||||||
|
|
||||||
int16_t uin_loss;
|
|
||||||
int16_t uin_restore;
|
|
||||||
int16_t ubat_full;
|
|
||||||
int16_t ubat_low;
|
|
||||||
int16_t ubat_critical;
|
|
||||||
int16_t ibat_full;
|
|
||||||
uint16_t crc16;
|
|
||||||
} __attribute__((__packed__));
|
|
||||||
|
|
||||||
enum {
|
enum {
|
||||||
STATE_IDLE = 0x01,
|
STATE_IDLE = 0x01,
|
||||||
@ -105,8 +108,8 @@ static int i2c_open(const char *path)
|
|||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!(funcs & I2C_FUNC_I2C)) {
|
if ((funcs & I2C_FUNC_SMBUS_WORD_DATA) != I2C_FUNC_SMBUS_WORD_DATA) {
|
||||||
fprintf(stderr, "I2C_FUNC_I2C not supported!\n");
|
fprintf(stderr, "I2C_FUNC_SMBUS_WORD_DATA not supported!\n");
|
||||||
close(fd);
|
close(fd);
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
@ -133,41 +136,23 @@ int main(int argc, char *argv[])
|
|||||||
if (i2c_setaddress(fd, 0x10) < 0)
|
if (i2c_setaddress(fd, 0x10) < 0)
|
||||||
exit(-1);
|
exit(-1);
|
||||||
|
|
||||||
int cnt = 0;
|
|
||||||
|
|
||||||
while (1) {
|
while (1) {
|
||||||
struct read_data rdbuf;
|
struct usv_data usv;
|
||||||
memset(&rdbuf, 0, sizeof(rdbuf));
|
memset(&usv, 0, sizeof(usv));
|
||||||
|
|
||||||
int ret = read(fd, &rdbuf, sizeof(rdbuf));
|
usv.sys_state = i2c_smbus_read_word_data(fd, REG_STATUS);
|
||||||
if (ret <= 0)
|
usv.adc_current = i2c_smbus_read_word_data(fd, REG_CURRENT);
|
||||||
perror("read()");
|
usv.adc_ubat = i2c_smbus_read_word_data(fd, REG_UBAT);
|
||||||
|
usv.adc_uin = i2c_smbus_read_word_data(fd, REG_UIN);
|
||||||
|
|
||||||
printf("state:0x%02x I:%5dmA Ubat:%5dmV Usup:%5dmV (%s) [%5d,%5d,%5d,%5d,%5d,%5d,0x%04x]\n",
|
printf("state:0x%02x I:%5dmA Ubat:%5dmV Usup:%5dmV (%s) [%5d,%5d,%5d,%5d,%5d,%5d,0x%04x]\n",
|
||||||
rdbuf.sys_state, rdbuf.adc_current, rdbuf.adc_ubat,
|
usv.sys_state, usv.adc_current, usv.adc_ubat,
|
||||||
rdbuf.adc_uin, state2str(rdbuf.sys_state),
|
usv.adc_uin, state2str(usv.sys_state),
|
||||||
rdbuf.uin_loss, rdbuf.uin_restore, rdbuf.ubat_full,
|
usv.uin_loss, usv.uin_restore, usv.ubat_full,
|
||||||
rdbuf.ubat_low, rdbuf.ubat_critical, rdbuf.ibat_full,
|
usv.ubat_low, usv.ubat_critical, usv.ibat_full,
|
||||||
rdbuf.crc16);
|
usv.crc16);
|
||||||
|
|
||||||
sleep(1);
|
sleep(1);
|
||||||
cnt++;
|
|
||||||
|
|
||||||
if (cnt == 5) {
|
|
||||||
struct write_data wrbuf = {
|
|
||||||
.sys_state = STATE_CHARGE,
|
|
||||||
.uin_loss = 12000,
|
|
||||||
.uin_restore = 14000,
|
|
||||||
.ubat_full = 13300,
|
|
||||||
.ubat_low = 12000,
|
|
||||||
.ubat_critical = 10800,
|
|
||||||
.ibat_full = 150,
|
|
||||||
.crc16 = 0x0000,
|
|
||||||
};
|
|
||||||
|
|
||||||
// write (fd, &wrbuf, sizeof(wrbuf));
|
|
||||||
write (fd, &wrbuf, 1);
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
close(fd);
|
close(fd);
|
||||||
|
|
||||||
|
|||||||
63
alix-usv.c
63
alix-usv.c
@ -87,9 +87,20 @@ ISR(ADC_vect)
|
|||||||
ADCSRA |= (1<<ADSC);
|
ADCSRA |= (1<<ADSC);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static uint8_t i2c_reg;
|
||||||
|
|
||||||
void usi_write(uint8_t data, uint8_t bcnt)
|
void usi_write(uint8_t data, uint8_t bcnt)
|
||||||
{
|
{
|
||||||
|
/* select register */
|
||||||
if (bcnt == 0) {
|
if (bcnt == 0) {
|
||||||
|
i2c_reg = data;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
bcnt--;
|
||||||
|
|
||||||
|
/* reg 0x00, lowbyte -> write control */
|
||||||
|
if (i2c_reg == 0x00 && bcnt == 0x00) {
|
||||||
/* poweroff is always allowed */
|
/* poweroff is always allowed */
|
||||||
if (data & STATE_POWEROFF)
|
if (data & STATE_POWEROFF)
|
||||||
sys_state = data;
|
sys_state = data;
|
||||||
@ -102,44 +113,44 @@ void usi_write(uint8_t data, uint8_t bcnt)
|
|||||||
else if (sys_state != STATE_DISCHARGE)
|
else if (sys_state != STATE_DISCHARGE)
|
||||||
sys_state = data;
|
sys_state = data;
|
||||||
|
|
||||||
} else {
|
/* register word 0x20 - 0x26 eeprom parameters */
|
||||||
uint8_t index = (bcnt -1);
|
} else if (i2c_reg >= 0x20 && i2c_reg <= 0x26) {
|
||||||
uint8_t *ptr = (uint8_t *)¶ms;
|
uint8_t *ptr = (uint8_t *)¶ms;
|
||||||
if (index < sizeof(params))
|
uint8_t index = ((i2c_reg - 0x20) << 1) + (bcnt & 0x01);
|
||||||
ptr[index] = data;
|
ptr[index] = data;
|
||||||
|
|
||||||
if (index == (sizeof(params) -1))
|
/* crc field */
|
||||||
|
if (i2c_reg == 0x26 && bcnt == 0x01)
|
||||||
write_parameters();
|
write_parameters();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t usi_read(uint8_t bcnt)
|
uint8_t usi_read(uint8_t bcnt)
|
||||||
{
|
{
|
||||||
static int16_t adc_copy[3];
|
/* snapshot of adc value */
|
||||||
|
static int16_t adc_copy;
|
||||||
|
|
||||||
/* first byte read is sys_state */
|
/* reg 0x00, lowbyte -> read status */
|
||||||
if (bcnt == 0) {
|
if (i2c_reg == 0 && bcnt == 0) {
|
||||||
/* take a snapshot in interrupt-mode */
|
|
||||||
adc_copy[ADC_CURRENT] = adc_value[ADC_CURRENT];
|
|
||||||
adc_copy[ADC_UBAT] = adc_value[ADC_UBAT];
|
|
||||||
adc_copy[ADC_UIN] = adc_value[ADC_UIN];
|
|
||||||
return sys_state;
|
return sys_state;
|
||||||
|
|
||||||
|
/* register word 0x10 - 0x12 adc values */
|
||||||
|
} else if (i2c_reg >= 0x10 && i2c_reg <= 0x12) {
|
||||||
|
if (bcnt == 0x00) {
|
||||||
|
adc_copy = adc_value[i2c_reg - 0x10];
|
||||||
|
return adc_copy & 0xFF;
|
||||||
|
|
||||||
|
} else {
|
||||||
|
return (adc_copy >> 8) & 0xFF;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* register word 0x20 - 0x25 eeprom parameters */
|
||||||
|
} else if (i2c_reg >= 0x20 && i2c_reg <= 0x25) {
|
||||||
|
uint8_t *ptr = (uint8_t *)¶ms;
|
||||||
|
uint8_t index = ((i2c_reg - 0x20) << 1) + (bcnt & 0x01);
|
||||||
|
return ptr[index];
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t index = (bcnt -1);
|
|
||||||
uint8_t *ptr = (uint8_t *)adc_copy;
|
|
||||||
|
|
||||||
/* Current and Voltages (in mA/mV) */
|
|
||||||
if (index < sizeof(adc_copy))
|
|
||||||
return ptr[index];
|
|
||||||
|
|
||||||
index -= sizeof(adc_copy);
|
|
||||||
ptr = (uint8_t *)¶ms;
|
|
||||||
|
|
||||||
/* eeprom parameters (no snapshot needed, changed only in usi_write) */
|
|
||||||
if (index < sizeof(params))
|
|
||||||
return ptr[index];
|
|
||||||
|
|
||||||
return 0xFF;
|
return 0xFF;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user