From 85f5e95b07998d06ecd819aad2067eab7d996de2 Mon Sep 17 00:00:00 2001 From: Olaf Rempel Date: Mon, 1 May 2006 19:12:13 +0200 Subject: [PATCH] Version 0.4 (20040406) --- bin/avrprog_boot_mega16_3_68MHz.hex | 81 +++++ bin/avrprog_boot_mega16_bootice.hex | 77 ++++ bin/m16_uart_boot_3_9.hex | 79 ----- chipdef.h | 81 +++-- lowlevel.c | 122 +------ lowlevel.h | 19 +- main.c | 251 ++++++++++---- makefile | 3 +- myboot.h | 520 ++++++++++++++++++++++++++++ readme.txt | 33 +- 10 files changed, 946 insertions(+), 320 deletions(-) create mode 100644 bin/avrprog_boot_mega16_3_68MHz.hex create mode 100644 bin/avrprog_boot_mega16_bootice.hex delete mode 100644 bin/m16_uart_boot_3_9.hex create mode 100644 myboot.h diff --git a/bin/avrprog_boot_mega16_3_68MHz.hex b/bin/avrprog_boot_mega16_3_68MHz.hex new file mode 100644 index 0000000..660bab4 --- /dev/null +++ b/bin/avrprog_boot_mega16_3_68MHz.hex @@ -0,0 +1,81 @@ +:103800000C942A1C0C94451C0C94451C0C94451CCF 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b/chipdef.h @@ -2,6 +2,11 @@ #ifndef CHIPDEF_H #define CHIPDEF_H +#include + +// TODO: make use of RAMEND in the avr-libc io-files and +// avoid a lot of by-device definitions here + #if defined(__AVR_ATmega169__) #define sig_byte3 0x1E #define sig_byte2 0x94 @@ -9,23 +14,23 @@ #define devtype 0x79 // Mega 169 device code - #define PAGESIZE 128 // 2*64 Words = Size in Bytes +// #define PAGESIZE 128 // 2*64 Words = Size in Bytes #ifdef _B128 - #define APP_PAGES ((2*8192 / PAGESIZE)- (2*128 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*8192 / SPM_PAGESIZE)- (2*128 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B256 - #define APP_PAGES ((2*8192 / PAGESIZE)- (2*256 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*8192 / SPM_PAGESIZE)- (2*256 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B512 - #define APP_PAGES ((2*8192 / PAGESIZE)- (2*512 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*8192 / SPM_PAGESIZE)- (2*512 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B1024 - #define APP_PAGES ((2*8192 / PAGESIZE)- (2*1024 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*8192 / SPM_PAGESIZE)- (2*1024 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B2048 #error "_B2048 not suppoted on this device" @@ -39,23 +44,23 @@ #define devtype 0x75 // Mega16 device code - #define PAGESIZE 128 // Size in Bytes +// #define PAGESIZE 128 // Size in Bytes #ifdef _B128 - #define APP_PAGES ((2*8192 / PAGESIZE)- (2*128 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*8192 / SPM_PAGESIZE)- (2*128 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B256 - #define APP_PAGES ((2*8192 / PAGESIZE)- (2*256 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*8192 / SPM_PAGESIZE)- (2*256 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B512 - #define APP_PAGES ((2*8192 / PAGESIZE)- (2*512 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*8192 / SPM_PAGESIZE)- (2*512 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B1024 - #define APP_PAGES ((2*8192 / PAGESIZE)- (2*1024 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*8192 / SPM_PAGESIZE)- (2*1024 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B2048 #error "_B2048 not suppoted on this device" @@ -69,23 +74,23 @@ #define devtype 0x77 // Mega8 boot device code - #define PAGESIZE 64 // Size in Bytes +// #define PAGESIZE 64 // Size in Bytes #ifdef _B128 - #define APP_PAGES ((2*4096 / PAGESIZE)- (2*128 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*4096 / SPM_PAGESIZE)- (2*128 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B256 - #define APP_PAGES ((2*4096 / PAGESIZE)- (2*256 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*4096 / SPM_PAGESIZE)- (2*256 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B512 - #define APP_PAGES ((2*4096 / PAGESIZE)- (2*512 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*4096 / SPM_PAGESIZE)- (2*512 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B1024 - #define APP_PAGES ((2*4096 / PAGESIZE)- (2*1024 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*4096 / SPM_PAGESIZE)- (2*1024 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B2048 #error "_B2048 not suppoted on this device" @@ -99,27 +104,27 @@ #define devtype 0x73 // Mega32 device code - #define PAGESIZE 128 // Size in Bytes +// #define PAGESIZE 128 // Size in Bytes #ifdef _B128 - #define APP_PAGES ((2*16384 / PAGESIZE)- (2*128 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*16384 / SPM_PAGESIZE)- (2*128 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B256 - #define APP_PAGES ((2*16384 / PAGESIZE)- (2*256 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*16384 / SPM_PAGESIZE)- (2*256 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B512 - #define APP_PAGES ((2*16384 / PAGESIZE)- (2*512 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*16384 / SPM_PAGESIZE)- (2*512 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B1024 - #define APP_PAGES ((2*16384 / PAGESIZE)- (2*1024 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*16384 / SPM_PAGESIZE)- (2*1024 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #ifdef _B2048 - #define APP_PAGES ((2*16384 / PAGESIZE)- (2*2048 / PAGESIZE )) - #define APP_END APP_PAGES * PAGESIZE + #define APP_PAGES ((2*16384 / SPM_PAGESIZE)- (2*2048 / SPM_PAGESIZE )) + #define APP_END APP_PAGES * SPM_PAGESIZE #endif #else diff --git a/lowlevel.c b/lowlevel.c index 61b7843..ce47399 100644 --- a/lowlevel.c +++ b/lowlevel.c @@ -1,132 +1,20 @@ // // Low-level bootloader routines to replace "assembly.s90" -// from the original ATMEL code. -// -// See avr-libc's boot-module for more information -// Thanks to Eric B. Weddington author of boot.h. +// from the original ATMEL Butterfly bootloader code +// which are not included in avr-libc's boot.h by the +// time of writing this. // // 3/2004 Martin Thomas, Kaiserslautern, Germany // -// todo: extend functions with espm -#include +#include "lowlevel.h" -// There are some #ifdefs in avr/boot.h V1.0 that do not "know" -// about the ATmega169. So some functions have been copied here -// and small modifications have been done to avoid problems. - -#include "chipdef.h" - -/* Check for SPM Control Register in processor. */ -#if defined (SPMCSR) -# define SPM_REG SPMCSR -#elif defined (SPMCR) -# define SPM_REG SPMCR -#else -# error AVR processor does not provide bootloader support! -#endif - -#define BOOT_PAGE_FILL _BV(SPMEN) -#define BOOT_LOCK_BITS_SET (_BV(SPMEN) | _BV(BLBSET)) - -#define boot_spm_busy() (SPM_REG & (unsigned char)_BV(SPMEN)) -#define boot_spm_busy_wait() do{}while(boot_spm_busy()) -#define eeprom_is_ready() bit_is_clear(EECR, EEWE) -#define eeprom_is_ready_wait() do{}while(!eeprom_is_ready()) - -// from avr/boot.h -// added "func" parameter and spm-busy check at end -#define _boot_page_write_alternate_bf(address,func) \ -({ \ - boot_spm_busy_wait(); \ - eeprom_is_ready_wait(); \ - asm volatile \ - ( \ - "movw r30, %2\n\t" \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - ".word 0xffff\n\t" \ - "nop\n\t" \ - : "=m" (SPM_REG) \ - : "r" ((unsigned char)func), \ - "r" ((unsigned short)address) \ - : "r30", "r31", "r0" \ - ); \ - boot_spm_busy_wait(); \ -}) - -// from avr/boot.h -// added spm-busy check at end -#define _boot_page_fill_alternate_bf(address, data)\ -({ \ - boot_spm_busy_wait(); \ - eeprom_is_ready_wait(); \ - asm volatile \ - ( \ - "movw r0, %3\n\t" \ - "movw r30, %2\n\t" \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - ".word 0xffff\n\t" \ - "nop\n\t" \ - "clr r1\n\t" \ - : "=m" (SPM_REG) \ - : "r" ((unsigned char)BOOT_PAGE_FILL), \ - "r" ((unsigned short)address), \ - "r" ((unsigned short)data) \ - : "r0", "r30", "r31" \ - ); \ - boot_spm_busy_wait(); \ -}) - -// from avr/boot.h -// added spm-busy check at end, removed lockbit-masking, -// removed r30/r31 init - maybe wrong TODO: test this - -#ifdef ENABLEREADFUSELOCK -#define _boot_lock_bits_set_alternate_bf(lock_bits) \ -({ \ - boot_spm_busy_wait(); \ - eeprom_is_ready_wait(); \ - asm volatile \ - ( \ - "mov r0, %2\n\t" \ - "sts %0, %1\n\t" \ - "spm\n\t" \ - ".word 0xffff\n\t" \ - "nop\n\t" \ - : "=m" (SPM_REG) \ - : "r" ((unsigned char)BOOT_LOCK_BITS_SET), \ - "r" ((unsigned char) lock_bits) \ - : "r0" \ - ); \ - boot_spm_busy_wait(); \ -}) - -void write_lock_bits (unsigned char val) -{ - _boot_lock_bits_set_alternate_bf(val); -} -#endif - -void write_page (unsigned int adr, unsigned char function) -{ - _boot_page_write_alternate_bf(adr,function); -} - -void fill_temp_buffer (unsigned int data,unsigned int adr) -{ - _boot_page_fill_alternate_bf(adr, data); -} - -unsigned int read_program_memory(unsigned int adr ,unsigned char param) +unsigned int read_program_memory(unsigned int adr, unsigned char param) // to read lockbits give param=0x09, if param!=0 it is written to SPMCSR // this is a "translation" from the original code to gcc-inline-assembler { unsigned int retval; - boot_spm_busy_wait(); - eeprom_is_ready_wait(); asm volatile ( "movw r30, %3\n\t" diff --git a/lowlevel.h b/lowlevel.h index 07f213a..d19725c 100644 --- a/lowlevel.h +++ b/lowlevel.h @@ -1,9 +1,18 @@ #ifndef LOWLEVEL_H #define LOWLEVEL_H -void write_page (unsigned int adr, unsigned char function); + +#include + +/* Check for SPM Control Register in processor. */ +#if defined (SPMCSR) +# define SPM_REG SPMCSR +#elif defined (SPMCR) +# define SPM_REG SPMCR +#else +# error AVR processor does not provide bootloader support! +#endif + unsigned int read_program_memory (unsigned int,unsigned char); -void fill_temp_buffer (unsigned int data,unsigned int adr); -#ifdef ENABLEREADFUSELOCK -void write_lock_bits (unsigned char val); -#endif + + #endif diff --git a/main.c b/main.c index 233f52f..35c7adc 100644 --- a/main.c +++ b/main.c @@ -1,27 +1,36 @@ /***************************************************************************** * * AVRPROG compatible boot-loader -* Version : 0.2 (24. March 2004) +* Version : 0.4 (6. Apr. 2004) * Compiler : avr-gcc 3.3.1 / avr-libc 1.0 -* size : ca. 610 word ( larger than 512 words :-( ) +* size : ( larger than 512 words :-( ) * by : Martin Thomas, Kaiserslautern, Germany * eversmith@heizung-thomas.de * -* based on the Butterfly Bootloader-Code -* Copyright (C) 1996-1998 Atmel Corporation -* Author(s) : BBrandal, PKastnes, ARodland, LHM +* License : none. free code and free to use and modify +* BUT: Please send me bug-reports if you find out that +* something has been done wrong. You may mention where +* you've got the source in the documention of your +* project if you're using this bootloader. +* +* - based on the Butterfly Bootloader-Code +* Copyright (C) 1996-1998 Atmel Corporation +* Author(s) : BBrandal, PKastnes, ARodland, LHM +* The orignal code has been made available by ATMEL together with the +* Butterfly application code. Since ATMEL.NO had no problem with +* the application gcc-port they hopefully will not have any concerns about +* publishing this port. A lot of things have been change but the ATMEL +* "skeleton" is still in this code. Make sure to keep the copyright notice +* in derived work to avoid trouble. +* +* - based on boot.h from the avr-libc (c) Eric Weddington * -* The orignal code has been made available by ATMEL together with the -* Butterfly application code. Since ATMEL.NO had no problem with -* the application gcc-port they hopefully will not have any concerns about -* publishing this port. Make sure to keep the copyright notice in derived -* work to avoid trouble. **************************************************************************** * * Many functions used by "AVRPROG" (fuses) have been disabled by ATMEL in * the original source code of the Butterfly Boot-loader not by me. -* Please 'diff' against the original source to see everything that has been -* changed for the gcc port. +* I will try to make all of them available in later versions but i.e the +* ATmega169 is not completly supported by AVRPROG 1.37. * * The boot interrupt vector is included (this bootloader is completly in * ".text" section). If you need this space for further functions you have to @@ -29,29 +38,57 @@ * for this section to _all_ function prototypes of functions in the loader. * With this the interrupt vector will be placed at .0000 and the bootloader * code (without interrupt vector) at the adress you define in the linker -* options for the newly created section. See the avr-libc FAQ and the avr- -* libc's avr/boot.h documentation for further details. +* options for the newly created section. See the avr-libc FAQ, the avr- +* libc's avr/boot.h documentation and the makefile for further details. * -* For this bootloader a Boot-Size of at least 0x4C4 (1220) bytes = -* 610 words is needed. Sorry, so far efforts to shrink to 512 words failed. +* Sorry, so far efforts to shrink to 512 words failed. * See the makefile for information how to adopt the linker-settings to * the selected Boot Size (_Bxxx below) * ****************************************************************************/ +/* + Does not work so far: + - fuse high byte read (or parse in AVRPROG?) + - lock bits set +*/ +// programmers-notepad tabsize 4 +#include #include #include -#include #include +/* BOOTICE-Mode - to flash the JTAGICE upgrade.ebn file. + No startup-sequence in this mode. Jump directly to the + parser-loop on reset + XTAL in BOOTICEMODE must be 7372800 Hz to be compatible + with the org. JTAGICE-Firmware */ +// #define BOOTICEMODE -/* READFUSELOCK is untested, will not work for Mega169 since not - supported by AVRPROG 1.37 */ -// #define ENABLEREADFUSELOCK - +// UART handling - some definitions from P. Fleury's Library - thanks #define BAUDRATE 19200 + +#ifndef BOOTICEMODE #define XTAL 3686400 +#else +#warning "BOOTICE mode - External Crystal/Oszillator must be 7,3728 MHz" +#define XTAL 7372800 +#endif + +#include "uart.h" + +/* enable/disable readout of fuse and lock-bits + (will not work for Mega169 since not supported by AVRPROG 1.37 */ +#define ENABLEREADFUSELOCK + +/* enable/disable write of lock-bits + WARNING: lock-bits can not be reseted by bootloader (as far as I know) + Only protection no unprotection, "chip erase" from bootloader only + clears the flash but does no real "chip erase" (this is not possible + with a bootloader as far as I know) + */ +// #define WRITELOCKBITS /* Select Boot Size (select one, comment out the others) select at least _B1024 */ @@ -63,15 +100,24 @@ #include "chipdef.h" -#define UART_RX_BUFFER_SIZE PAGESIZE - +// this uses the latest version from avr-libc CVS not the one that comes +// with WINAVR Sep./03 (6.Apr.04: it's like the boot.h from the Apr/04 +// WINAVR but the lock-bit-mask has been changed. Found out during the +// development of a STK500-plugin-compatible-bootloader) +#include "myboot.h" +// functions not found in boot.h #include "lowlevel.h" -#include "uart.h" + +#define UART_RX_BUFFER_SIZE SPM_PAGESIZE +unsigned char gBuffer[UART_RX_BUFFER_SIZE]; + +#define eeprom_is_ready() bit_is_clear(EECR, EEWE) +#define my_eeprom_busy_wait() do{}while(!eeprom_is_ready()) unsigned char BufferLoad(unsigned int , unsigned char ) ; void BlockRead(unsigned int , unsigned char ) ; -unsigned int address; +unsigned short address; unsigned char device; void send_boot(void) @@ -89,29 +135,33 @@ int main(void) { void (*funcptr)( void ) = 0x0000; // Set up function pointer - unsigned int tempi; + unsigned short tempi; char val; char OK = 1; - PORTA = 0xFF; // Enable pullups on Port A - - USART_Init(UART_BAUD_SELECT(BAUDRATE,XTAL),UARTSINGLE); - // USART_Init(UART_BAUD_SELECT(BAUDRATE/2,XTAL),UARTDOUBLE); - - MCUCR = (1<> 8); - address++; // Select next byte - EEDR = recchar(); // Load data to write + address++; // Select next byte + // EEDR = recchar(); // Load data to write + EEDR=gBuffer[cnt++]; + EECR |= (1< + #include + \endcode + + The macros in this module provide a C language interface to the + bootloader support functionality of certain AVR processors. These + macros are designed to work with all sizes of flash memory. + + \note Not all AVR processors provide bootloader support. See your + processor datasheet to see if it provides bootloader support. + + \todo From email with Marek: On smaller devices (all except ATmega64/128), + __SPM_REG is in the I/O space, accessible with the shorter "in" and "out" + instructions - since the boot loader has a limited size, this could be an + important optimization. + + \par API Usage Example + The following code shows typical usage of the boot API. + + \code + #include + #include + #include + + void boot_program_page (uint32_t page, uint8_t *buf) + { + uint16_t i; + uint8_t sreg; + + // Disable interrupts. + + sreg = SREG; + cli(); + + eeprom_busy_wait (); + + boot_page_erase (page); + boot_spm_busy_wait (); // Wait until the memory is erased. + + for (i=0; i +#include +#include +#include + +/* Check for SPM Control Register in processor. */ +#if defined (SPMCSR) +# define __SPM_REG SPMCSR +#elif defined (SPMCR) +# define __SPM_REG SPMCR +#else +# error AVR processor does not provide bootloader support! +#endif + +/** \ingroup avr_boot + \def BOOTLOADER_SECTION + + Used to declare a function or variable to be placed into a + new section called .bootloader. This section and its contents + can then be relocated to any address (such as the bootloader + NRWW area) at link-time. */ + +#define BOOTLOADER_SECTION __attribute__ ((section (".bootloader"))) + +/* Create common bit definitions. */ +#ifdef ASB +#define __COMMON_ASB ASB +#else +#define __COMMON_ASB RWWSB +#endif + +#ifdef ASRE +#define __COMMON_ASRE ASRE +#else +#define __COMMON_ASRE RWWSRE +#endif + +/* Define the bit positions of the Boot Lock Bits. */ + +#define BLB12 5 +#define BLB11 4 +#define BLB02 3 +#define BLB01 2 +// mthomas: +#define LB2 1 +#define LB1 0 +#define LOCK6 6 +#define LOCK7 7 + +/** \ingroup avr_boot + \def boot_spm_interrupt_enable() + Enable the SPM interrupt. */ + +#define boot_spm_interrupt_enable() (__SPM_REG |= (uint8_t)_BV(SPMIE)) + +/** \ingroup avr_boot + \def boot_spm_interrupt_disable() + Disable the SPM interrupt. */ + +#define boot_spm_interrupt_disable() (__SPM_REG &= (uint8_t)~_BV(SPMIE)) + +/** \ingroup avr_boot + \def boot_is_spm_interrupt() + Check if the SPM interrupt is enabled. */ + +#define boot_is_spm_interrupt() (__SPM_REG & (uint8_t)_BV(SPMIE)) + +/** \ingroup avr_boot + \def boot_rww_busy() + Check if the RWW section is busy. */ + +#define boot_rww_busy() (__SPM_REG & (uint8_t)_BV(__COMMON_ASB)) + +/** \ingroup avr_boot + \def boot_spm_busy() + Check if the SPM instruction is busy. */ + +#define boot_spm_busy() (__SPM_REG & (uint8_t)_BV(SPMEN)) + +/** \ingroup avr_boot + \def boot_spm_busy_wait() + Wait while the SPM instruction is busy. */ + +#define boot_spm_busy_wait() do{}while(boot_spm_busy()) + +#define __BOOT_PAGE_ERASE (_BV(SPMEN) | _BV(PGERS)) +#define __BOOT_PAGE_WRITE (_BV(SPMEN) | _BV(PGWRT)) +#define __BOOT_PAGE_FILL _BV(SPMEN) +#define __BOOT_RWW_ENABLE (_BV(SPMEN) | _BV(__COMMON_ASRE)) +#define __BOOT_LOCK_BITS_SET (_BV(SPMEN) | _BV(BLBSET)) + +// mthomas - should be inverted +// #define __BOOT_LOCK_BITS_MASK (_BV(BLB01) | _BV(BLB02) | _BV(BLB11) | _BV(BLB12)) +#define __BOOT_LOCK_BITS_MASK (_BV(LB1) | _BV(LB2) | _BV(LOCK6) | _BV(LOCK7)) + +#define __boot_page_fill_normal(address, data) \ +({ \ + __asm__ __volatile__ \ + ( \ + "movw r0, %3\n\t" \ + "movw r30, %2\n\t" \ + "sts %0, %1\n\t" \ + "spm\n\t" \ + "clr r1\n\t" \ + : "=m" (__SPM_REG) \ + : "r" ((uint8_t)__BOOT_PAGE_FILL), \ + "r" ((uint16_t)address), \ + "r" ((uint16_t)data) \ + : "r0", "r30", "r31" \ + ); \ +}) + +#define __boot_page_fill_alternate(address, data)\ +({ \ + __asm__ __volatile__ \ + ( \ + "movw r0, %3\n\t" \ + "movw r30, %2\n\t" \ + "sts %0, %1\n\t" \ + "spm\n\t" \ + ".word 0xffff\n\t" \ + "nop\n\t" \ + "clr r1\n\t" \ + : "=m" (__SPM_REG) \ + : "r" ((uint8_t)__BOOT_PAGE_FILL), \ + "r" ((uint16_t)address), \ + "r" ((uint16_t)data) \ + : "r0", "r30", "r31" \ + ); \ +}) + +#define __boot_page_fill_extended(address, data) \ +({ \ + __asm__ __volatile__ \ + ( \ + "movw r0, %4\n\t" \ + "movw r30, %A3\n\t" \ + "sts %1, %C3\n\t" \ + "sts %0, %2\n\t" \ + "spm\n\t" \ + "clr r1\n\t" \ + : "=m" (__SPM_REG), \ + "=m" (RAMPZ) \ + : "r" ((uint8_t)__BOOT_PAGE_FILL), \ + "r" ((uint32_t)address), \ + "r" ((uint16_t)data) \ + : "r0", "r30", "r31" \ + ); \ +}) + +#define __boot_page_erase_normal(address) \ +({ \ + __asm__ __volatile__ \ + ( \ + "movw r30, %2\n\t" \ + "sts %0, %1\n\t" \ + "spm\n\t" \ + : "=m" (__SPM_REG) \ + : "r" ((uint8_t)__BOOT_PAGE_ERASE), \ + "r" ((uint16_t)address) \ + : "r30", "r31" \ + ); \ +}) + +#define __boot_page_erase_alternate(address) \ +({ \ + __asm__ __volatile__ \ + ( \ + "movw r30, %2\n\t" \ + "sts %0, %1\n\t" \ + "spm\n\t" \ + ".word 0xffff\n\t" \ + "nop\n\t" \ + : "=m" (__SPM_REG) \ + : "r" ((uint8_t)__BOOT_PAGE_ERASE), \ + "r" ((uint16_t)address) \ + : "r30", "r31" \ + ); \ +}) + +#define __boot_page_erase_extended(address) \ +({ \ + __asm__ __volatile__ \ + ( \ + "movw r30, %A3\n\t" \ + "sts %1, %C3\n\t" \ + "sts %0, %2\n\t" \ + "spm\n\t" \ + : "=m" (__SPM_REG), \ + "=m" (RAMPZ) \ + : "r" ((uint8_t)__BOOT_PAGE_ERASE), \ + "r" ((uint32_t)address) \ + : "r30", "r31" \ + ); \ +}) + +#define __boot_page_write_normal(address) \ +({ \ + __asm__ __volatile__ \ + ( \ + "movw r30, %2\n\t" \ + "sts %0, %1\n\t" \ + "spm\n\t" \ + : "=m" (__SPM_REG) \ + : "r" ((uint8_t)__BOOT_PAGE_WRITE), \ + "r" ((uint16_t)address) \ + : "r30", "r31" \ + ); \ +}) + +#define __boot_page_write_alternate(address) \ +({ \ + __asm__ __volatile__ \ + ( \ + "movw r30, %2\n\t" \ + "sts %0, %1\n\t" \ + "spm\n\t" \ + ".word 0xffff\n\t" \ + "nop\n\t" \ + : "=m" (__SPM_REG) \ + : "r" ((uint8_t)__BOOT_PAGE_WRITE), \ + "r" ((uint16_t)address) \ + : "r30", "r31" \ + ); \ +}) + +#define __boot_page_write_extended(address) \ +({ \ + __asm__ __volatile__ \ + ( \ + "movw r30, %A3\n\t" \ + "sts %1, %C3\n\t" \ + "sts %0, %2\n\t" \ + "spm\n\t" \ + : "=m" (__SPM_REG), \ + "=m" (RAMPZ) \ + : "r" ((uint8_t)__BOOT_PAGE_WRITE), \ + "r" ((uint32_t)address) \ + : "r30", "r31" \ + ); \ +}) + +#define __boot_rww_enable() \ +({ \ + __asm__ __volatile__ \ + ( \ + "sts %0, %1\n\t" \ + "spm\n\t" \ + : "=m" (__SPM_REG) \ + : "r" ((uint8_t)__BOOT_RWW_ENABLE) \ + ); \ +}) + +#define __boot_rww_enable_alternate() \ +({ \ + __asm__ __volatile__ \ + ( \ + "sts %0, %1\n\t" \ + "spm\n\t" \ + ".word 0xffff\n\t" \ + "nop\n\t" \ + : "=m" (__SPM_REG) \ + : "r" ((uint8_t)__BOOT_RWW_ENABLE) \ + ); \ +}) + +#define __boot_lock_bits_set(lock_bits) \ +({ \ + uint8_t value = (uint8_t)(lock_bits | __BOOT_LOCK_BITS_MASK); \ + __asm__ __volatile__ \ + ( \ + "ldi r30, 1\n\t" \ + "ldi r31, 0\n\t" \ + "mov r0, %2\n\t" \ + "sts %0, %1\n\t" \ + "spm\n\t" \ + : "=m" (__SPM_REG) \ + : "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ + "r" (value) \ + : "r0", "r30", "r31" \ + ); \ +}) + +#define __boot_lock_bits_set_alternate(lock_bits) \ +({ \ + uint8_t value = (uint8_t)(lock_bits | __BOOT_LOCK_BITS_MASK); \ + __asm__ __volatile__ \ + ( \ + "ldi r30, 1\n\t" \ + "ldi r31, 0\n\t" \ + "mov r0, %2\n\t" \ + "sts %0, %1\n\t" \ + "spm\n\t" \ + ".word 0xffff\n\t" \ + "nop\n\t" \ + : "=m" (__SPM_REG) \ + : "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \ + "r" (value) \ + : "r0", "r30", "r31" \ + ); \ +}) + +/** \ingroup avr_boot + \def boot_page_fill(address, data) + + Fill the bootloader temporary page buffer for flash + address with data word. + + \note The address is a byte address. The data is a word. The AVR + writes data to the buffer a word at a time, but addresses the buffer + per byte! So, increment your address by 2 between calls, and send 2 + data bytes in a word format! The LSB of the data is written to the lower + address; the MSB of the data is written to the higher address.*/ + +/** \ingroup avr_boot + \def boot_page_erase(address) + + Erase the flash page that contains address. + + \note address is a byte address in flash, not a word address. */ + +/** \ingroup avr_boot + \def boot_page_write(address) + + Write the bootloader temporary page buffer + to flash page that contains address. + + \note address is a byte address in flash, not a word address. */ + +/** \ingroup avr_boot + \def boot_rww_enable() + + Enable the Read-While-Write memory section. */ + +/** \ingroup avr_boot + \def boot_lock_bits_set(lock_bits) + + Set the bootloader lock bits. */ + +/* Normal versions of the macros use 16-bit addresses. + Extended versions of the macros use 32-bit addresses. + Alternate versions of the macros use 16-bit addresses and require special + instruction sequences after LPM. + + FLASHEND is defined in the ioXXXX.h file. + USHRT_MAX is defined in . */ + +#if defined(__AVR_ATmega161__) || defined(__AVR_ATmega163__) \ + || defined(__AVR_ATmega323__) + +/* Alternate: ATmega161/163/323 and 16 bit address */ +#define boot_page_fill(address, data) __boot_page_fill_alternate(address, data) +#define boot_page_erase(address) __boot_page_erase_alternate(address) +#define boot_page_write(address) __boot_page_write_alternate(address) +#define boot_rww_enable() __boot_rww_enable_alternate() +#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_alternate(lock_bits) + +#elif (FLASHEND > USHRT_MAX) && !defined(__USING_MINT8) + +/* Extended: >16 bit address */ +#define boot_page_fill(address, data) __boot_page_fill_extended(address, data) +#define boot_page_erase(address) __boot_page_erase_extended(address) +#define boot_page_write(address) __boot_page_write_extended(address) +#define boot_rww_enable() __boot_rww_enable() +#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set(lock_bits) + +#else + +/* Normal: 16 bit address */ +#define boot_page_fill(address, data) __boot_page_fill_normal(address, data) +#define boot_page_erase(address) __boot_page_erase_normal(address) +#define boot_page_write(address) __boot_page_write_normal(address) +#define boot_rww_enable() __boot_rww_enable() +#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set(lock_bits) + +#endif + +#define __boot_eeprom_spm_safe(func, address, data) \ +do { \ + boot_spm_busy_wait(); \ + eeprom_busy_wait(); \ + func (address, data); \ +} while (0) + +/** \ingroup avr_boot + + Same as boot_page_fill() except it waits for eeprom and spm operations to + complete before filling the page. */ + +#define boot_page_fill_safe(address, data) \ + __boot_eeprom_spm_safe (boot_page_fill, address, data) + +/** \ingroup avr_boot + + Same as boot_page_erase() except it waits for eeprom and spm operations to + complete before erasing the page. */ + +#define boot_page_erase_safe(address, data) \ + __boot_eeprom_spm_safe (boot_page_erase, address, data) + +/** \ingroup avr_boot + + Same as boot_page_write() except it waits for eeprom and spm operations to + complete before writing the page. */ + +#define boot_page_write_safe(address, data) \ + __boot_eeprom_spm_safe (boot_page_wrte, address, data) + +/** \ingroup avr_boot + + Same as boot_rww_enable() except waits for eeprom and spm operations to + complete before enabling the RWW mameory. */ + +#define boot_rww_enable_safe(address, data) \ + __boot_eeprom_spm_safe (boot_rww_enable, address, data) + +/** \ingroup avr_boot + + Same as boot_lock_bits_set() except waits for eeprom and spm operations to + complete before setting the lock bits. */ + +#define boot_lock_bits_set_safe(address, data) \ + __boot_eeprom_spm_safe (boot_lock_bits_set, address, data) + +#endif /* _AVR_BOOT_H_ */ diff --git a/readme.txt b/readme.txt index d4ad021..8fc32c0 100644 --- a/readme.txt +++ b/readme.txt @@ -11,10 +11,39 @@ This is an adapted version which has been tested with the ATmega16 but should work with the ATmega8, ATmega169 and ATmega32. The bootloader uses block/ - page write and is fast. + page write for flash and is fast. ====================================================== +6. Apr. 2004 - Version 0.4 + +* Buffered read of chars from UART during programming +since eeprom-write is too slow for unbuffered +operation. So EEPROM-upload does work now. +* Added BOOTICE-mode to flash JTAGICE-compatible +hardware (ATmega16@7,3Mhz) (if you know about BOOTICE, +you may unterstand why this has been added, if not +just keep the option disabled) +* small changes in (my)boot.h (lock-bit-mask) found +out during the development of the STK-500-compatible +bootloader. But setting lock-bits still does not +work with this bootloader. +* read of the low-fuse byte works (high byte still TODO) +* read of the lock-byte works (wirte still TODO) + +27. Mar 2004 - Version 0.3 + +Felt that as much functions from avr-libc's boot.h +as possible should be used without modifications. +Latest CVS-version of boot.h is included. +Only the read-routine is still "self-made" based +on ATMELs assembler-code. +EEPROM write on Mega16 does not work (and did not +work with V0.2 too). May be caused by my old Mega16 +chip. Needs testing. Flash read/write and EEPROM +read works. Still only tested with ATmega16. +This version may not work with the ATmega169 any +more. 24. Mar 2004 - Version 0.2 @@ -33,7 +62,7 @@ www.siwawi.arubi.uni-kl.de/avr_projects Atmel used a separate "lib" written in "pure" assembly to access the low-level functions -for flash and eeprom read/write. Well, so far I +for flash read/write. Well, so far I don't know how to use "mixed language sources" with the avr-gcc toolchain, so the low-level routines have been implemented as inline assembler.