521 lines
20 KiB
C
521 lines
20 KiB
C
/* Copyright (c) 2002, 2003, 2004 Eric B. Weddington
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of the copyright holders nor the names of
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE. */
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#ifndef _AVR_BOOT_H_
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#define _AVR_BOOT_H_ 1
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/** \defgroup avr_boot Bootloader Support Utilities
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\code
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#include <avr/io.h>
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#include <avr/boot.h>
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\endcode
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The macros in this module provide a C language interface to the
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bootloader support functionality of certain AVR processors. These
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macros are designed to work with all sizes of flash memory.
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\note Not all AVR processors provide bootloader support. See your
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processor datasheet to see if it provides bootloader support.
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\todo From email with Marek: On smaller devices (all except ATmega64/128),
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__SPM_REG is in the I/O space, accessible with the shorter "in" and "out"
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instructions - since the boot loader has a limited size, this could be an
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important optimization.
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\par API Usage Example
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The following code shows typical usage of the boot API.
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\code
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#include <inttypes.h>
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#include <avr/interrupt.h>
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#include <avr/pgmspace.h>
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void boot_program_page (uint32_t page, uint8_t *buf)
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{
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uint16_t i;
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uint8_t sreg;
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// Disable interrupts.
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sreg = SREG;
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cli();
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eeprom_busy_wait ();
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boot_page_erase (page);
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boot_spm_busy_wait (); // Wait until the memory is erased.
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for (i=0; i<SPM_PAGESIZE; i+=2)
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{
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// Set up little-endian word.
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uint16_t w = *buf++;
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w += (*buf++) << 8;
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boot_page_fill (page + i, w);
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}
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boot_page_write (page); // Store buffer in flash page.
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boot_spm_busy_wait(); // Wait until the memory is written.
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// Reenable RWW-section again. We need this if we want to jump back
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// to the application after bootloading.
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boot_rww_enable ();
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// Re-enable interrupts (if they were ever enabled).
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SREG = sreg;
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}\endcode */
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#include <avr/eeprom.h>
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#include <avr/io.h>
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#include <inttypes.h>
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#include <limits.h>
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/* Check for SPM Control Register in processor. */
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#if defined (SPMCSR)
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# define __SPM_REG SPMCSR
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#elif defined (SPMCR)
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# define __SPM_REG SPMCR
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#else
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# error AVR processor does not provide bootloader support!
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#endif
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/** \ingroup avr_boot
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\def BOOTLOADER_SECTION
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Used to declare a function or variable to be placed into a
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new section called .bootloader. This section and its contents
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can then be relocated to any address (such as the bootloader
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NRWW area) at link-time. */
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#define BOOTLOADER_SECTION __attribute__ ((section (".bootloader")))
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/* Create common bit definitions. */
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#ifdef ASB
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#define __COMMON_ASB ASB
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#else
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#define __COMMON_ASB RWWSB
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#endif
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#ifdef ASRE
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#define __COMMON_ASRE ASRE
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#else
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#define __COMMON_ASRE RWWSRE
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#endif
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/* Define the bit positions of the Boot Lock Bits. */
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#define BLB12 5
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#define BLB11 4
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#define BLB02 3
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#define BLB01 2
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// mthomas:
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#define LB2 1
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#define LB1 0
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#define LOCK6 6
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#define LOCK7 7
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/** \ingroup avr_boot
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\def boot_spm_interrupt_enable()
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Enable the SPM interrupt. */
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#define boot_spm_interrupt_enable() (__SPM_REG |= (uint8_t)_BV(SPMIE))
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/** \ingroup avr_boot
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\def boot_spm_interrupt_disable()
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Disable the SPM interrupt. */
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#define boot_spm_interrupt_disable() (__SPM_REG &= (uint8_t)~_BV(SPMIE))
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/** \ingroup avr_boot
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\def boot_is_spm_interrupt()
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Check if the SPM interrupt is enabled. */
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#define boot_is_spm_interrupt() (__SPM_REG & (uint8_t)_BV(SPMIE))
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/** \ingroup avr_boot
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\def boot_rww_busy()
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Check if the RWW section is busy. */
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#define boot_rww_busy() (__SPM_REG & (uint8_t)_BV(__COMMON_ASB))
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/** \ingroup avr_boot
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\def boot_spm_busy()
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Check if the SPM instruction is busy. */
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#define boot_spm_busy() (__SPM_REG & (uint8_t)_BV(SPMEN))
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/** \ingroup avr_boot
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\def boot_spm_busy_wait()
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Wait while the SPM instruction is busy. */
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#define boot_spm_busy_wait() do{}while(boot_spm_busy())
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#define __BOOT_PAGE_ERASE (_BV(SPMEN) | _BV(PGERS))
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#define __BOOT_PAGE_WRITE (_BV(SPMEN) | _BV(PGWRT))
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#define __BOOT_PAGE_FILL _BV(SPMEN)
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#define __BOOT_RWW_ENABLE (_BV(SPMEN) | _BV(__COMMON_ASRE))
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#define __BOOT_LOCK_BITS_SET (_BV(SPMEN) | _BV(BLBSET))
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// mthomas - should be inverted
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// #define __BOOT_LOCK_BITS_MASK (_BV(BLB01) | _BV(BLB02) | _BV(BLB11) | _BV(BLB12))
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#define __BOOT_LOCK_BITS_MASK (_BV(LB1) | _BV(LB2) | _BV(LOCK6) | _BV(LOCK7))
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#define __boot_page_fill_normal(address, data) \
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({ \
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__asm__ __volatile__ \
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( \
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"movw r0, %3\n\t" \
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"movw r30, %2\n\t" \
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"sts %0, %1\n\t" \
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"spm\n\t" \
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"clr r1\n\t" \
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: "=m" (__SPM_REG) \
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: "r" ((uint8_t)__BOOT_PAGE_FILL), \
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"r" ((uint16_t)address), \
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"r" ((uint16_t)data) \
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: "r0", "r30", "r31" \
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); \
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})
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#define __boot_page_fill_alternate(address, data)\
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({ \
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__asm__ __volatile__ \
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( \
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"movw r0, %3\n\t" \
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"movw r30, %2\n\t" \
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"sts %0, %1\n\t" \
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"spm\n\t" \
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".word 0xffff\n\t" \
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"nop\n\t" \
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"clr r1\n\t" \
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: "=m" (__SPM_REG) \
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: "r" ((uint8_t)__BOOT_PAGE_FILL), \
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"r" ((uint16_t)address), \
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"r" ((uint16_t)data) \
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: "r0", "r30", "r31" \
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); \
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})
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#define __boot_page_fill_extended(address, data) \
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({ \
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__asm__ __volatile__ \
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( \
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"movw r0, %4\n\t" \
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"movw r30, %A3\n\t" \
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"sts %1, %C3\n\t" \
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"sts %0, %2\n\t" \
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"spm\n\t" \
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"clr r1\n\t" \
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: "=m" (__SPM_REG), \
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"=m" (RAMPZ) \
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: "r" ((uint8_t)__BOOT_PAGE_FILL), \
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"r" ((uint32_t)address), \
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"r" ((uint16_t)data) \
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: "r0", "r30", "r31" \
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); \
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})
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#define __boot_page_erase_normal(address) \
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({ \
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__asm__ __volatile__ \
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( \
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"movw r30, %2\n\t" \
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"sts %0, %1\n\t" \
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"spm\n\t" \
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: "=m" (__SPM_REG) \
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: "r" ((uint8_t)__BOOT_PAGE_ERASE), \
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"r" ((uint16_t)address) \
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: "r30", "r31" \
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); \
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})
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#define __boot_page_erase_alternate(address) \
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({ \
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__asm__ __volatile__ \
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( \
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"movw r30, %2\n\t" \
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"sts %0, %1\n\t" \
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"spm\n\t" \
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".word 0xffff\n\t" \
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"nop\n\t" \
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: "=m" (__SPM_REG) \
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: "r" ((uint8_t)__BOOT_PAGE_ERASE), \
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"r" ((uint16_t)address) \
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: "r30", "r31" \
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); \
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})
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#define __boot_page_erase_extended(address) \
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({ \
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__asm__ __volatile__ \
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( \
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"movw r30, %A3\n\t" \
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"sts %1, %C3\n\t" \
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"sts %0, %2\n\t" \
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"spm\n\t" \
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: "=m" (__SPM_REG), \
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"=m" (RAMPZ) \
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: "r" ((uint8_t)__BOOT_PAGE_ERASE), \
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"r" ((uint32_t)address) \
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: "r30", "r31" \
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); \
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})
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#define __boot_page_write_normal(address) \
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({ \
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__asm__ __volatile__ \
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( \
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"movw r30, %2\n\t" \
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"sts %0, %1\n\t" \
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"spm\n\t" \
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: "=m" (__SPM_REG) \
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: "r" ((uint8_t)__BOOT_PAGE_WRITE), \
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"r" ((uint16_t)address) \
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: "r30", "r31" \
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); \
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})
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#define __boot_page_write_alternate(address) \
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({ \
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__asm__ __volatile__ \
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( \
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"movw r30, %2\n\t" \
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"sts %0, %1\n\t" \
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"spm\n\t" \
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".word 0xffff\n\t" \
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"nop\n\t" \
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: "=m" (__SPM_REG) \
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: "r" ((uint8_t)__BOOT_PAGE_WRITE), \
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"r" ((uint16_t)address) \
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: "r30", "r31" \
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); \
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})
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#define __boot_page_write_extended(address) \
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({ \
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__asm__ __volatile__ \
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( \
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"movw r30, %A3\n\t" \
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"sts %1, %C3\n\t" \
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"sts %0, %2\n\t" \
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"spm\n\t" \
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: "=m" (__SPM_REG), \
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"=m" (RAMPZ) \
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: "r" ((uint8_t)__BOOT_PAGE_WRITE), \
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"r" ((uint32_t)address) \
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: "r30", "r31" \
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); \
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})
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#define __boot_rww_enable() \
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({ \
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__asm__ __volatile__ \
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( \
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"sts %0, %1\n\t" \
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"spm\n\t" \
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: "=m" (__SPM_REG) \
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: "r" ((uint8_t)__BOOT_RWW_ENABLE) \
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); \
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})
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#define __boot_rww_enable_alternate() \
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({ \
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__asm__ __volatile__ \
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( \
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"sts %0, %1\n\t" \
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"spm\n\t" \
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".word 0xffff\n\t" \
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"nop\n\t" \
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: "=m" (__SPM_REG) \
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: "r" ((uint8_t)__BOOT_RWW_ENABLE) \
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); \
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})
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#define __boot_lock_bits_set(lock_bits) \
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({ \
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uint8_t value = (uint8_t)(lock_bits | __BOOT_LOCK_BITS_MASK); \
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__asm__ __volatile__ \
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( \
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"ldi r30, 1\n\t" \
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"ldi r31, 0\n\t" \
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"mov r0, %2\n\t" \
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"sts %0, %1\n\t" \
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"spm\n\t" \
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: "=m" (__SPM_REG) \
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: "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
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"r" (value) \
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: "r0", "r30", "r31" \
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); \
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})
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#define __boot_lock_bits_set_alternate(lock_bits) \
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({ \
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uint8_t value = (uint8_t)(lock_bits | __BOOT_LOCK_BITS_MASK); \
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__asm__ __volatile__ \
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( \
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"ldi r30, 1\n\t" \
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"ldi r31, 0\n\t" \
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"mov r0, %2\n\t" \
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"sts %0, %1\n\t" \
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"spm\n\t" \
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".word 0xffff\n\t" \
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"nop\n\t" \
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: "=m" (__SPM_REG) \
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: "r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
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"r" (value) \
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: "r0", "r30", "r31" \
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); \
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})
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/** \ingroup avr_boot
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\def boot_page_fill(address, data)
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Fill the bootloader temporary page buffer for flash
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address with data word.
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\note The address is a byte address. The data is a word. The AVR
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writes data to the buffer a word at a time, but addresses the buffer
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per byte! So, increment your address by 2 between calls, and send 2
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data bytes in a word format! The LSB of the data is written to the lower
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address; the MSB of the data is written to the higher address.*/
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/** \ingroup avr_boot
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\def boot_page_erase(address)
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Erase the flash page that contains address.
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\note address is a byte address in flash, not a word address. */
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/** \ingroup avr_boot
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\def boot_page_write(address)
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Write the bootloader temporary page buffer
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to flash page that contains address.
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\note address is a byte address in flash, not a word address. */
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/** \ingroup avr_boot
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\def boot_rww_enable()
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Enable the Read-While-Write memory section. */
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/** \ingroup avr_boot
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\def boot_lock_bits_set(lock_bits)
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Set the bootloader lock bits. */
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/* Normal versions of the macros use 16-bit addresses.
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Extended versions of the macros use 32-bit addresses.
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Alternate versions of the macros use 16-bit addresses and require special
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instruction sequences after LPM.
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FLASHEND is defined in the ioXXXX.h file.
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USHRT_MAX is defined in <limits.h>. */
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#if defined(__AVR_ATmega161__) || defined(__AVR_ATmega163__) \
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|| defined(__AVR_ATmega323__)
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/* Alternate: ATmega161/163/323 and 16 bit address */
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#define boot_page_fill(address, data) __boot_page_fill_alternate(address, data)
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#define boot_page_erase(address) __boot_page_erase_alternate(address)
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#define boot_page_write(address) __boot_page_write_alternate(address)
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#define boot_rww_enable() __boot_rww_enable_alternate()
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#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_alternate(lock_bits)
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#elif (FLASHEND > USHRT_MAX) && !defined(__USING_MINT8)
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/* Extended: >16 bit address */
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#define boot_page_fill(address, data) __boot_page_fill_extended(address, data)
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#define boot_page_erase(address) __boot_page_erase_extended(address)
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#define boot_page_write(address) __boot_page_write_extended(address)
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#define boot_rww_enable() __boot_rww_enable()
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#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set(lock_bits)
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#else
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/* Normal: 16 bit address */
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#define boot_page_fill(address, data) __boot_page_fill_normal(address, data)
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#define boot_page_erase(address) __boot_page_erase_normal(address)
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#define boot_page_write(address) __boot_page_write_normal(address)
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#define boot_rww_enable() __boot_rww_enable()
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#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set(lock_bits)
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#endif
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#define __boot_eeprom_spm_safe(func, address, data) \
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do { \
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boot_spm_busy_wait(); \
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eeprom_busy_wait(); \
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func (address, data); \
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} while (0)
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/** \ingroup avr_boot
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Same as boot_page_fill() except it waits for eeprom and spm operations to
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complete before filling the page. */
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#define boot_page_fill_safe(address, data) \
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__boot_eeprom_spm_safe (boot_page_fill, address, data)
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/** \ingroup avr_boot
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Same as boot_page_erase() except it waits for eeprom and spm operations to
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complete before erasing the page. */
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#define boot_page_erase_safe(address, data) \
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__boot_eeprom_spm_safe (boot_page_erase, address, data)
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/** \ingroup avr_boot
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Same as boot_page_write() except it waits for eeprom and spm operations to
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complete before writing the page. */
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#define boot_page_write_safe(address, data) \
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__boot_eeprom_spm_safe (boot_page_wrte, address, data)
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/** \ingroup avr_boot
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Same as boot_rww_enable() except waits for eeprom and spm operations to
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complete before enabling the RWW mameory. */
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#define boot_rww_enable_safe(address, data) \
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__boot_eeprom_spm_safe (boot_rww_enable, address, data)
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/** \ingroup avr_boot
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Same as boot_lock_bits_set() except waits for eeprom and spm operations to
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complete before setting the lock bits. */
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#define boot_lock_bits_set_safe(address, data) \
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__boot_eeprom_spm_safe (boot_lock_bits_set, address, data)
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#endif /* _AVR_BOOT_H_ */
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