47 lines
1.1 KiB
C
47 lines
1.1 KiB
C
#ifndef _MEGA128_H_
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#define _MEGA128_H_
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/* Part-Code ISP */
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#define DEVTYPE_ISP 0x43
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/* Part-Code Boot */
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#define DEVTYPE_BOOT 0x44
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#define SIG_BYTE1 0x1E
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#define SIG_BYTE2 0x97
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#define SIG_BYTE3 0x02
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#ifdef UART_DOUBLESPEED
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#define UART_CALC_BAUDRATE(baudRate) ((uint32_t)(F_CPU) / ((uint32_t)(baudRate) *8) -1)
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#else
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#define UART_CALC_BAUDRATE(baudRate) ((uint32_t)(F_CPU) / ((uint32_t)(baudRate)*16) -1)
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#endif
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#ifndef UART_USE_SECOND
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#define UART_BAUD_HIGH UBRR0H
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#define UART_BAUD_LOW UBRR0L
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#define UART_STATUS UCSR0A
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#define UART_TXREADY UDRE0
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#define UART_RXREADY RXC0
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#define UART_DOUBLE U2X0
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#define UART_CTRL UCSR0B
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#define UART_CTRL_DATA ((1<<TXEN0) | (1<<RXEN0))
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#define UART_CTRL2 UCSR0C
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#define UART_CTRL2_DATA ((1<<UCSZ01) | (1<<UCSZ00))
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#define UART_DATA UDR0
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#else
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#define UART_BAUD_HIGH UBRR1H
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#define UART_BAUD_LOW UBRR1L
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#define UART_STATUS UCSR1A
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#define UART_TXREADY UDRE1
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#define UART_RXREADY RXC1
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#define UART_DOUBLE U2X1
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#define UART_CTRL UCSR1B
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#define UART_CTRL_DATA ((1<<TXEN1) | (1<<RXEN1))
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#define UART_CTRL2 UCSR1C
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#define UART_CTRL2_DATA ((1<<UCSZ11) | (1<<UCSZ10))
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#define UART_DATA UDR1
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#endif
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#endif // #ifndef _MEGA128_H_
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