From 639c0e9bb9186ba3da218ea90ccdddfe187bd7d0 Mon Sep 17 00:00:00 2001
From: Olaf Rempel <razzor@kopf-tisch.de>
Date: Sat, 21 Jun 2008 14:34:57 +0200
Subject: [PATCH] mega88 version

---
 Makefile    |  4 ++--
 blmc.c      | 64 ++++++++++++++++++++++++++++++++++-------------------
 blmc.h      | 17 --------------
 i2c-slave.c |  2 +-
 main.c      | 38 ++++++++++++++++---------------
 main.h      | 19 ++++++++++++++++
 6 files changed, 83 insertions(+), 61 deletions(-)

diff --git a/Makefile b/Makefile
index 62854f7..b8102e2 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
 PRG            = bl_test
 OBJ            = blmc.o eeprom.o i2c-slave.o main.o
-MCU_TARGET     = atmega8
+MCU_TARGET     = atmega88
 OPTIMIZE       = -Os
 
 DEFS           =
@@ -61,4 +61,4 @@ ebin:  $(PRG)_eeprom.bin
 
 install: text
 #	uisp -dprog=avr910 -dserial=/dev/ttyS0 -dspeed=115200 -dpart=M8 --erase --upload if=$(PRG).hex
-	avrdude -p m8 -c butterfly -b 115200 -P /dev/ttyUSB1 -u -e -V -U flash:w:$(PRG).hex
+	avrdude -p m88 -c butterfly -b 115200 -u -e -V -U flash:w:$(PRG).hex
diff --git a/blmc.c b/blmc.c
index 14b3304..2b245c2 100644
--- a/blmc.c
+++ b/blmc.c
@@ -49,48 +49,66 @@ void next_phase(void)
 	/* Disable Analog Comperator */
 	ACSR &= ~(1<<ACIE);
 
-	TCNT1 = 0x00;
+	TCNT0 = 0x00;
 	TCNT2 = 0x00;
 
 	switch (phase) {
-	case 0:	PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_B_L;
-		TCCR1A = (TCCR1A & ~(1<<COM1B1)) | (1<<COM1A1);
-		TCCR2 &= ~(1<<COM21);
+	case 0: /* A: PWM, B: LOW, C: SENSE */
+		PORTB |= PHASE_A_EN;
+		PORTD = (PORTD & ~PHASE_C_EN) | PHASE_B_EN;
+		TCCR0A &= ~PHASE_B_OC;
+		TCCR2A = (TCCR2A & ~PHASE_C_OC) | PHASE_A_OC;
+
 		ACSR = (1<<ACIS1);
 		next_sense = SENSE_C;
 		break;
 
-	case 1:	PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_B_L;
-		TCCR1A &= ~((1<<COM1A1) | (1<<COM1B1));
-		TCCR2 |= (1<<COM21);
+	case 1: /* A: SENSE, B: LOW, C: PWM */
+		PORTB &= ~PHASE_A_EN;
+		PORTD |= PHASE_B_EN | PHASE_C_EN;
+		TCCR0A &= ~PHASE_B_OC;
+		TCCR2A = (TCCR2A & ~PHASE_A_OC) | PHASE_C_OC;
+
 		ACSR = (1<<ACIS1) | (1<<ACIS0);
 		next_sense = SENSE_A;
 		break;
 
-	case 2:	PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_A_L;
-		TCCR1A &= ~((1<<COM1A1) | (1<<COM1B1));
-		TCCR2 |= (1<<COM21);
+	case 2: /* A: LOW, B: SENSE, C: PWM */
+		PORTB |= PHASE_A_EN;
+		PORTD = (PORTD & ~PHASE_B_EN) | PHASE_C_EN;
+		TCCR0A &= ~PHASE_B_OC;
+		TCCR2A = (TCCR2A & ~PHASE_A_OC) | PHASE_C_OC;
+
 		ACSR = (1<<ACIS1);
 		next_sense = SENSE_B;
 		break;
 
-	case 3:	PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_A_L;
-		TCCR1A = (TCCR1A & ~(1<<COM1A1)) | (1<<COM1B1);
-		TCCR2 &= ~(1<<COM21);
+	case 3: /* A: LOW, B: PWM, C: SENSE */
+		PORTB |= PHASE_A_EN;
+		PORTD = (PORTD & ~PHASE_C_EN) | PHASE_B_EN;
+		TCCR0A |= PHASE_B_OC;
+		TCCR2A &= ~(PHASE_A_OC | PHASE_C_OC);
+
 		ACSR = (1<<ACIS1) | (1<<ACIS0);
 		next_sense = SENSE_C;
 		break;
 
-	case 4:	PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_C_L;
-		TCCR1A = (TCCR1A & ~(1<<COM1A1)) | (1<<COM1B1);
-		TCCR2 &= ~(1<<COM21);
+	case 4: /* A: SENSE, B: PWM, C: LOW */
+		PORTB &= ~PHASE_A_EN;
+		PORTD = (PORTD & ~PHASE_B_EN) | PHASE_C_EN;
+		TCCR0A |= PHASE_B_OC;
+		TCCR2A &= ~(PHASE_A_OC | PHASE_C_OC);
+
 		ACSR = (1<<ACIS1);
 		next_sense = SENSE_A;
 		break;
 
-	case 5:	PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_C_L;
-		TCCR1A = (TCCR1A & ~(1<<COM1B1)) | (1<<COM1A1);
-		TCCR2 &= ~(1<<COM21);
+	case 5: /* A: PWM, B: SENSE, C: LOW */
+		PORTB |= PHASE_A_EN;
+		PORTD = (PORTD & ~PHASE_B_EN) | PHASE_C_EN;
+		TCCR0A &= ~PHASE_B_OC;
+		TCCR2A = (TCCR2A & ~PHASE_C_OC) | PHASE_A_OC;
+
 		ACSR = (1<<ACIS1) | (1<<ACIS0);
 		next_sense = SENSE_B;
 		break;
@@ -208,12 +226,12 @@ void setpwm(uint8_t pwm)
 	if (pwm > params.pwm_max)
 		pwm = params.pwm_max;
 
-	OCR1A = pwm;
-	OCR1B = pwm;
-	OCR2 = pwm;
+	OCR0B = pwm;
+	OCR2A = pwm;
+	OCR2B = pwm;
 }
 
-ISR(ANA_COMP_vect)
+ISR(ANALOG_COMP_vect)
 {
 	next_phase();
 }
diff --git a/blmc.h b/blmc.h
index 11fd765..c33703b 100644
--- a/blmc.h
+++ b/blmc.h
@@ -3,23 +3,6 @@
 
 #include <avr/io.h>
 
-#define PHASE_A_H	(1<<PORTB1)
-#define PHASE_B_H	(1<<PORTB2)
-#define PHASE_C_H	(1<<PORTB3)
-#define PHASE_H_MASK	(PHASE_A_H | PHASE_B_H | PHASE_C_H)
-
-#define PHASE_A_L	(1<<PORTD4)
-#define PHASE_B_L	(1<<PORTD3)
-#define PHASE_C_L	(1<<PORTD2)
-#define PHASE_L_MASK	(PHASE_A_L | PHASE_B_L | PHASE_C_L)
-
-#define SENSE_A		0
-#define SENSE_B		1
-#define SENSE_C		2
-
-#define SENSE_VOLTAGE	3
-#define SENSE_CURRENT	6
-
 #define FLAG_RUN_MASK			0x00F
 #define FLAG_PWM_SPINUP			0x001
 #define FLAG_PWM_NORMAL			0x002
diff --git a/i2c-slave.c b/i2c-slave.c
index 3cbff05..d522771 100644
--- a/i2c-slave.c
+++ b/i2c-slave.c
@@ -35,7 +35,7 @@ extern struct ee_param params;
 #define CMD_GET_PARAM		0x24
 #define CMD_BOOT_LOADER		0x2F
 
-const static uint8_t info[16] = "blctrl  m8-v1.2";
+const static uint8_t info[16] = "blctrl m88-v1.2";
 
 ISR(TWI_vect)
 {
diff --git a/main.c b/main.c
index f639ada..2a50ae0 100644
--- a/main.c
+++ b/main.c
@@ -45,13 +45,13 @@ extern struct blmc_ blmc;
 
 static uint8_t led[2];
 
-ISR(TIMER0_OVF_vect)
+ISR(TIMER1_OVF_vect)
 {
-	static uint8_t timer0_cnt = 0;
+	static uint8_t rpm_cnt = 0;
 	static uint8_t adc_chan = SENSE_CURRENT;
 
 	/* Come back in 20ms */
-	TCNT0 = 0xFF - 156;
+	TCNT1 = (0xFFFF - 20000);
 
 	/* commutations during last 20ms */
 	uint16_t diff = blmc.rpm_tmp - blmc.rpm_tmp_old;
@@ -76,16 +76,17 @@ ISR(TIMER0_OVF_vect)
 			blmc.flags &= ~FLAG_I2C_TIMEOUT;
 		}
 
-		blmc.flags &= ~FLAG_I2C_ACTIVE;
+// TODO: currently disabled
+// 		blmc.flags &= ~FLAG_I2C_ACTIVE;
 	}
 
 	/* set pwm again (adjust current limit) */
 	setpwm(blmc.pwm);
 
 	/* calc rpm every second */
-	timer0_cnt++;
-	if (timer0_cnt == 50) {
-		timer0_cnt = 0;
+	rpm_cnt++;
+	if (rpm_cnt == 50) {
+		rpm_cnt = 0;
 
 		blmc.rpm = blmc.rpm_tmp;
 		blmc.rpm_tmp = 0;
@@ -127,27 +128,28 @@ ISR(TIMER0_OVF_vect)
 
 int main(void)
 {
-	DDRB = PHASE_H_MASK | LED_RT | LED_GN;
-	DDRD = PHASE_L_MASK;
+	DDRB = PHASE_A_EN | PHASE_A_PWM | LED_RT | LED_GN;
+	DDRD = PHASE_B_EN | PHASE_B_PWM | PHASE_C_EN | PHASE_C_PWM;
 
 	PORTB = 0x00;
 	PORTD = 0x00;
 
-	/* timer0: running with F_CPU/1024 */
-	TCCR0 = (1<<CS02) | (1<<CS00);
+	/* timer0: running with F_CPU, 8bit Phase Correct PWM (16kHz) */
+	TCCR0A = (1<<WGM00);
+	TCCR0B = (1<<CS00);
 
-	/* timer1: running with F_CPU, 8bit Phase Correct PWM (16kHz) */
-	TCCR1B = (1<<CS10);
-	TCCR1A = (1<<WGM10);
+	/* timer1: running with F_CPU/8 */
+	TCCR1B = (1<<CS11);
 
 	/* timer2: running with F_CPU, 8bit Phase Correct PWM (16kHz) */
-	TCCR2 = (1<<WGM20) | (1<<CS20);
+	TCCR2A = (1<<WGM20);
+	TCCR2B = (1<<CS20);
 
-	/* enable Timer0 OVF Interrupt */
-	TIMSK = (1<<TOIE0);
+	/* enable Timer1 OVF Interrupt */
+	TIMSK1 = (1<<TOIE1);
 
 	/* Enable Analog Comparator Multiplexer */
-	SFIOR |= (1<<ACME);
+	ADCSRB |= (1<<ACME);
 
 	/* I2C Init: keep Address from bootloader, Auto ACKs with Interrupts */
 	TWCR = (1<<TWEA) | (1<<TWEN) | (1<<TWIE);
diff --git a/main.h b/main.h
index fe8af71..0da4d67 100644
--- a/main.h
+++ b/main.h
@@ -9,4 +9,23 @@
 #define LED_RT		(1<<PORTB4)
 #define LED_GN		(1<<PORTB5)
 
+#define PHASE_A_EN	(1<<PORTB2)
+#define PHASE_A_PWM	(1<<PORTB3)
+#define PHASE_A_OC	(1<<COM2A1)
+
+#define PHASE_B_EN	(1<<PORTD7)
+#define PHASE_B_PWM	(1<<PORTD5)
+#define PHASE_B_OC	(1<<COM0B1)
+
+#define PHASE_C_EN	(1<<PORTD4)
+#define PHASE_C_PWM	(1<<PORTD3)
+#define PHASE_C_OC	(1<<COM2B1)
+
+#define SENSE_A		0
+#define SENSE_B		2
+#define SENSE_C		1
+
+#define SENSE_VOLTAGE	7
+#define SENSE_CURRENT	3
+
 #endif