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  1. /***************************************************************************
  2. * Copyright (C) 11/2014 by Olaf Rempel *
  3. * razzor@kopf-tisch.de *
  4. * *
  5. * This program is free software; you can redistribute it and/or modify *
  6. * it under the terms of the GNU General Public License as published by *
  7. * the Free Software Foundation; version 2 of the License, *
  8. * *
  9. * This program is distributed in the hope that it will be useful, *
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  12. * GNU General Public License for more details. *
  13. * *
  14. * You should have received a copy of the GNU General Public License *
  15. * along with this program; if not, write to the *
  16. * Free Software Foundation, Inc., *
  17. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  18. ***************************************************************************/
  19. #include <avr/io.h>
  20. #include <avr/interrupt.h>
  21. #include <avr/pgmspace.h>
  22. #include <util/crc16.h>
  23. #include "target.h"
  24. #include "rfm12_hw.h"
  25. #include "rfm12.h"
  26. /* *********************************************************************** */
  27. #define RFM12_PREAMBLE 0xAA
  28. #define RFM12_SYNC_LSB 0xD4
  29. #define RFM12_SYNC_MSB 0x2D
  30. #define RFM12_BASEBAND RFM12_BAND_868
  31. #define RFM12_XTAL_LOAD RFM12_XTAL_11_5PF
  32. #define RFM12_FREQUENCY_CALC RFM12_FREQUENCY_CALC_868
  33. #define RFM12_FREQUENCY 869800000UL
  34. #define RFM12_DATARATE RFM12_DATARATE_CALC_HIGH(19200.0)
  35. #define RFM12_FILTER_BW RFM12_RXCTRL_BW_400
  36. #define RFM12_LNA_GAIN RFM12_RXCTRL_LNA_6
  37. #define RFM12_RSSI_THRESHOLD RFM12_RXCTRL_RSSI_79
  38. #define RFM12_POWER RFM12_TXCONF_POWER_0
  39. #define RFM12_FSK_SHIFT 125000
  40. /* *********************************************************************** */
  41. #define RFM12_DATA_STATE_FREE 0x00
  42. #define RFM12_DATA_STATE_USED 0x01
  43. struct rfm12_data
  44. {
  45. uint8_t state; /* RFM12_DATA_STATE_* */
  46. struct rfm12_packet packet;
  47. };
  48. #define RFM12_CTX_STATE_INAVTIVE 0x00
  49. #define RFM12_CTX_STATE_RX_IDLE 0x01
  50. #define RFM12_CTX_STATE_RX_ACTIVE 0x02
  51. #define RFM12_CTX_STATE_TX_ACTIVE 0x03
  52. struct rfm12_context
  53. {
  54. uint8_t state; /* RFM12_CTX_STATE_* */
  55. uint8_t ch_free_ticks; /* number of ticks channel is unused */
  56. uint8_t own_address;
  57. uint8_t rx_idx_in; /* pkt receiving */
  58. uint8_t rx_idx_out; /* pkt given to app */
  59. uint8_t rx_checksum; /* receive checksum */
  60. uint8_t rx_data_idx; /* byte position inside rx[].packet */
  61. uint8_t tx_data_idx; /* byte position inside tx.packet */
  62. struct rfm12_data rx[2];
  63. struct rfm12_data tx;
  64. };
  65. static struct rfm12_context rfm12_ctx;
  66. /* *********************************************************************** */
  67. static uint16_t rfm12_data(uint16_t txdata)
  68. {
  69. uint16_t retval;
  70. RFM12_CS_ACTIVE();
  71. SPDR = (txdata >> 8);
  72. while (!(SPSR & (1<<SPIF)));
  73. retval = (SPDR << 8);
  74. SPDR = (txdata & 0xFF);
  75. while (!(SPSR & (1<<SPIF)));
  76. retval |= SPDR;
  77. RFM12_CS_INACTIVE();
  78. return retval;
  79. } /* rfm12_data */
  80. ISR(RFM12_INT_VECT)
  81. {
  82. uint16_t rfm12_status;
  83. uint8_t rfm12_reset_fifo = 0;
  84. uint8_t data;
  85. /* disable interrupt */
  86. RFM12_INT_OFF();
  87. /* clear interrupt flag */
  88. RFM12_INT_CLEAR();
  89. /* read upper status byte (interrupt flags) */
  90. rfm12_status = rfm12_data(RFM12_CMD_STATUS);
  91. /* FIFO interrupt */
  92. if (rfm12_status & RFM12_STATUS_FFIT)
  93. {
  94. switch (rfm12_ctx.state)
  95. {
  96. case RFM12_CTX_STATE_RX_IDLE:
  97. data = rfm12_data(RFM12_CMD_READ);
  98. /* check if buffer is free */
  99. if (rfm12_ctx.rx[rfm12_ctx.rx_idx_in].state != RFM12_DATA_STATE_FREE)
  100. {
  101. rfm12_reset_fifo = 1;
  102. break;
  103. }
  104. /* store first header byte */
  105. rfm12_ctx.rx[rfm12_ctx.rx_idx_in].packet.sync[RFM12_PKT_SYNC_SIZE] = data;
  106. /* store state */
  107. rfm12_ctx.state = RFM12_CTX_STATE_RX_ACTIVE;
  108. rfm12_ctx.rx_data_idx = 1;
  109. rfm12_ctx.rx_checksum = data;
  110. break;
  111. case RFM12_CTX_STATE_RX_ACTIVE:
  112. data = rfm12_data(RFM12_CMD_READ);
  113. /* check buffer size */
  114. if (rfm12_ctx.rx_data_idx >= (RFM12_PKT_HEADER_SIZE + RFM12_PKT_MAX_DATA_SIZE))
  115. {
  116. rfm12_reset_fifo = 1;
  117. break;
  118. }
  119. /* store data */
  120. (& rfm12_ctx.rx[rfm12_ctx.rx_idx_in].packet.sync[RFM12_PKT_SYNC_SIZE])[rfm12_ctx.rx_data_idx++] = data;
  121. /* calculate checksum */
  122. rfm12_ctx.rx_checksum ^= data;
  123. /* check if header address, data_length and checksum are ok */
  124. if ((rfm12_ctx.rx_data_idx == RFM12_PKT_HEADER_SIZE) &&
  125. ((rfm12_ctx.rx_checksum != 0xFF) ||
  126. (rfm12_ctx.rx[rfm12_ctx.rx_idx_in].packet.dest_address != rfm12_ctx.own_address) ||
  127. (rfm12_ctx.rx[rfm12_ctx.rx_idx_in].packet.source_address == rfm12_ctx.own_address) ||
  128. (rfm12_ctx.rx[rfm12_ctx.rx_idx_in].packet.data_length > RFM12_PKT_MAX_DATA_SIZE)
  129. ))
  130. {
  131. rfm12_reset_fifo = 1;
  132. break;
  133. }
  134. /* packet complete? */
  135. if (rfm12_ctx.rx_data_idx == (RFM12_PKT_HEADER_SIZE + rfm12_ctx.rx[rfm12_ctx.rx_idx_in].packet.data_length))
  136. {
  137. /* mark buffer as full */
  138. rfm12_ctx.rx[rfm12_ctx.rx_idx_in].state = RFM12_DATA_STATE_USED;
  139. /* switch to other buffer */
  140. rfm12_ctx.rx_idx_in ^= 1;
  141. /* receiving is complete, reset fifo anyway */
  142. rfm12_reset_fifo = 1;
  143. }
  144. break;
  145. case RFM12_CTX_STATE_TX_ACTIVE:
  146. /* send one additional byte! (<= not <) */
  147. if (rfm12_ctx.tx_data_idx <= (RFM12_PKT_SYNC_SIZE + RFM12_PKT_HEADER_SIZE + rfm12_ctx.tx.packet.data_length))
  148. {
  149. rfm12_data(RFM12_CMD_TX | rfm12_ctx.tx.packet.sync[rfm12_ctx.tx_data_idx++]);
  150. }
  151. else
  152. {
  153. /* enable RX */
  154. rfm12_data(RFM12_CMD_PWRMGT | RFM12_PWRMGT_ER | RFM12_PWRMGT_DC);
  155. /* TX dummy byte to clear interrupt */
  156. rfm12_data(RFM12_CMD_TX | RFM12_PREAMBLE);
  157. /* mark buffer as empty */
  158. rfm12_ctx.tx.state = RFM12_DATA_STATE_FREE;
  159. /* transmit is complete, reset fifo */
  160. rfm12_reset_fifo = 1;
  161. }
  162. break;
  163. default:
  164. rfm12_reset_fifo = 1;
  165. break;
  166. }
  167. if (rfm12_reset_fifo)
  168. {
  169. /* flush fifo and wait for sync pattern */
  170. rfm12_data(RFM12_CMD_FIFORESET | RFM12_FIFORESET_DR | (8<<4));
  171. rfm12_data(RFM12_CMD_FIFORESET | RFM12_FIFORESET_DR | (8<<4) | RFM12_FIFORESET_FF);
  172. /* wait for RX data */
  173. rfm12_ctx.state = RFM12_CTX_STATE_RX_IDLE;
  174. }
  175. }
  176. /* enable interrupt again */
  177. RFM12_INT_ON();
  178. } /* INT1_vect */
  179. void rfm12_tick(uint8_t channel_free_time)
  180. {
  181. uint16_t status;
  182. /* receiver not idle, come back later */
  183. if (rfm12_ctx.state != RFM12_CTX_STATE_RX_IDLE)
  184. {
  185. return;
  186. }
  187. RFM12_INT_OFF();
  188. status = rfm12_data(RFM12_CMD_STATUS);
  189. RFM12_INT_ON();
  190. /* check if module receives a carrier */
  191. if (status & RFM12_STATUS_RSSI)
  192. {
  193. rfm12_ctx.ch_free_ticks = 0;
  194. return;
  195. }
  196. else if (rfm12_ctx.ch_free_ticks <= channel_free_time)
  197. {
  198. rfm12_ctx.ch_free_ticks++;
  199. return;
  200. }
  201. if (rfm12_ctx.tx.state == RFM12_DATA_STATE_USED)
  202. {
  203. RFM12_INT_OFF();
  204. /* disable receiver */
  205. rfm12_data(RFM12_CMD_PWRMGT | RFM12_PWRMGT_DC);
  206. /* put preamble in fifo */
  207. rfm12_data(RFM12_CMD_TX | RFM12_PREAMBLE);
  208. rfm12_data(RFM12_CMD_TX | RFM12_PREAMBLE);
  209. /* start TX */
  210. rfm12_data(RFM12_CMD_PWRMGT | RFM12_PWRMGT_ET | RFM12_PWRMGT_DC);
  211. /* change state */
  212. rfm12_ctx.state = RFM12_CTX_STATE_TX_ACTIVE;
  213. rfm12_ctx.tx_data_idx = 0;
  214. RFM12_INT_ON();
  215. }
  216. } /* rfm12_tick */
  217. static uint16_t rfm12_calc_crc(const struct rfm12_packet *pkt)
  218. {
  219. uint16_t crc = 0x0000;
  220. uint8_t i;
  221. const uint8_t *tmp = pkt->data;
  222. for (i = 0; i < pkt->data_length; i++)
  223. crc = _crc_ccitt_update(crc, *tmp++);
  224. return crc;
  225. } /* pkt_check_crc */
  226. struct rfm12_packet * rfm12_get_txpkt(void)
  227. {
  228. if (rfm12_ctx.tx.state != RFM12_DATA_STATE_FREE)
  229. {
  230. return (void *)0;
  231. }
  232. return &rfm12_ctx.tx.packet;
  233. } /* rfm12_get_txpkt */
  234. uint8_t rfm12_start_tx(void)
  235. {
  236. struct rfm12_packet *pkt = &rfm12_ctx.tx.packet;
  237. if ((rfm12_ctx.tx.state != RFM12_DATA_STATE_FREE) &&
  238. (pkt->data_length > RFM12_PKT_MAX_DATA_SIZE)
  239. )
  240. {
  241. return 0;
  242. }
  243. /* calculate data crc */
  244. uint16_t *data_crc = (uint16_t *)(pkt->data + pkt->data_length);
  245. *data_crc = rfm12_calc_crc(pkt);
  246. pkt->data_length += 2;
  247. /* setup packet */
  248. pkt->sync[0] = RFM12_SYNC_MSB;
  249. pkt->sync[1] = RFM12_SYNC_LSB;
  250. pkt->source_address = rfm12_ctx.own_address;
  251. pkt->header_checksum = pkt->dest_address ^ pkt->source_address ^ pkt->data_length ^ 0xFF;
  252. /* change state */
  253. rfm12_ctx.tx.state = RFM12_DATA_STATE_USED;
  254. return 1;
  255. } /* rfm12_start_tx */
  256. struct rfm12_packet * rfm12_get_rxpkt(void)
  257. {
  258. if (rfm12_ctx.rx[rfm12_ctx.rx_idx_out].state != RFM12_DATA_STATE_USED)
  259. {
  260. return (void *)0;
  261. }
  262. /* calculate data crc */
  263. struct rfm12_packet *pkt = &rfm12_ctx.rx[rfm12_ctx.rx_idx_out].packet;
  264. pkt->data_length -= 2;
  265. uint16_t *data_crc = (uint16_t *)(pkt->data + pkt->data_length);
  266. if (*data_crc != rfm12_calc_crc(pkt))
  267. {
  268. rfm12_clear_rx();
  269. return (void *)0;
  270. }
  271. return pkt;
  272. } /* rfm12_get_rxpkt */
  273. void rfm12_clear_rx(void)
  274. {
  275. /* mark buffer as empty */
  276. rfm12_ctx.rx[rfm12_ctx.rx_idx_out].state = RFM12_DATA_STATE_FREE;
  277. /* switch to other buffer */
  278. rfm12_ctx.rx_idx_out ^= 1;
  279. } /* rfm12_clear_rx */
  280. static const uint16_t init_cmds[] PROGMEM =
  281. {
  282. /* set power default state (disable clock output) */
  283. (RFM12_CMD_PWRMGT | RFM12_PWRMGT_DC),
  284. /* dummy write after power management change, prevent lockup of module */
  285. (RFM12_CMD_TX),
  286. /* enable internal data register and fifo, setup selected band */
  287. (RFM12_CMD_CFG | RFM12_CFG_EL | RFM12_CFG_EF | RFM12_BASEBAND | RFM12_XTAL_LOAD),
  288. /* set frequency */
  289. (RFM12_CMD_FREQUENCY | RFM12_FREQUENCY_CALC(RFM12_FREQUENCY)),
  290. /* set data rate */
  291. (RFM12_CMD_DATARATE | RFM12_DATARATE),
  292. /* set rx parameters: vdi-out, bandwidth, LNA, RSSI */
  293. (RFM12_CMD_RXCTRL | RFM12_RXCTRL_P16_VDI | RFM12_RXCTRL_VDI_FAST | RFM12_FILTER_BW | RFM12_LNA_GAIN | RFM12_RSSI_THRESHOLD),
  294. /* automatic clock lock control, digital Filter,
  295. * Data quality detector value 3, slow clock recovery lock
  296. */
  297. (RFM12_CMD_DATAFILTER | RFM12_DATAFILTER_AL | 3),
  298. /* 2 Byte Sync Pattern, Start fifo fill when sychron pattern received,
  299. * disable sensitive reset, Fifo filled interrupt at 8 bits
  300. */
  301. (RFM12_CMD_FIFORESET | RFM12_FIFORESET_DR | (8<<4)),
  302. /* set AFC to automatic, (+4 or -3)*2.5kHz Limit, fine mode, active and enabled */
  303. (RFM12_CMD_AFC | RFM12_AFC_AUTO_KEEP | RFM12_AFC_LIMIT_4 | RFM12_AFC_FI | RFM12_AFC_OE | RFM12_AFC_EN),
  304. /* set TX Power, frequency shift */
  305. (RFM12_CMD_TXCONF | RFM12_POWER | RFM12_TXCONF_FS_CALC(RFM12_FSK_SHIFT)),
  306. /* disable low dutycycle mode */
  307. (RFM12_CMD_DUTYCYCLE),
  308. /* disable wakeup timer */
  309. (RFM12_CMD_WAKEUP),
  310. /* enable rf receiver chain */
  311. (RFM12_CMD_PWRMGT | RFM12_PWRMGT_ER | RFM12_PWRMGT_DC),
  312. /* flush fifo, start receiving */
  313. (RFM12_CMD_FIFORESET | RFM12_FIFORESET_DR | (8<<4)),
  314. (RFM12_CMD_FIFORESET | RFM12_FIFORESET_DR | (8<<4) | RFM12_FIFORESET_FF),
  315. };
  316. void rfm12_init(uint8_t own_address)
  317. {
  318. uint8_t i;
  319. /* init chipselect GPIO */
  320. RFM12_CS_INIT();
  321. RFM12_CS_INACTIVE();
  322. /* init internal SPI */
  323. RFM12_SPI_INIT();
  324. /* send init commands */
  325. for (i = 0; i < ( sizeof(init_cmds) / 2) ; i++)
  326. {
  327. rfm12_data(pgm_read_word(&init_cmds[i]));
  328. }
  329. /* store own address */
  330. rfm12_ctx.own_address = own_address;
  331. rfm12_ctx.state = RFM12_CTX_STATE_RX_IDLE;
  332. /* initalize & activate interrupt */
  333. RFM12_INT_INIT();
  334. RFM12_INT_CLEAR();
  335. RFM12_INT_ON();
  336. } /* rfm12_init */