add new hardware
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20
Makefile
20
Makefile
@ -7,24 +7,34 @@ SIZE := avr-size
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TARGET = ispprog
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SOURCE = $(wildcard *.c)
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# select MCU
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MCU = atmega16
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#CONFIG = ispprog
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CONFIG = ispprog2
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AVRDUDE_PROG := -c butterfly -b 19200 -P /dev/ttyUSB0
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#AVRDUDE_PROG := -c dragon_isp -P usb
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# ---------------------------------------------------------------------------
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ifeq ($(MCU), atmega16)
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# (ext. crystal)
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ifeq ($(CONFIG), ispprog)
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# (7.3728MHz ext. crystal)
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AVRDUDE_MCU=m16
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AVRDUDE_FUSES=lfuse:w:0xff:m hfuse:w:0xda:m
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MCU=atmega16
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endif
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ifeq ($(CONFIG), ispprog2)
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# (8MHz int. osc, 2.7V BOD)
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AVRDUDE_MCU=m328p -F
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AVRDUDE_FUSES=lfuse:w:0xe2:m hfuse:w:0xdc:m efuse:w:0x02:m
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MCU = atmega328p
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endif
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# ---------------------------------------------------------------------------
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CFLAGS = -pipe -g -Os -mmcu=$(MCU) -Wall -fdata-sections -ffunction-sections
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CFLAGS += -Wa,-adhlns=$(*F).lst
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CFLAGS += -Wa,-adhlns=$(*F).lst -DCONFIG_$(CONFIG)=1
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LDFLAGS = -Wl,-Map,$(@:.elf=.map),--cref,--relax,--gc-sections
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# ---------------------------------------------------------------------------
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155
ispprog.c
155
ispprog.c
@ -27,12 +27,13 @@
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#define ARRAY_SIZE(x) (sizeof(x) / sizeof(*x))
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/* *********************************************************************** */
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#if defined(CONFIG_ispprog)
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/*
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* using ATmega16 @7.3728MHz:
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* Fuse H: 0xDA (512 words bootloader, jtag disabled)
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* Fuse L: 0xFF (ext. Crystal)
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*/
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#define F_CPU 7372800
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#define BAUDRATE 115200
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#define TIMER_RELOAD (0xFF - 72) /* 10ms @7.3728MHz */
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@ -44,6 +45,72 @@
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#define ISP_SCK PORTB7 /* to target */
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#define RESET_IN PORTD3 /* high active */
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#define ISP_INACTIVE() { /* ISP_SCK, ISP_MOSI and ISP_RESET are inputs */ \
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DDRB &= ~((1<<ISP_SCK) | (1<<ISP_MOSI) | (1<<ISP_RESET)); \
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PORTB |= (1<<ISP_RESET); \
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};
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#define ISP_ACTIVE() { /* ISP_SCK, ISP_MOSI and ISP_RESET are outputs, set ISP_RESET low */ \
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DDRB |= ((1<<ISP_SCK) | (1<<ISP_MOSI) | (1<<ISP_RESET)); \
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PORTB &= ~(1<<ISP_RESET); \
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};
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#define ISP_LED_ON() { PORTB &= ~(1<<ISP_LED); };
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#define ISP_LED_OFF() { PORTB |= (1<<ISP_LED); };
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#define ISP_CHECK() (PIND & (1<<RESET_IN))
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#define GPIO_INIT() { /* ISP_RESET and ISP_LED are outputs, pullup SlaveSelect */ \
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PORTB = (1<<ISP_RESET) | (1<<ISP_LED) | (1<<PORTB4); \
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DDRB = (1<<ISP_RESET) | (1<<ISP_LED); \
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};
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/* *********************************************************************** */
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#elif defined(CONFIG_ispprog2)
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/*
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* using ATmega328P @8MHz:
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* Fuse E: 0xFA (2.7V BOD)
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* Fuse H: 0xDC (512 words bootloader)
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* Fuse L: 0xE2 (internal osc)
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*/
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#define F_CPU 8000000
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#define BAUDRATE 115200
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#define TIMER_RELOAD (0xFF - 78) /* 10ms @8MHz */
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/* trim internal oscillator to get "good" baudrate */
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#define OSCCAL_VALUE 0x80
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#define ISP_RESET PORTB2 /* to target */
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#define ISP_LED PORTB0 /* high active */
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#define ISP_MOSI PORTB3 /* to target */
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#define ISP_MISO PORTB4 /* to target */
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#define ISP_SCK PORTB5 /* to target */
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#define RESET_IN PORTB1 /* low active */
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#define ISP_INACTIVE() { /* ISP_SCK, ISP_MOSI and ISP_RESET are inputs */ \
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DDRB &= ~((1<<ISP_SCK) | (1<<ISP_MOSI) | (1<<ISP_RESET)); \
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PORTB |= (1<<ISP_RESET); \
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};
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#define ISP_ACTIVE() { /* ISP_SCK, ISP_MOSI and ISP_RESET are outputs, set ISP_RESET low */ \
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DDRB |= ((1<<ISP_SCK) | (1<<ISP_MOSI) | (1<<ISP_RESET)); \
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PORTB &= ~(1<<ISP_RESET); \
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};
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#define ISP_LED_ON() { PORTB |= (1<<ISP_LED); };
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#define ISP_LED_OFF() { PORTB &= ~(1<<ISP_LED); };
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#define ISP_CHECK() !(PINB & (1<<RESET_IN))
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#define GPIO_INIT() { /* ISP_RESET and ISP_LED are outputs, pullup RESET_IN and SlaveSelect */ \
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PORTB = (1<<ISP_RESET) | (1<<RESET_IN) | (1<<PORTB2); \
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DDRB = (1<<ISP_RESET) | (1<<ISP_LED); \
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};
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/* *********************************************************************** */
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#else
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#error "unknown CONFIG"
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#endif
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/* *********************************************************************** */
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#include <util/delay.h>
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#define UART_CALC_BAUDRATE(baudRate) (((uint32_t)F_CPU) / (((uint32_t)baudRate)*16) -1)
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@ -255,8 +322,13 @@ static void nvram_start_write(void)
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uint16_t crc = 0x0000;
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uint8_t *tmp = (uint8_t *)&nvram_data;
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#if defined(__AVR_ATmega16__)
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if (EECR & (1<<EEWE))
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return;
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#elif defined(__AVR_ATmega328P__)
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if (EECR & (1<<EEPE))
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return;
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#endif
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nvram_data.nvram_size = sizeof(struct _nvdata);
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@ -271,21 +343,35 @@ static void nvram_start_write(void)
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EEARH = 0x00;
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EEDR = ((uint8_t *)&nvram_data)[nvram_write_pos++];
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cli();
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#if defined(__AVR_ATmega16__)
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EECR |= (1<<EEMWE);
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EECR |= (1<<EEWE);
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#elif defined(__AVR_ATmega328P__)
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EECR |= (1<<EEMPE);
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EECR |= (1<<EEPE);
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#endif
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EECR |= (1<<EERIE);
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sei();
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}
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/* store nvram data to eeprom */
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#if defined(__AVR_ATmega16__)
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ISR(EE_RDY_vect)
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#elif defined(__AVR_ATmega328P__)
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ISR(EE_READY_vect)
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#endif
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{
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if (nvram_write_pos < sizeof(struct _nvdata)) {
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EEARL = nvram_write_pos;
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EEARH = 0x00;
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EEDR = ((uint8_t *)&nvram_data)[nvram_write_pos++];
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#if defined(__AVR_ATmega16__)
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EECR |= (1<<EEMWE);
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EECR |= (1<<EEWE);
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#elif defined(__AVR_ATmega328P__)
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EECR |= (1<<EEMPE);
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EECR |= (1<<EEPE);
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#endif
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EECR |= (1<<EERIE);
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} else {
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@ -313,7 +399,7 @@ static void nvram_read(void)
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}
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}
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static volatile uint8_t led_mode;
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static volatile uint8_t led_mode = LED_OFF;
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static uint8_t last_cmd;
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static uint8_t last_val;
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@ -322,15 +408,25 @@ static uint16_t last_addr;
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/* Send one byte to PC */
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static void ser_send(uint8_t data)
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{
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loop_until_bit_is_set(UCSRA, UDRIE);
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#if defined(__AVR_ATmega16__)
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loop_until_bit_is_set(UCSRA, UDRE);
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UDR = data;
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#elif defined(__AVR_ATmega328P__)
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loop_until_bit_is_set(UCSR0A, UDRE0);
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UDR0 = data;
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#endif
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}
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/* Receive one byte from PC */
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static uint8_t ser_recv(void)
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{
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#if defined(__AVR_ATmega16__)
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loop_until_bit_is_set(UCSRA, RXC);
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return UDR;
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#elif defined(__AVR_ATmega328P__)
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loop_until_bit_is_set(UCSR0A, RXC0);
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return UDR0;
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#endif
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}
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/* Send one byte to target, and return received one */
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@ -345,14 +441,9 @@ static uint8_t spi_rxtx(uint8_t val)
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static void set_reset(uint8_t mode)
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{
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if (mode) {
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/* ISP_SCK, ISP_MOSI and ISP_RESET are inputs */
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DDRB &= ~((1<<ISP_SCK) | (1<<ISP_MOSI) | (1<<ISP_RESET));
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PORTB |= (1<<ISP_RESET);
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ISP_INACTIVE();
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} else {
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/*ISP_SCK, ISP_MOSI and ISP_RESET are outputs, set ISP_RESET low */
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DDRB |= ((1<<ISP_SCK) | (1<<ISP_MOSI) | (1<<ISP_RESET));
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PORTB &= ~(1<<ISP_RESET);
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ISP_ACTIVE();
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}
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}
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@ -967,7 +1058,7 @@ ISR(TIMER0_OVF_vect)
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TCNT0 = TIMER_RELOAD;
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static uint8_t prev_pressed;
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if (PIND & (1<<RESET_IN)) {
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if (ISP_CHECK()) {
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if (!prev_pressed) {
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event = EV_BUTTON_PRESSED;
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prev_pressed = 1;
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@ -1002,19 +1093,37 @@ ISR(TIMER0_OVF_vect)
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static uint8_t led_timer;
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if (led_mode & ((led_timer++ & 0xFF) | 0x80)) {
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PORTB &= ~(1<<ISP_LED);
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ISP_LED_ON();
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} else {
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PORTB |= (1<<ISP_LED);
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ISP_LED_OFF();
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}
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}
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#if defined(__AVR_ATmega328P__)
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/*
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* For newer devices the watchdog timer remains active even after a
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* system reset. So disable it as soon as possible.
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* automagically called on startup
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*/
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void disable_wdt_timer(void) __attribute__((naked, section(".init3")));
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void disable_wdt_timer(void)
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{
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MCUSR = 0;
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WDTCSR = (1<<WDCE) | (1<<WDE);
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WDTCSR = (0<<WDE);
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}
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#endif
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int main(void) __attribute__ ((noreturn));
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int main(void)
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{
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/* ISP_RESET and ISP_LED are outputs, pullup SlaveSelect */
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PORTB = (1<<ISP_RESET) | (1<<ISP_LED) | (1<<PORTB4);
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DDRB = (1<<ISP_RESET) | (1<<ISP_LED);
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GPIO_INIT();
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#if defined(OSCCAL_VALUE)
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OSCCAL = OSCCAL_VALUE;
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#endif /* defined(OSCCAL_VALUE) */
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#if defined(__AVR_ATmega16__)
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/* Set baud rate */
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UBRRH = (UART_CALC_BAUDRATE(BAUDRATE)>>8) & 0xFF;
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UBRRL = (UART_CALC_BAUDRATE(BAUDRATE) & 0xFF);
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@ -1022,6 +1131,15 @@ int main(void)
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/* enable usart with 8n1 */
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UCSRB = (1<<TXEN) | (1<<RXEN);
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UCSRC = (1<<URSEL) | (1<<UCSZ1) | (1<<UCSZ0);
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#elif defined(__AVR_ATmega328P__)
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/* Set baud rate */
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UBRR0H = (UART_CALC_BAUDRATE(BAUDRATE)>>8) & 0xFF;
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UBRR0L = (UART_CALC_BAUDRATE(BAUDRATE) & 0xFF);
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/* enable usart with 8n1 */
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UCSR0B = (1<<TXEN0) | (1<<RXEN0);
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UCSR0C = (1<<UCSZ01) | (1<<UCSZ00);
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#endif
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/* read stored parameters */
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nvram_read();
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@ -1029,9 +1147,14 @@ int main(void)
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/* enable SPI master mode */
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SPCR = nvram_data.spi_mode;
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#if defined(__AVR_ATmega16__)
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/* timer0, FCPU/1024, overflow interrupt */
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TCCR0 = (1<<CS02) | (1<<CS00);
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TIMSK = (1<<TOIE0);
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#elif defined(__AVR_ATmega328P__)
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TCCR0B = (1<<CS02) | (1<<CS00);
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TIMSK0 = (1<<TOIE0);
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#endif
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sei();
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