AVR ISP adapter (avr109/910 compatible, using ATmega16)
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  1. #ifndef TARGET_H_
  2. #define TARGET_H_
  3. /* *********************************************************************** */
  4. #if defined(CONFIG_ispprog)
  5. /*
  6. * using ATmega16 @7.3728MHz:
  7. * Fuse H: 0xDA (512 words bootloader, jtag disabled)
  8. * Fuse L: 0xFF (ext. Crystal)
  9. */
  10. #define F_CPU 7372800ULL
  11. #define BAUDRATE 115200
  12. #define ISP_RESET PORTB1 /* to target */
  13. #define ISP_LED PORTB3 /* low active */
  14. #define ISP_MOSI PORTB5 /* to target */
  15. #define ISP_MISO PORTB6 /* to target */
  16. #define ISP_SCK PORTB7 /* to target */
  17. #define RESET_IN PORTD3 /* high active */
  18. #define RESET_INACTIVE(){ PORTB |= (1<<ISP_RESET); }
  19. #define RESET_ACTIVE() { PORTB &= ~(1<<ISP_RESET); }
  20. #define ISP_INACTIVE() { /* ISP_SCK and ISP_MOSI are inputs */ \
  21. DDRB &= ~((1<<ISP_SCK) | (1<<ISP_MOSI)); \
  22. };
  23. #define ISP_ACTIVE() { /* ISP_SCK and ISP_MOSI are outputs */ \
  24. DDRB |= ((1<<ISP_SCK) | (1<<ISP_MOSI)); \
  25. };
  26. #define ISP_LED_ON() { PORTB &= ~(1<<ISP_LED); };
  27. #define ISP_LED_OFF() { PORTB |= (1<<ISP_LED); };
  28. #define ISP_CHECK() (PIND & (1<<RESET_IN))
  29. #define USE_DISPLAY 0
  30. #define USE_TWI_SUPPORT 0
  31. #define TIMER_DIVISOR 1024
  32. #define TIMER_INIT() { /* timer0, FCPU/1024, overflow interrupt */ \
  33. TCCR0 = (1<<CS02) | (1<<CS00); \
  34. TIMSK = (1<<TOIE0); \
  35. }
  36. #define GPIO_INIT() { /* ISP_RESET and ISP_LED are outputs, pullup SlaveSelect */ \
  37. PORTB = (1<<ISP_RESET) | (1<<ISP_LED) | (1<<PORTB4); \
  38. DDRB = (1<<ISP_RESET) | (1<<ISP_LED); \
  39. };
  40. /* *********************************************************************** */
  41. #elif defined(CONFIG_ispprog2)
  42. /*
  43. * using ATmega328P @8MHz:
  44. * Fuse E: 0xFA (2.7V BOD)
  45. * Fuse H: 0xDC (512 words bootloader)
  46. * Fuse L: 0xE2 (internal osc)
  47. */
  48. #define F_CPU 8000000ULL
  49. #define BAUDRATE 115200
  50. /* trim internal oscillator to get "good" baudrate */
  51. #define OSCCAL_VALUE 0x80
  52. #define ISP_RESET PORTB2 /* to target */
  53. #define ISP_LED PORTB0 /* high active */
  54. #define ISP_MOSI PORTB3 /* to target */
  55. #define ISP_MISO PORTB4 /* to target */
  56. #define ISP_SCK PORTB5 /* to target */
  57. #define RESET_IN PORTB1 /* low active */
  58. #define RESET_INACTIVE(){ PORTB |= (1<<ISP_RESET); }
  59. #define RESET_ACTIVE() { PORTB &= ~(1<<ISP_RESET); }
  60. #define ISP_INACTIVE() { /* ISP_SCK and ISP_MOSI are inputs */ \
  61. DDRB &= ~((1<<ISP_SCK) | (1<<ISP_MOSI)); \
  62. };
  63. #define ISP_ACTIVE() { /* ISP_SCK and ISP_MOSI and ISP_RESET are outputs */ \
  64. DDRB |= ((1<<ISP_SCK) | (1<<ISP_MOSI)); \
  65. };
  66. #define ISP_LED_ON() { PORTB |= (1<<ISP_LED); };
  67. #define ISP_LED_OFF() { PORTB &= ~(1<<ISP_LED); };
  68. #define ISP_CHECK() !(PINB & (1<<RESET_IN))
  69. /* DL1414 display */
  70. #define USE_DISPLAY 1
  71. #define DISP_WR PORTC2 /* low active */
  72. #define DISP_A0 PORTC0
  73. #define DISP_A1 PORTC1
  74. #define DISP_D0 PORTC3
  75. #define DISP_D1 PORTD2
  76. #define DISP_D2 PORTD3
  77. #define DISP_D3 PORTD4
  78. #define DISP_D4 PORTD5
  79. #define DISP_D5 PORTD6
  80. #define DISP_D6 PORTD7
  81. #define USE_TWI_SUPPORT 1
  82. #define TIMER_DIVISOR 1024
  83. #define TIMER_INIT() { /* timer0, FCPU/1024, overflow interrupt */ \
  84. TCCR0B = (1<<CS02) | (1<<CS00); \
  85. TIMSK0 = (1<<TOIE0); \
  86. }
  87. #define GPIO_INIT() { /* ISP_RESET and ISP_LED are outputs, pullup RESET_IN and SlaveSelect */ \
  88. PORTB = (1<<ISP_RESET) | (1<<RESET_IN) | (1<<PORTB2); \
  89. DDRB = (1<<ISP_RESET) | (1<<ISP_LED); \
  90. \
  91. /* all DISP_* pins are outputs, DISP_WR is high */ \
  92. DDRC = (1<<DISP_WR) | (1<<DISP_A0) | (1<<DISP_A1) | (1<<DISP_D0); \
  93. PORTC = (1<<DISP_WR); \
  94. DDRD = 0xFC; \
  95. };
  96. /* *********************************************************************** */
  97. #else
  98. #error "unknown CONFIG"
  99. #endif
  100. /* *********************************************************************** */
  101. #endif /* TARGET_H_ */