314 lines
11 KiB
C
314 lines
11 KiB
C
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/***************************************************************************
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* nvram parameter read/write *
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* *
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* Copyright (C) 2011 - 2012 by Olaf Rempel *
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* razzor AT kopf MINUS tisch DOT de *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; version 2 of the License, *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <string.h>
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#include "rgb16mpm.h"
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/* 16 values per color */
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uint8_t chan_value[3][16];
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/* (16 +1) * 4 values (portA, portC, OCR0, flags) per color */
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static uint8_t chan_rawdata[3][17 * 4];
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/* used only in softpwm ISRs */
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register uint8_t * pCurrentStep asm("r2"); /* r3:r2 */
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/* used to sync softpwm ISRs and color_update() */
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register uint8_t nextColor asm("r4"); /* r4 */
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/* worst case: 9+2+12+8+7+13 = 61 clks -> 7.625us @8MHz */
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ISR(TIMER0_OVF_vect, ISR_NAKED)
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{
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asm volatile(
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/* save registers 2+1+2+2+2 = 9 */
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"push r24 \n\t"
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"in r24, __SREG__ \n\t"
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"push r24 \n\t"
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"push r30 \n\t"
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"push r31 \n\t"
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::
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);
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asm volatile(
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/* disable outputs 1+1 = 2 */
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"out %0, r1 \n\t" /* PORTA = 0x00; */
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"out %1, r1 \n\t" /* PORTC = 0x00; */
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:: "I" (_SFR_IO_ADDR(PORTA)),
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"I" (_SFR_IO_ADDR(PORTC))
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);
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asm volatile(
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/* switch color and assign pCurrentStep */ // R G B
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"mov r24, %0 \n\t" // 1 1 1
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"inc %0 \n\t" /* nextColor++ */ // 2 2 2
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"cpi r24, 1 \n\t" // 3 3 3
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"brlo L_red%= \n\t" /* if (nextColor < 1) -> red */ // 5 4 4
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"breq L_green%= \n\t" /* if (nextColor == 1) -> green */ // - 6 5
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"clr %0 \n\t" /* nextColor = 0; */ // - - 6
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"ldi r24, %7 \n\t" /* PORTB = (1<<ROW4); */ // - - 7
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"ldi r30, lo8(%3) \n\t" /* pCurrentStep = &rawdata[2]; */ // - - 8
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"ldi r31, hi8(%3) \n\t" // - - 9
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"rjmp L_end%= \n\t" // - - 11
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"L_red%=: \n\t" /* red: */
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"ldi r24, %5 \n\t" /* PORTB = (1<<ROW1); */ // 6 - -
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"ldi r30, lo8(%1) \n\t" /* pCurrentStep = &rawdata[0]; */ // 7 - -
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"ldi r31, hi8(%1) \n\t" // 8 - -
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"rjmp L_end%= \n\t" // 10 - -
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"L_green%=: \n\t" /* green: */
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"ldi r24, %6 \n\t" /* PORTB = (1<<ROW2); */ // - 7 -
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"ldi r30, lo8(%2) \n\t" /* pCurrentStep = &rawdata[1]; */ // - 8 -
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"ldi r31, hi8(%2) \n\t" // - 9 -
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"L_end%=: \n\t"
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"out %4, r24 \n\t" /* set PORTB */ // 11 10 12
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:: "r" (nextColor),
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"i" (&chan_rawdata[0]), /* RED */
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"i" (&chan_rawdata[1]), /* GREEN */
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"i" (&chan_rawdata[2]), /* BLUE */
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"I" (_SFR_IO_ADDR(PORTB)),
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"i" ((1<<ROW1)), /* RED */
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"i" ((1<<ROW2)), /* GREEN */
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"i" ((1<<ROW3)) /* BLUE */
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);
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asm volatile(
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/* load table values 1+1+1+1+1+1+1+1+1 = 8 */
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"ld r24, z+ \n\t"
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"out %1, r24 \n\t" /* PORTA = *pCurrentStep++; */
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"ld r24, z+ \n\t"
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"out %2, r24 \n\t" /* PORTC = *pCurrentStep++; */
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"ld r24, z+ \n\t"
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"out %3, r24 \n\t" /* OCR0 = *pCurrentStep++; */
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"ld r24, z+ \n\t"
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"movw %0, r30 \n\t"
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:: "r" (pCurrentStep),
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"I" (_SFR_IO_ADDR(PORTA)),
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"I" (_SFR_IO_ADDR(PORTC)),
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"I" (_SFR_IO_ADDR(OCR0))
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);
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asm volatile(
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/* check if IRQ must be enabled 1+1+1+1+1+1+1 = 3/7 */
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"or r24, r24 \n\t" /* if (*pCurrentStep++) { */
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"breq L_skip%= \n\t"
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"ldi r24, %1 \n\t" /* TIFR = (1<<OCF0); */
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"out %0, r24 \n\t"
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"in r24, %2 \n\t" /* TIMSK |= (1<<OCIE0); */
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"ori r24, %3 \n\t"
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"out %2, r24 \n\t"
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"L_skip%=: \n\t" /* } */
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:: "I" (_SFR_IO_ADDR(TIFR)),
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"M" ((1<<OCF0)),
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"I" (_SFR_IO_ADDR(TIMSK)),
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"M" ((1<<OCIE0))
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);
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asm volatile(
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/* restore registers 2+2+2+1+2+4 = 13 */
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"pop r31 \n\t"
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"pop r30 \n\t"
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"pop r24 \n\t"
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"out __SREG__, r24 \n\t"
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"pop r24 \n\t"
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"reti \n\t"
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::
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);
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}
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/* worst case: 9+9+5+13 = 36 clks -> 4.5us @ 8MHz */
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ISR(TIMER0_COMP_vect, ISR_NAKED)
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{
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asm volatile(
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/* save registers 2+1+2+2+2 = 9 */
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"push r24 \n\t"
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"in r24, __SREG__ \n\t"
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"push r24 \n\t"
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"push r30 \n\t"
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"push r31 \n\t"
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::
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);
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asm volatile(
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/* load table values 1+1+1+1+1+1+1+1+1 = 9 */
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"movw r30, %0 \n\t"
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"ld r24, z+ \n\t"
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"out %1, r24 \n\t" /* PORTA = *pCurrentStep++; */
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"ld r24, z+ \n\t"
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"out %2, r24 \n\t" /* PORTC = *pCurrentStep++; */
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"ld r24, z+ \n\t"
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"out %3, r24 \n\t" /* OCR0 = *pCurrentStep++; */
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"ld r24, z+ \n\t"
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"movw %0, r30 \n\t"
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:: "r" (pCurrentStep),
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"I" (_SFR_IO_ADDR(PORTA)),
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"I" (_SFR_IO_ADDR(PORTC)),
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"I" (_SFR_IO_ADDR(OCR0))
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);
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asm volatile(
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/* check if IRQ must be disabled 1+1+1+1+1 = 3/5 */
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"or r24, r24 \n\t" /* if (!(*pCurrentStep++)) { */
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"brne L_skip%= \n\t"
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"in r24, %0 \n\t" /* TIMSK &= ~(1<<OCIE0); */
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"andi r24, %1 \n\t"
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"out %0, r24 \n\t"
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"L_skip%=: \n\t" /* } */
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:: "I" (_SFR_IO_ADDR(TIMSK)),
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"M" (0xFD) /* ~(1<<OCIE0) */
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);
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asm volatile(
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/* restore registers 2+2+2+1+2+4 = 13 */
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"pop r31 \n\t"
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"pop r30 \n\t"
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"pop r24 \n\t"
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"out __SREG__, r24 \n\t"
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"pop r24 \n\t"
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"reti \n\t"
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::
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);
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}
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/* calc chan_valueX => chan_rawdataX */
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static void calculate_timer_values(uint8_t *value, uint8_t *pDataStart)
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{
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uint8_t *pData = pDataStart +4; /* skip first entry (init) */
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uint8_t index = 0;
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uint16_t chan_used = 0xFFFF;
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uint16_t chan_init = 0xFFFF;
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/* loop until all channels are calculated */
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while (chan_used) {
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uint8_t i;
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uint8_t min_value = 0xFF;
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uint16_t chan_tmp = chan_used;
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uint16_t chan_mask = 0x0001;
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for (i = 0; i < 16; i++) {
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/* skip if channel already used */
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if (chan_used & chan_mask)
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{
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/* channel is not used (value 0x00) */
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if (value[i] == 0x00) {
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chan_init &= (~chan_mask);
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chan_used &= (~chan_mask);
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/* found a new lower value */
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} else if (value[i] < min_value) {
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min_value = value[i];
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chan_tmp = chan_used & (~chan_mask);
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/* found another value with the same value */
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} else if (value[i] == min_value) {
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chan_tmp &= (~chan_mask);
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}
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}
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chan_mask <<= 1;
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}
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chan_used &= chan_tmp;
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if (min_value < 0xFF) {
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/* set new outputs */
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*pData++ = (chan_used & 0xFF); /* PORTA */
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*pData++ = ((chan_used >> 8) & 0xFF); /* PORTC */
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/* previous step needs timervalue and enable IRQ */
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*(pData++ -4) = min_value; /* OCR0 */
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*(pData++ -4) = 0x01; /* flags */
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}
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index++;
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}
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/* fill all remaining slots */
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while (index < 16) {
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/* repeat enabled outputs */
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*pData++ = (chan_used & 0xFF); /* PORTA */
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*pData++ = ((chan_used >> 8) & 0xFF); /* PORTC */
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/* previous step was last one (no timevalue / disable IRQ) */
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*(pData++ -4) = 0x00; /* OCR0 */
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*(pData++ -4) = 0x00; /* flags */
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index++;
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}
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/* first slot/init: enable only channels that are > 0 */
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pData = pDataStart;
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*pData++ = (chan_init & 0xFF); /* PORTA */
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*pData++ = ((chan_init >> 8) & 0xFF); /* PORTC */
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}
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uint8_t rgb_update(uint8_t dirty_mask, uint8_t blocking)
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{
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static uint8_t chan_dirty;
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chan_dirty |= (dirty_mask & COLOR_MASK);
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do {
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if ((chan_dirty & (1<<COLOR_RED)) && (nextColor == COLOR_BLUE)) {
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calculate_timer_values(chan_value[COLOR_RED], chan_rawdata[COLOR_RED]);
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chan_dirty &= ~(1<<COLOR_RED);
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} else if ((chan_dirty & (1<<COLOR_GREEN)) && (nextColor == COLOR_RED)) {
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calculate_timer_values(chan_value[COLOR_GREEN], chan_rawdata[COLOR_GREEN]);
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chan_dirty &= ~(1<<COLOR_GREEN);
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} else if ((chan_dirty & (1<<COLOR_BLUE)) && (nextColor == COLOR_GREEN)) {
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calculate_timer_values(chan_value[COLOR_BLUE], chan_rawdata[COLOR_BLUE]);
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chan_dirty &= ~(1<<COLOR_BLUE);
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} else if (!blocking) {
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break;
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}
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} while (chan_dirty);
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return chan_dirty;
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}
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void rgb_init(void)
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{
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/* 16 PWM Outputs */
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PORTA = 0x00;
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DDRA = 0xFF;
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PORTC = 0x00;
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DDRC = 0xFF;
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/* color ROWs */
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PORTB &= ~((1<<ROW1) | (1<<ROW2) | (1<<ROW3) | (1<<ROW4));
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DDRB |= (1<<ROW1) | (1<<ROW2) | (1<<ROW3) | (1<<ROW4);
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/* timer0, FCPU/64, overflow interrupt */
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TCCR0 = (1<<CS01) | (1<<CS00); /* FCPU/64 */
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TIMSK = (1<<TOIE0);
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/* load initial values from eeprom */
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memcpy(chan_value, nvram_data.initialRGB, sizeof(chan_value));
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}
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