MPM controlled 16ch RGB LED dimmer
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  1. /***************************************************************************
  2. * nvram parameter read/write *
  3. * *
  4. * Copyright (C) 2011 - 2012 by Olaf Rempel *
  5. * razzor AT kopf MINUS tisch DOT de *
  6. * *
  7. * This program is free software; you can redistribute it and/or modify *
  8. * it under the terms of the GNU General Public License as published by *
  9. * the Free Software Foundation; version 2 of the License, *
  10. * *
  11. * This program is distributed in the hope that it will be useful, *
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  14. * GNU General Public License for more details. *
  15. * *
  16. * You should have received a copy of the GNU General Public License *
  17. * along with this program; if not, write to the *
  18. * Free Software Foundation, Inc., *
  19. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  20. ***************************************************************************/
  21. #include <avr/io.h>
  22. #include <avr/interrupt.h>
  23. #include <avr/pgmspace.h>
  24. #include <avr/eeprom.h>
  25. #include <util/crc16.h>
  26. #include "rgb16mpm.h"
  27. static uint16_t nvram_write_pos;
  28. struct _nvdata nvram_data;
  29. static struct _nvdata nvram_eeprom EEMEM = NVRAM_DEFAULTS;
  30. static struct _nvdata nvram_defaults PROGMEM = NVRAM_DEFAULTS;
  31. /* store nvram data to eeprom */
  32. ISR(EE_RDY_vect) {
  33. EECR &= ~(1<<EERIE);
  34. sei();
  35. if (nvram_write_pos < sizeof(struct _nvdata)) {
  36. /* not a function: shorter IRQ entry (fast IRQ re-enable) */
  37. EEARL = (nvram_write_pos & 0xFF);
  38. EEARH = (nvram_write_pos >> 8) & 0xFF;
  39. EEDR = ((uint8_t *)&nvram_data)[nvram_write_pos++];
  40. cli();
  41. EECR |= (1<<EEMWE);
  42. EECR |= (1<<EEWE);
  43. sei();
  44. EECR |= (1<<EERIE);
  45. }
  46. }
  47. /* create crc and store nvram data to eeprom */
  48. void eeprom_write(void)
  49. {
  50. uint8_t i;
  51. uint16_t crc = 0x0000;
  52. uint8_t *tmp = (uint8_t *)&nvram_data;
  53. nvram_data.nvram_size = sizeof(struct _nvdata);
  54. for (i = 0; i < sizeof(struct _nvdata) -2; i++) {
  55. crc = _crc_ccitt_update(crc, *tmp++);
  56. }
  57. nvram_data.nvram_crc = crc;
  58. nvram_write_pos = 0;
  59. EEARL = (nvram_write_pos & 0xFF);
  60. EEARH = (nvram_write_pos >> 8) & 0xFF;
  61. EEDR = ((uint8_t *)&nvram_data)[nvram_write_pos++];
  62. cli();
  63. EECR |= (1<<EEMWE);
  64. EECR |= (1<<EEWE);
  65. sei();
  66. EECR |= (1<<EERIE);
  67. }
  68. /* read nvram from eeprom and check crc */
  69. void eeprom_read(void)
  70. {
  71. uint8_t i;
  72. uint16_t crc = 0x0000;
  73. uint8_t *tmp = (uint8_t *)&nvram_data;
  74. eeprom_read_block(&nvram_data, &nvram_eeprom, sizeof(struct _nvdata));
  75. for (i = 0; i < sizeof(struct _nvdata); i++) {
  76. crc = _crc_ccitt_update(crc, *tmp++);
  77. }
  78. /* if nvram content is invalid, overwrite with defaults */
  79. if ((nvram_data.nvram_size != sizeof(struct _nvdata)) || (crc != 0x0000)) {
  80. memcpy_P(&nvram_data, &nvram_defaults, sizeof(struct _nvdata));
  81. eeprom_write();
  82. }
  83. }