ARM7 based quadrocopter
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at91_init0.s 3.7KB

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  1. /***************************************************************************
  2. * sam7fc - stack/bss/data init *
  3. * *
  4. * Copyright (C) 01/2008 by Olaf Rempel *
  5. * razzor@kopf-tisch.de *
  6. * *
  7. * This program is free software; you can redistribute it and/or modify *
  8. * it under the terms of the GNU General Public License as published by *
  9. * the Free Software Foundation; version 2 of the License *
  10. * *
  11. * This program is distributed in the hope that it will be useful, *
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  14. * GNU General Public License for more details. *
  15. * *
  16. * You should have received a copy of the GNU General Public License *
  17. * along with this program; if not, write to the *
  18. * Free Software Foundation, Inc., *
  19. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  20. ***************************************************************************/
  21. .equ AT91C_BASE_AIC, (0xFFFFF000)
  22. .equ IRQ_Stack_Size, (3 * 8 * 4)
  23. .equ FIQ_Stack_Size, (0 * 8 * 4)
  24. .equ ABT_Stack_Size, 192
  25. .equ ARM_MODE_FIQ, 0x11
  26. .equ ARM_MODE_IRQ, 0x12
  27. .equ ARM_MODE_SVC, 0x13
  28. .equ ARM_MODE_ABT, 0x17
  29. .equ I_BIT, 0x80
  30. .equ F_BIT, 0x40
  31. .section .text
  32. .global _start
  33. .func _start
  34. _start: ldr pc, [pc, #24] /* 0x00 Reset handler */
  35. undefvec: ldr pc, [pc, #24] /* 0x04 Undefined Instruction */
  36. swivec: ldr pc, [pc, #24] /* 0x08 Software Interrupt */
  37. pabtvec: ldr pc, [pc, #24] /* 0x0C Prefetch Abort */
  38. dabtvec: ldr pc, [pc, #24] /* 0x10 Data Abort */
  39. rsvdvec: ldr pc, [pc, #24] /* 0x14 reserved */
  40. irqvec: ldr pc, [pc, #24] /* 0x18 IRQ */
  41. fiqvec: ldr pc, [pc, #24] /* 0x1c FIQ */
  42. .extern ABT_Handler
  43. .extern IRQ_Handler
  44. .extern FIQ_Handler
  45. /* 0x80000000 will result in Prefetch Abort */
  46. .word InitReset
  47. .word 0x80000000
  48. .word 0x80000000
  49. .word ABT_Handler
  50. .word ABT_Handler
  51. .word 0x80000000
  52. .word IRQ_Handler
  53. .word FIQ_Handler
  54. .endfunc
  55. .global InitReset
  56. .func InitReset
  57. .extern at91_init1
  58. InitReset:
  59. /* Call Low level init function */
  60. ldr sp, =__stack_top__
  61. ldr r0, =at91_init1
  62. mov lr, pc
  63. bx r0
  64. mov r0, sp
  65. /* Setup FIQ Mode Stack */
  66. msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
  67. mov sp, r0
  68. sub r0, r0, #FIQ_Stack_Size
  69. /* store AIC Base in r8_fiq for faster access */
  70. ldr r8, =AT91C_BASE_AIC
  71. /* Setup IRQ Mode Stack */
  72. msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
  73. mov sp, r0
  74. sub r0, r0, #IRQ_Stack_Size
  75. /* Setup Abort Mode Stack */
  76. msr CPSR_c, #ARM_MODE_ABT | I_BIT | F_BIT
  77. mov sp, r0
  78. sub r0, r0, #ABT_Stack_Size
  79. /* Setup Supervisor Mode Stack (IRQ & NMI enabled) */
  80. msr CPSR_c, #ARM_MODE_SVC
  81. mov sp, r0
  82. /* Relocate .data section */
  83. ldr r1, =__text_end__
  84. ldr r2, =__data_start__
  85. ldr r3, =__data_end__
  86. LoopRel: cmp r2, r3
  87. ldrlo r0, [r1], #4
  88. strlo r0, [r2], #4
  89. blo LoopRel
  90. /* Clear .bss section */
  91. mov r0, #0
  92. ldr r1, =__bss_start__
  93. ldr r2, =__bss_end__
  94. LoopZI: cmp r1, r2
  95. strlo r0, [r1], #4
  96. BLO LoopZI
  97. /* Start main() */
  98. ldr lr, =exit
  99. ldr r0, =main
  100. bx r0
  101. .endfunc
  102. .global exit
  103. .func exit
  104. /* exit dummy for newlib */
  105. exit: b .
  106. .endfunc