82 lines
2.9 KiB
C
82 lines
2.9 KiB
C
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/***************************************************************************
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* Copyright (C) 01/2008 by Olaf Rempel *
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* razzor@kopf-tisch.de *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; version 2 of the License *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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#include <stdint.h>
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#include "AT91SAM7S256.h"
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static void empty_isr(void) {}
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/*
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* Init critical onchip hardware:
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* - disable Watchdog
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* - enable Oscillator and PLL, switch to 48MHz MCK
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* - set empty Interrupt Handlers
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*/
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void at91_init1(void)
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{
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/* disable watchdog */
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*AT91C_WDTC_WDMR = AT91C_WDTC_WDDIS;
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/* enable user reset */
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*AT91C_RSTC_RMR = (AT91C_RSTC_KEY & 0xA5 << 24) | AT91C_RSTC_URSTEN;
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/* Set Flash Waitstates */
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*AT91C_MC_FMR = AT91C_MC_FWS_1FWS;
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/*
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* Enable main oscillator (MAINCK)
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* startup time: 8*6/32768 -> 1.46ms
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*/
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AT91S_PMC *pmc = AT91C_BASE_PMC;
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pmc->PMC_MOR = (AT91C_CKGR_OSCOUNT & (6<<8)) |
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AT91C_CKGR_MOSCEN;
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while (!(pmc->PMC_SR & AT91C_PMC_MOSCS));
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/*
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* PLLCK = 18.432MHz / 24 * 125 = 96MHz -> div:24, mul:124
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* startup time: 32/32768 -> 976us
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*/
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pmc->PMC_PLLR = (AT91C_CKGR_DIV & 24) |
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(AT91C_CKGR_MUL & (124<<16)) |
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(AT91C_CKGR_PLLCOUNT & (32<<8)) ;
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while (!(pmc->PMC_SR & AT91C_PMC_LOCK));
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/* MCK = PLLCK / 2 = 48MHz */
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pmc->PMC_MCKR = AT91C_PMC_CSS_PLL_CLK |
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AT91C_PMC_PRES_CLK_2;
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while (!(pmc->PMC_SR & AT91C_PMC_MCKRDY));
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/* enable protected mode (let AIC work with debugger) */
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AT91S_AIC *aic = AT91C_BASE_AIC;
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aic->AIC_DCR = AT91C_AIC_DCR_PROT;
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/* Disable & clear all Interrupts */
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aic->AIC_IDCR = ~0;
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aic->AIC_ICCR = ~0;
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/* default Interrupt Handlers just return */
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aic->AIC_FVR = (uint32_t)empty_isr;
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aic->AIC_IVR = (uint32_t)empty_isr;
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uint32_t i;
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for (i = 0; i < 32; i++) {
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aic->AIC_SMR[i] = 0;
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aic->AIC_SVR[i] = (uint32_t)empty_isr;
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}
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aic->AIC_SPU = (uint32_t)empty_isr;
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}
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