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cleanup .s files

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This commit is contained in:
Olaf Rempel 2008-02-03 22:36:12 +01:00
parent 1047706197
commit 2b2dba7316
1 changed files with 241 additions and 244 deletions
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81
at91_init0.s
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@ -60,12 +60,11 @@ fiqvec: ldr pc, [pc, #24] /* 0x1c FIQ */
.global InitReset .global InitReset
.func InitReset .func InitReset
InitReset:
.extern at91_init1 .extern at91_init1
InitReset:
/* Call Low level init function */ /* Call Low level init function */
ldr sp,=__stack_top__ ldr sp, =__stack_top__
ldr r0,=at91_init1 ldr r0, =at91_init1
mov lr, pc mov lr, pc
bx r0 bx r0
mov r0, sp mov r0, sp
@ -110,8 +109,8 @@ LoopZI: cmp r1, r2
BLO LoopZI BLO LoopZI
/* Start main() */ /* Start main() */
ldr lr,=exit ldr lr, =exit
ldr r0,=main ldr r0, =main
bx r0 bx r0
.endfunc .endfunc
@ -152,7 +151,7 @@ ABT_Handler_Entry:
mov r1, sp mov r1, sp
/* execute C Handler (cpsr, registers) */ /* execute C Handler (cpsr, registers) */
ldr r5,=at91_abt_handler ldr r5, =at91_abt_handler
mov lr, pc mov lr, pc
bx r5 bx r5
b . b .
@ -162,83 +161,81 @@ ABT_Handler_Entry:
.func FIQ_Handler_Entry .func FIQ_Handler_Entry
FIQ_Handler_Entry: FIQ_Handler_Entry:
/* Save r0 to ARM_MODE_FIQ:r9 */ /* Save r0 to ARM_MODE_FIQ:r9 */
mov r9,r0 mov r9, r0
/* get FIQ Vector from AIC and thus clear FIQ */ /* get FIQ Vector from AIC and thus clear FIQ */
ldr r0 , [r8, #AIC_FVR] ldr r0, [r8, #AIC_FVR]
/* Switch to ARM_MODE_SVC and save registers there */ /* Switch to ARM_MODE_SVC and save registers there */
msr CPSR_c,#ARM_MODE_SVC | I_BIT | F_BIT msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT
stmfd sp!, { r1-r3, r12, lr} stmfd sp!, { r1-r3, r12, lr }
/* execute FIQ in SVC_MODE */ /* execute FIQ in SVC_MODE */
mov r14, pc mov r14, pc
bx r0 bx r0
/* restore registers and switch back to ARM_MODE_FIQ */ /* restore registers and switch back to ARM_MODE_FIQ */
ldmia sp!, { r1-r3, r12, lr} ldmia sp!, { r1-r3, r12, lr }
msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
/* restore the ARM_MODE_SVC:r0 */ /* restore the ARM_MODE_SVC:r0 */
mov r0,r9 mov r0, r9
/* restore PC using the LR_fiq directly */ /* restore PC using the LR_fiq directly */
subs pc,lr,#4 subs pc, lr, #4
.endfunc .endfunc
.global IRQ_Handler_Entry .global IRQ_Handler_Entry
.func IRQ_Handler_Entry .func IRQ_Handler_Entry
IRQ_Handler_Entry: IRQ_Handler_Entry:
/*- Manage Exception Entry */ /* Manage Exception Entry */
/*- Adjust and save LR_irq in IRQ stack */ /* Adjust and save LR_irq in IRQ stack */
sub lr, lr, #4 sub lr, lr, #4
stmfd sp!, {lr} stmfd sp!, { lr }
/*- Save SPSR need to be saved for nested interrupt */ /* Save SPSR need to be saved for nested interrupt */
mrs r14, SPSR mrs r14, SPSR
stmfd sp!, {r14} stmfd sp!, { r14 }
/*- Save and r0 in IRQ stack */ /* Save and r0 in IRQ stack */
stmfd sp!, {r0} stmfd sp!, { r0 }
/*- Write in the IVR to support Protect Mode */ /* Write in the IVR to support Protect Mode */
/*- No effect in Normal Mode */ /* No effect in Normal Mode */
/*- De-assert the NIRQ and clear the source in Protect Mode */ /* De-assert the NIRQ and clear the source in Protect Mode */
ldr r14, =AT91C_BASE_AIC ldr r14, =AT91C_BASE_AIC
ldr r0 , [r14, #AIC_IVR] ldr r0, [r14, #AIC_IVR]
str r14, [r14, #AIC_IVR] str r14, [r14, #AIC_IVR]
/*- Enable Interrupt and Switch in Supervisor Mode */ /* Enable Interrupt and Switch in Supervisor Mode */
msr CPSR_c, #ARM_MODE_SVC msr CPSR_c, #ARM_MODE_SVC
/*- Save scratch/used registers and LR in User Stack */ /* Save scratch/used registers and LR in User Stack */
stmfd sp!, { r1-r3, r12, r14} stmfd sp!, { r1-r3, r12, r14 }
/*- Branch to the routine pointed by the AIC_IVR */ /* Branch to the routine pointed by the AIC_IVR */
mov r14, pc mov r14, pc
bx r0 bx r0
/*- Restore scratch/used registers and LR from User Stack*/
ldmia sp!, { r1-r3, r12, r14}
/*- Disable Interrupt and switch back in IRQ mode */ /* Restore scratch/used registers and LR from User Stack */
ldmia sp!, { r1-r3, r12, r14 }
/* Disable Interrupt and switch back in IRQ mode */
msr CPSR_c, #ARM_MODE_IRQ | I_BIT msr CPSR_c, #ARM_MODE_IRQ | I_BIT
/*- Mark the End of Interrupt on the AIC */ /* Mark the End of Interrupt on the AIC */
ldr r14, =AT91C_BASE_AIC ldr r14, =AT91C_BASE_AIC
str r14, [r14, #AIC_EOICR] str r14, [r14, #AIC_EOICR]
/*- Restore SPSR_irq and r0 from IRQ stack */ /* Restore SPSR_irq and r0 from IRQ stack */
ldmia sp!, {r0} ldmia sp!, { r0 }
/*- Restore SPSR_irq and r0 from IRQ stack */ /* Restore SPSR_irq and r0 from IRQ stack */
ldmia sp!, {r14} ldmia sp!, { r14 }
msr SPSR_cxsf, r14 msr SPSR_cxsf, r14
/*- Restore adjusted LR_irq from IRQ stack directly in the PC */ /* Restore adjusted LR_irq from IRQ stack directly in the PC */
ldmia sp!, {pc}^ ldmia sp!, { pc }^
.endfunc .endfunc
.end .end