cleanup .s files
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1047706197
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81
at91_init0.s
81
at91_init0.s
@ -60,12 +60,11 @@ fiqvec: ldr pc, [pc, #24] /* 0x1c FIQ */
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.global InitReset
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.func InitReset
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InitReset:
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.extern at91_init1
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InitReset:
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/* Call Low level init function */
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ldr sp,=__stack_top__
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ldr r0,=at91_init1
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ldr sp, =__stack_top__
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ldr r0, =at91_init1
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mov lr, pc
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bx r0
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mov r0, sp
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@ -110,8 +109,8 @@ LoopZI: cmp r1, r2
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BLO LoopZI
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/* Start main() */
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ldr lr,=exit
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ldr r0,=main
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ldr lr, =exit
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ldr r0, =main
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bx r0
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.endfunc
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@ -152,7 +151,7 @@ ABT_Handler_Entry:
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mov r1, sp
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/* execute C Handler (cpsr, registers) */
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ldr r5,=at91_abt_handler
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ldr r5, =at91_abt_handler
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mov lr, pc
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bx r5
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b .
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@ -162,83 +161,81 @@ ABT_Handler_Entry:
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.func FIQ_Handler_Entry
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FIQ_Handler_Entry:
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/* Save r0 to ARM_MODE_FIQ:r9 */
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mov r9,r0
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mov r9, r0
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/* get FIQ Vector from AIC and thus clear FIQ */
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ldr r0 , [r8, #AIC_FVR]
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ldr r0, [r8, #AIC_FVR]
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/* Switch to ARM_MODE_SVC and save registers there */
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msr CPSR_c,#ARM_MODE_SVC | I_BIT | F_BIT
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stmfd sp!, { r1-r3, r12, lr}
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msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT
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stmfd sp!, { r1-r3, r12, lr }
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/* execute FIQ in SVC_MODE */
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mov r14, pc
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bx r0
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/* restore registers and switch back to ARM_MODE_FIQ */
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ldmia sp!, { r1-r3, r12, lr}
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ldmia sp!, { r1-r3, r12, lr }
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msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
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/* restore the ARM_MODE_SVC:r0 */
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mov r0,r9
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mov r0, r9
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/* restore PC using the LR_fiq directly */
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subs pc,lr,#4
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subs pc, lr, #4
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.endfunc
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.global IRQ_Handler_Entry
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.func IRQ_Handler_Entry
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IRQ_Handler_Entry:
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/*- Manage Exception Entry */
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/*- Adjust and save LR_irq in IRQ stack */
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/* Manage Exception Entry */
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/* Adjust and save LR_irq in IRQ stack */
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sub lr, lr, #4
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stmfd sp!, {lr}
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stmfd sp!, { lr }
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/*- Save SPSR need to be saved for nested interrupt */
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/* Save SPSR need to be saved for nested interrupt */
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mrs r14, SPSR
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stmfd sp!, {r14}
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stmfd sp!, { r14 }
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/*- Save and r0 in IRQ stack */
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stmfd sp!, {r0}
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/* Save and r0 in IRQ stack */
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stmfd sp!, { r0 }
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/*- Write in the IVR to support Protect Mode */
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/*- No effect in Normal Mode */
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/*- De-assert the NIRQ and clear the source in Protect Mode */
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/* Write in the IVR to support Protect Mode */
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/* No effect in Normal Mode */
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/* De-assert the NIRQ and clear the source in Protect Mode */
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ldr r14, =AT91C_BASE_AIC
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ldr r0 , [r14, #AIC_IVR]
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ldr r0, [r14, #AIC_IVR]
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str r14, [r14, #AIC_IVR]
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/*- Enable Interrupt and Switch in Supervisor Mode */
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/* Enable Interrupt and Switch in Supervisor Mode */
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msr CPSR_c, #ARM_MODE_SVC
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/*- Save scratch/used registers and LR in User Stack */
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stmfd sp!, { r1-r3, r12, r14}
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/* Save scratch/used registers and LR in User Stack */
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stmfd sp!, { r1-r3, r12, r14 }
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/*- Branch to the routine pointed by the AIC_IVR */
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/* Branch to the routine pointed by the AIC_IVR */
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mov r14, pc
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bx r0
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/*- Restore scratch/used registers and LR from User Stack*/
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ldmia sp!, { r1-r3, r12, r14}
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/*- Disable Interrupt and switch back in IRQ mode */
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/* Restore scratch/used registers and LR from User Stack */
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ldmia sp!, { r1-r3, r12, r14 }
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/* Disable Interrupt and switch back in IRQ mode */
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msr CPSR_c, #ARM_MODE_IRQ | I_BIT
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/*- Mark the End of Interrupt on the AIC */
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/* Mark the End of Interrupt on the AIC */
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ldr r14, =AT91C_BASE_AIC
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str r14, [r14, #AIC_EOICR]
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/*- Restore SPSR_irq and r0 from IRQ stack */
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ldmia sp!, {r0}
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/* Restore SPSR_irq and r0 from IRQ stack */
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ldmia sp!, { r0 }
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/*- Restore SPSR_irq and r0 from IRQ stack */
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ldmia sp!, {r14}
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/* Restore SPSR_irq and r0 from IRQ stack */
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ldmia sp!, { r14 }
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msr SPSR_cxsf, r14
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/*- Restore adjusted LR_irq from IRQ stack directly in the PC */
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ldmia sp!, {pc}^
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/* Restore adjusted LR_irq from IRQ stack directly in the PC */
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ldmia sp!, { pc }^
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.endfunc
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.end
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