more init0 work
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parent
192c3e132c
commit
6825dbb2f4
14
at91_init0.s
14
at91_init0.s
@ -31,11 +31,21 @@
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.equ I_BIT, 0x80
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.equ I_BIT, 0x80
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.equ F_BIT, 0x40
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.equ F_BIT, 0x40
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.section .dummy
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.section .text.dummy
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.global _hwstart
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.global _hwstart
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.func _hwstart
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.func _hwstart
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_hwstart:
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_hwstart:
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ldr pc, =0x13c000
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ldr pc, [pc, #24] /* 0x00 Reset handler */
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ldr pc, [pc, #24] /* 0x04 Undefined Instruction */
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ldr pc, [pc, #20] /* 0x08 Software Interrupt */
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ldr pc, [pc, #16] /* 0x0C Prefetch Abort */
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ldr pc, [pc, #12] /* 0x10 Data Abort */
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ldr pc, [pc, #8] /* 0x14 reserved */
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ldr pc, [pc, #4] /* 0x18 IRQ */
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ldr pc, [pc, #0] /* 0x1c FIQ */
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.word InitReset + 0x13c000
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.word 0x80000000
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.endfunc
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.endfunc
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@ -9,8 +9,8 @@ SECTIONS
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{
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{
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. = ORIGIN(FLASH);
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. = ORIGIN(FLASH);
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.dummy : {
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.text.dummy : {
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*(.dummy)
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*(.text.dummy)
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} >FLASH =0
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} >FLASH =0
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. = ORIGIN(CODE);
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. = ORIGIN(CODE);
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