make it work without dummy
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parent
6825dbb2f4
commit
e3ed2ef4e7
@ -31,7 +31,7 @@
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.equ I_BIT, 0x80
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.equ I_BIT, 0x80
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.equ F_BIT, 0x40
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.equ F_BIT, 0x40
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.section .text.dummy
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.section .init
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.global _hwstart
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.global _hwstart
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.func _hwstart
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.func _hwstart
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_hwstart:
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_hwstart:
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@ -44,7 +44,7 @@ _hwstart:
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ldr pc, [pc, #4] /* 0x18 IRQ */
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ldr pc, [pc, #4] /* 0x18 IRQ */
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ldr pc, [pc, #0] /* 0x1c FIQ */
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ldr pc, [pc, #0] /* 0x1c FIQ */
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.word InitReset + 0x13c000
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.word _blrelocate /* + 0x13c000 */
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.word 0x80000000
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.word 0x80000000
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.endfunc
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.endfunc
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@ -52,6 +52,7 @@ _hwstart:
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.section .init
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.section .init
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.global _blrelocate
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.global _blrelocate
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.func _blrelocate
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.func _blrelocate
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_blrelocate:
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msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT
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msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT
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/* Remap RAM to 0x00000000 */
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/* Remap RAM to 0x00000000 */
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@ -1,18 +1,21 @@
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MEMORY
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MEMORY
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{
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{
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/*
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FLASH(rx) : ORIGIN = 0x00100000, LENGTH = 256k
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FLASH(rx) : ORIGIN = 0x00100000, LENGTH = 256k
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CODE (rx) : ORIGIN = 0x0013c000, LENGTH = 16k
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*/
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CODE (rx) : ORIGIN = 0x00100000, LENGTH = 16k
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DATA (rwx) : ORIGIN = 0x00000000, LENGTH = 64k
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DATA (rwx) : ORIGIN = 0x00000000, LENGTH = 64k
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}
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}
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SECTIONS
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SECTIONS
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{
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{
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/*
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. = ORIGIN(FLASH);
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. = ORIGIN(FLASH);
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.text.dummy : {
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.text.dummy : {
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*(.text.dummy)
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*(.text.dummy)
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} >FLASH =0
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} >FLASH =0
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*/
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. = ORIGIN(CODE);
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. = ORIGIN(CODE);
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.init : {
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.init : {
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