159 lines
4.3 KiB
ArmAsm
159 lines
4.3 KiB
ArmAsm
/***************************************************************************
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* Copyright (C) 01/2008 by Olaf Rempel *
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* razzor@kopf-tisch.de *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; version 2 of the License *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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.equ AT91C_BASE_AIC, (0xFFFFF000)
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.equ AT91C_BASE_MC, (0xFFFFFF00)
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.equ IRQ_Stack_Size, (3 * 8 * 4)
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.equ FIQ_Stack_Size, (0 * 8 * 4)
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.equ ABT_Stack_Size, 192
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.equ ARM_MODE_FIQ, 0x11
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.equ ARM_MODE_IRQ, 0x12
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.equ ARM_MODE_SVC, 0x13
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.equ ARM_MODE_ABT, 0x17
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.equ I_BIT, 0x80
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.equ F_BIT, 0x40
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.section .init
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.global _hwstart
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.func _hwstart
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_hwstart:
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ldr pc, [pc, #24] /* 0x00 Reset handler */
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ldr pc, [pc, #24] /* 0x04 Undefined Instruction */
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ldr pc, [pc, #20] /* 0x08 Software Interrupt */
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ldr pc, [pc, #16] /* 0x0C Prefetch Abort */
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ldr pc, [pc, #12] /* 0x10 Data Abort */
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ldr pc, [pc, #8] /* 0x14 reserved */
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ldr pc, [pc, #4] /* 0x18 IRQ */
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ldr pc, [pc, #0] /* 0x1c FIQ */
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.word _blrelocate /* + 0x13c000 */
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.word 0x80000000
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.endfunc
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.section .init
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.global _blrelocate
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.func _blrelocate
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_blrelocate:
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msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT
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/* Remap RAM to 0x00000000 */
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ldr r1, =AT91C_BASE_MC
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mov r2, #0x01
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str r2, [r1]
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/* Relocate .data section */
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ldr r1, =__init_end__
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ldr r2, =__text_start__
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ldr r3, =__data_end__
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LoopRel: cmp r2, r3
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ldrlo r0, [r1], #4
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strlo r0, [r2], #4
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blo LoopRel
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/* Clear .bss section */
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mov r0, #0
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ldr r1, =__bss_start__
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ldr r2, =__bss_end__
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LoopZI: cmp r1, r2
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strlo r0, [r1], #4
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BLO LoopZI
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ldr r0, =InitReset
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mov pc, r0
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.endfunc
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.section .text
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.global _start
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.func _start
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_start: ldr pc, [pc, #24] /* 0x00 Reset handler */
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undefvec: ldr pc, [pc, #24] /* 0x04 Undefined Instruction */
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swivec: ldr pc, [pc, #24] /* 0x08 Software Interrupt */
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pabtvec: ldr pc, [pc, #24] /* 0x0C Prefetch Abort */
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dabtvec: ldr pc, [pc, #24] /* 0x10 Data Abort */
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rsvdvec: ldr pc, [pc, #24] /* 0x14 reserved */
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irqvec: ldr pc, [pc, #24] /* 0x18 IRQ */
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fiqvec: ldr pc, [pc, #24] /* 0x1c FIQ */
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.extern ABT_Handler
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.extern IRQ_Handler
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.extern FIQ_Handler
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/* 0x80000000 will result in Prefetch Abort */
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.word InitReset
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.word 0x80000000
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.word 0x80000000
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.word ABT_Handler
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.word ABT_Handler
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.word 0x80000000
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.word IRQ_Handler
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.word FIQ_Handler
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.endfunc
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.global InitReset
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.func InitReset
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.extern at91_init1
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InitReset:
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/* Call Low level init function */
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ldr sp, =__stack_top__
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ldr r0, =at91_init1
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mov lr, pc
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bx r0
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mov r0, sp
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/* Setup FIQ Mode Stack */
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msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
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mov sp, r0
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sub r0, r0, #FIQ_Stack_Size
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/* store AIC Base in r8_fiq for faster access */
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ldr r8, =AT91C_BASE_AIC
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/* Setup IRQ Mode Stack */
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msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
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mov sp, r0
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sub r0, r0, #IRQ_Stack_Size
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/* Setup Abort Mode Stack */
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msr CPSR_c, #ARM_MODE_ABT | I_BIT | F_BIT
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mov sp, r0
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sub r0, r0, #ABT_Stack_Size
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/* Setup Supervisor Mode Stack (IRQ & NMI enabled) */
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msr CPSR_c, #ARM_MODE_SVC
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mov sp, r0
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/* Start main() */
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ldr lr, =exit
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ldr r0, =main
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bx r0
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.endfunc
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.global exit
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.func exit
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/* exit dummy for newlib */
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exit: b .
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.endfunc
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