761 lines
23 KiB
C
761 lines
23 KiB
C
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/*
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* (C) Copyright 2003
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* Texas Instruments.
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* Kshitij Gupta <kshitij@ti.com>
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* Configuation settings for the TI OMAP Innovator board.
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*
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* (C) Copyright 2004
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* ARM Ltd.
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* Philippe Robin, <philippe.robin@arm.com>
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* Configuration for Integrator AP board.
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*.
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include "../../board/mv_feroceon/mv_kw/mvSysHwConfig.h"
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/************/
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/* VERSIONS */
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/************/
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#ifdef MV_TINY_IMAGE
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#define CONFIG_IDENT_STRING " Marvell version: 3.4.25-TINY"
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#else
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#define CONFIG_IDENT_STRING " Marvell version: 3.4.25"
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#endif /* MV_TINY_IMAGE */
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/* version number passing when loading Kernel */
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#define VER_NUM 0x03041900 /* 3.4.25 */
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/********************/
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/* MV DEV SUPPORTS */
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/********************/
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//#define CONFIG_PCI /* pci support */
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#undef CONFIG_PCI_1 /* sec pci interface support */
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/********************/
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/* Environment variables */
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/********************/
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#define CFG_ENV_IS_IN_FLASH 1
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/**********************************/
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/* Marvell Monitor Extension */
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/**********************************/
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#define enaMonExt()( /*(!getenv("enaMonExt")) ||\*/\
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( getenv("enaMonExt") && \
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((!strcmp(getenv("enaMonExt"),"yes")) ||\
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(!strcmp(getenv("enaMonExt"),"Yes"))) \
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)\
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)
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/********/
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/* CLKs */
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/********/
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#ifndef __ASSEMBLY__
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extern unsigned int mvSysClkGet(void);
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extern unsigned int mvTclkGet(void);
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#define UBOOT_CNTR 0 /* counter to use for uboot timer */
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#define MV_TCLK_CNTR 1 /* counter to use for uboot timer */
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#define MV_REF_CLK_DEV_BIT 1000 /* Number of cycle to eanble timer */
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#define MV_REF_CLK_BIT_RATE 100000 /* Ref clock frequency */
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#define MV_REF_CLK_INPUT_GPP 6 /* Ref clock frequency input */
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#define CFG_HZ 1000
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#define CFG_TCLK mvTclkGet()
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#define CFG_BUS_HZ mvSysClkGet()
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#define CFG_BUS_CLK CFG_BUS_HZ
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#endif
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/********************/
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/* Dink PT settings */
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/********************/
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#define CFG_MV_PT
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#ifdef CFG_MV_PT
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#define CFG_PT_BASE (CFG_MALLOC_BASE - 0x20000)
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#endif /* #ifdef CFG_MV_PT */
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/*************************************/
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/* High Level Configuration Options */
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/* (easy to change) */
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/*************************************/
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#define CONFIG_MARVELL 1
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#define CONFIG_ARM926EJS 1 /* CPU */
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/* commands */
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#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
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CONFIG_BOOTP_BOOTFILESIZE)
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/* Default U-Boot supported features */
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#if defined(MV_TINY_IMAGE)
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#define CONFIG_CMD_BASIC (CFG_CMD_PCI \
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| CFG_CMD_FLASH\
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| CFG_CMD_ENV \
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| CFG_CMD_NET \
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| CFG_CMD_IDE \
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| CFG_CMD_EXT2 \
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| CFG_CMD_MEMORY\
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| CFG_CMD_BOOTD)
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#elif defined(DB_FPGA)
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#define CONFIG_CMD_BASIC ( CFG_CMD_DHCP \
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| CFG_CMD_ELF \
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| CFG_CMD_I2C \
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| CFG_CMD_EEPROM \
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| CFG_CMD_PCI \
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| CFG_CMD_JFFS2 \
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| CFG_CMD_DATE \
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| CFG_CMD_LOADS \
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| CFG_CMD_FLASH \
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| CFG_CMD_MEMORY \
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| CFG_CMD_ENV \
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| CFG_CMD_BOOTD \
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| CFG_CMD_CONSOLE \
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| CFG_CMD_RUN \
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| CFG_CMD_MISC \
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)
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#else
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#define CONFIG_CMD_BASIC ( /* CFG_CMD_DHCP */ \
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/* | CFG_CMD_I2C */ \
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/* | CFG_CMD_EEPROM */ \
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/* | CFG_CMD_PCI */ \
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/* | */ CFG_CMD_NET \
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| CFG_CMD_PING \
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| CFG_CMD_JFFS2 \
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| CFG_CMD_DATE \
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| CFG_CMD_BSP \
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| CFG_CMD_FLASH \
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| CFG_CMD_MEMORY \
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| CFG_CMD_IDE \
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| CFG_CMD_IMI \
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| CFG_CMD_EXT2 \
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| CFG_CMD_ENV \
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| CFG_CMD_BOOTD \
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| CFG_CMD_RUN \
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| CFG_CMD_RCVR \
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| CFG_CMD_FAT \
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| CFG_CMD_USB \
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| CFG_CMD_MMC \
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)
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#endif
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#ifndef MV_MMC
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#define MV_MMC
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#endif
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#if defined(MV_NAND) || defined(MV_NAND_BOOT)
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#define CONFIG_CMD_BASIC1 (CONFIG_CMD_BASIC | CFG_CMD_NAND)
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#define CONFIG_MTD_NAND_VERIFY_WRITE
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#else
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#define CONFIG_CMD_BASIC1 CONFIG_CMD_BASIC
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#endif
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#if (defined(MV_INCLUDE_PEX) | defined(MV_INCLUDE_PCI))
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#define CONFIG_CMD_BASIC2 CONFIG_CMD_BASIC1
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#else
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#undef CONFIG_PCI
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#define CONFIG_CMD_BASIC2 (CONFIG_CMD_BASIC1 & ~CFG_CMD_PCI)
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#endif
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#if (!defined (MV_INC_BOARD_NOR_FLASH) && \
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!defined(MV_INC_BOARD_SPI_FLASH) && \
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!defined(MV_INCLUDE_INTEG_MFLASH))
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#undef CFG_ENV_IS_IN_FLASH
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#define CFG_ENV_IS_NOWHERE
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#define CFG_NO_FLASH
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#define CONFIG_CMD_BASIC3 (CONFIG_CMD_BASIC2 & ~CFG_CMD_FLASH \
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& ~CFG_CMD_ENV \
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& ~CFG_CMD_JFFS2)
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#else
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#define CONFIG_CMD_BASIC3 CONFIG_CMD_BASIC2
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#endif
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#if !defined (MV_INC_BOARD_NAND_FLASH)
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#define CONFIG_CMD_BASIC4 (CONFIG_CMD_BASIC3 & ~CFG_CMD_NAND)
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#else
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#define CONFIG_CMD_BASIC4 CONFIG_CMD_BASIC3
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#endif
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#if !defined (MV_INC_BOARD_PCI_SATA) && !defined (MV_INCLUDE_INTEG_SATA)
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#define CONFIG_CMD_BASIC5 (CONFIG_CMD_BASIC4 & ~CFG_CMD_IDE \
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& ~CFG_CMD_EXT2)
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#else
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#define CONFIG_CMD_BASIC5 CONFIG_CMD_BASIC4
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#endif
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#if defined(MV_MMC)
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#define CONFIG_CMD_BASIC6 (CONFIG_CMD_BASIC5 | CFG_CMD_MMC | CFG_CMD_FAT)
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#else
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#define CONFIG_CMD_BASIC6 CONFIG_CMD_BASIC5
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#endif
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#define CONFIG_COMMANDS CONFIG_CMD_BASIC6
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/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
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#include <cmd_confdefs.h>
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#define CFG_MAXARGS 16 /* max number of command args */
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/*-----------------------------------------------------------------------
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* IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
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*-----------------------------------------------------------------------
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*/
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#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
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#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
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#undef CONFIG_IDE_LED /* LED for ide not supported */
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#undef CONFIG_IDE_RESET /* reset for ide not supported */
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#define CFG_IDE_MAXBUS 4 /* max. 1 IDE bus */
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#define CFG_IDE_MAXDEVICE CFG_IDE_MAXBUS * 8 /* max. 1 drive per IDE bus */
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#define CFG_ATA_IDE0_OFFSET 0x0000
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#undef CONFIG_MAC_PARTITION
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#define CONFIG_DOS_PARTITION
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#define CONFIG_EFI_PARTITION
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/* For 6121/6145 support */
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#define CONFIG_SCSI_AHCI
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#ifdef CONFIG_SCSI_AHCI
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#define CONFIG_SATA_6121
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#define CFG_SCSI_MAX_SCSI_ID 4
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#define CFG_SCSI_MAX_LUN 1
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#define CFG_SCSI_MAX_DEVICE (CFG_SCSI_MAX_SCSI_ID * CFG_SCSI_MAX_LUN)
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#define CFG_SCSI_MAXDEVICE CFG_SCSI_MAX_DEVICE
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#endif
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#ifndef CONFIG_MMC
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#define CONFIG_LBA48
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#endif
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/* which initialization functions to call for this board */
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#define CONFIG_MISC_INIT_R 1 /* after relloc initialization*/
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#undef CONFIG_DISPLAY_MEMMAP /* at the end of the bootprocess show the memory map*/
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#define CONFIG_ENV_OVERWRITE /* allow to change env parameters */
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#undef CONFIG_WATCHDOG /* watchdog disabled */
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/* Cache */
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#define CFG_CACHELINE_SIZE 32
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/* global definetions. */
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#define CFG_SDRAM_BASE 0x00000000
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#define CFG_RESET_ADDRESS 0xffff0000
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#define CFG_MALLOC_BASE (TEXT_BASE + (1 << 20)) /* TEXT_BASE + 1M */
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/*
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* When locking data in cache you should point the CFG_INIT_RAM_ADDRESS
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* To an unused memory region. The stack will remain in cache until RAM
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* is initialized
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*/
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#define CFG_MALLOC_LEN (1 << 20) /* (default) Reserve 1MB for malloc*/
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#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for init data */
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#undef CONFIG_INIT_CRITICAL /* critical code in start.S */
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#define MASTER_CPU 0
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/********/
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/* DRAM */
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/********/
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#define CFG_DRAM_BANKS 4
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/* this defines whether we want to use the lowest CAL or the highest CAL available,*/
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/* we also check for the env parameter CASset. */
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#define MV_MIN_CAL
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#define CFG_MEMTEST_START 0x00400000
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#define CFG_MEMTEST_END 0x007fffff
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/********/
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/* RTC */
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/********/
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#if (CONFIG_COMMANDS & CFG_CMD_DATE)
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#define CFG_NVRAM_SIZE 0x00 /* dummy */
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#define CFG_NVRAM_BASE_ADDR DEVICE_CS1_BASE /* dummy */
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#endif /* #if (CONFIG_COMMANDS & CFG_CMD_DATE) */
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/********************/
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/* Serial + parser */
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/********************/
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/*
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* The following defines let you select what serial you want to use
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* for your console driver.
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*/
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#define CONFIG_BAUDRATE 115200 /* console baudrate = 115200 */
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 }
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#ifdef DB_88F6280A
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#define CFG_DUART_CHAN 1 /* channel to use for console */
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#else
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#define CFG_DUART_CHAN 0 /* channel to use for console */
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#endif
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#define CFG_INIT_CHAN1
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#define CFG_INIT_CHAN2
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#define CONFIG_LOADS_ECHO 0 /* echo off for serial download */
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#define CFG_LOADS_BAUD_CHANGE /* allow baudrate changes */
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#define CFG_CONSOLE_INFO_QUIET /* don't print In/Out/Err console assignment. */
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#undef CONFIG_SILENT_CONSOLE /* define for Pex complince */
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/* parser */
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/* don't chang the parser if you want to load Linux(if you cahnge it to HUSH the cmdline will
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not pass to the kernel correctlly???) */
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#define CFG_HUSH_PARSER
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/* #undef CFG_HUSH_PARSER */
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#define CONFIG_AUTO_COMPLETE
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#define CFG_PROMPT_HUSH_PS2 "> "
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#define CFG_LONGHELP /* undef to save memory */
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#if defined(CONFIG_BUFFALO_PLATFORM)
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#define CFG_PROMPT "BUFFALO>> " /* Monitor Command Prompt */
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#else
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#define CFG_PROMPT "Marvell>> " /* Monitor Command Prompt */
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#endif
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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/************/
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/* ETHERNET */
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/************/
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/* to change the default ethernet port, use this define (options: 0, 1, 2) */
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#if (CONFIG_COMMANDS & CFG_CMD_NET)
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#define CONFIG_NET_MULTI
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#if defined(CONFIG_BUFFALO_PLATFORM)
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#define CONFIG_IPADDR 192.168.11.150
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#define CONFIG_SERVERIP 192.168.11.1
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#define CONFIG_NETMASK 255.255.255.0
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#else // !defined(CONFIG_BUFFALO_PLATFORM)
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#define CONFIG_IPADDR 10.4.50.165
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#define CONFIG_SERVERIP 10.4.50.5
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#define CONFIG_NETMASK 255.255.255.0
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#endif // defined(CONFIG_BUFFALO_PLATFORM)
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#endif
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#define ETHADDR "00:00:00:00:51:81"
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#define ETH1ADDR "00:00:00:00:51:82"
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#define ENV_ETH_PRIME "egiga0"
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/************/
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/* PCI */
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/************/
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#if defined(MV_INCLUDE_PCI)
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#if defined(DB_PEX_PCI)
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#define ENV_PCI_MODE "device" /* PCI */
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#else
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#define ENV_PCI_MODE "host" /* PCI */
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#endif
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#endif
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/************/
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/* USB */
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/************/
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#if defined(MV_INCLUDE_USB)
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#define ENV_USB0_MODE "host"
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#define CONFIG_USB_EHCI
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#if defined(CONFIG_CMD_USB)
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#define CONFIG_USB_STORAGE
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#endif
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#endif
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/************/
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/* SDIO/MMC */
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/************/
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#if defined(MV_88F6183) || defined(MV_88F6183L) || defined(MV88F6281) || defined(MV88F6282) || \
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defined(MV88F6192) || defined(MV88F6180) || defined(MV88F6280)
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#define CONFIG_MMC
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#define CFG_MMC_BASE 0xF0000000
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#endif
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/***************************************/
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/* LINUX BOOT and other ENV PARAMETERS */
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/***************************************/
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#define CFG_BOOTARGS_END ":::DB88FXX81:eth0:none"
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#define CFG_BOOTARGS_END_SWITCH ":::RD88FXX81:eth0:none"
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#define RCVR_IP_ADDR "169.254.100.100"
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#define RCVR_LOAD_ADDR "0x02000000"
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#define CONFIG_ZERO_BOOTDELAY_CHECK
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||
|
#define CFG_LOAD_ADDR 0x02000000 /* default load address */
|
||
|
|
||
|
#undef CONFIG_BOOTARGS
|
||
|
|
||
|
/* auto boot*/
|
||
|
#define CONFIG_BOOTDELAY 3 /* by default no autoboot */
|
||
|
|
||
|
#if (CONFIG_BOOTDELAY >= 0)
|
||
|
#define CONFIG_ROOTPATH /mnt/ARM_FS/
|
||
|
#endif /* #if (CONFIG_BOOTDELAY >= 0) */
|
||
|
|
||
|
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
|
||
|
|
||
|
/*
|
||
|
* For booting Linux, the board info and command line data
|
||
|
* have to be in the first 8 MB of memory, since this is
|
||
|
* the maximum mapped by the Linux kernel during initialization.
|
||
|
*/
|
||
|
#define CFG_BOOTMAPSZ (8<<20) /* Initial Memory map for Linux */
|
||
|
|
||
|
#define BRIDGE_REG_BASE_BOOTM 0xfbe00000 /* this paramaters are used when booting the linux kernel */
|
||
|
|
||
|
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
||
|
#define CONFIG_INITRD_TAG 1 /* enable INITRD tag for ramdisk data */
|
||
|
#define CONFIG_SETUP_MEMORY_TAGS 1
|
||
|
#define CONFIG_MARVELL_TAG 1
|
||
|
#define ATAG_MARVELL 0x41000403
|
||
|
|
||
|
/********/
|
||
|
/* I2C */
|
||
|
/********/
|
||
|
#define CFG_I2C_EEPROM_ADDR_LEN 1
|
||
|
#define CFG_I2C_MULTI_EEPROMS
|
||
|
#define CFG_I2C_SPEED 100000 /* I2C speed default */
|
||
|
|
||
|
/* I2C addresses for the two DIMM SPD chips */
|
||
|
#define DIMM0_I2C_ADDR 0x56
|
||
|
#define DIMM1_I2C_ADDR 0x54
|
||
|
|
||
|
/* CPU I2C settings */
|
||
|
#define CPU_I2C
|
||
|
#define I2C_CPU0_EEPROM_ADDR 0x51
|
||
|
|
||
|
|
||
|
/********/
|
||
|
/* PCI */
|
||
|
/********/
|
||
|
#ifdef CONFIG_PCI
|
||
|
#define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
|
||
|
#define CONFIG_PCI_PNP /* do pci plug-and-play */
|
||
|
|
||
|
/* Pnp PCI Network cards */
|
||
|
#if !defined(CONFIG_BUFFALO_PLATFORM)
|
||
|
#define CONFIG_EEPRO100 /* Support for Intel 82557/82559/82559ER chips */
|
||
|
#define CONFIG_SK98 /* yukon */
|
||
|
#define YUK_ETHADDR "00:00:00:EE:51:81"
|
||
|
#define CONFIG_DRIVER_RTL8029
|
||
|
#endif
|
||
|
|
||
|
/* To reduce image size... */
|
||
|
#if defined (MV_USB) || defined (MV_TINY_IMAGE) || defined(__BE)
|
||
|
#undef CONFIG_SK98 /* yukon */
|
||
|
#undef CONFIG_DRIVER_RTL8029
|
||
|
#undef CONFIG_EEPRO100
|
||
|
#endif
|
||
|
|
||
|
/* To reduce image size... */
|
||
|
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
|
||
|
#if !defined (MV_NAND_BOOT)
|
||
|
#undef CONFIG_DRIVER_RTL8029
|
||
|
#undef CONFIG_EEPRO100
|
||
|
#undef CONFIG_SK98
|
||
|
#endif
|
||
|
#endif
|
||
|
|
||
|
/* DB_PRPMC support only Yukon */
|
||
|
#if defined (DB_PRPMC) || defined (DB_MNG)
|
||
|
#undef CONFIG_EEPRO100
|
||
|
#undef CONFIG_DRIVER_RTL8029
|
||
|
#endif
|
||
|
|
||
|
#endif /* #ifdef CONFIG_PCI */
|
||
|
|
||
|
#define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
|
||
|
#define PCI_HOST_FORCE 1 /* configure as pci host */
|
||
|
#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
|
||
|
|
||
|
/* for Yukon */
|
||
|
#define __mem_pci(x) x
|
||
|
#define __io_pci(x) x
|
||
|
#define __arch_getw(a) (*(volatile unsigned short *)(a))
|
||
|
#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
|
||
|
|
||
|
|
||
|
|
||
|
/***********************/
|
||
|
/* FLASH organization */
|
||
|
/***********************/
|
||
|
|
||
|
/*
|
||
|
* When CFG_MAX_FLASH_BANKS_DETECT is defined, the actual number of Flash
|
||
|
* banks has to be determined at runtime and stored in a gloabl variable
|
||
|
* mv_board_num_flash_banks. The value of CFG_MAX_FLASH_BANKS_DETECT is only
|
||
|
* used instead of CFG_MAX_FLASH_BANKS to allocate the array flash_info, and
|
||
|
* should be made sufficiently large to accomodate the number of banks that
|
||
|
* might actually be detected. Since most (all?) Flash related functions use
|
||
|
* CFG_MAX_FLASH_BANKS as the number of actual banks on the board, it is
|
||
|
* defined as mv_board_num_flash_banks.
|
||
|
*/
|
||
|
#define CFG_MAX_FLASH_BANKS_DETECT 5
|
||
|
#ifndef __ASSEMBLY__
|
||
|
extern int mv_board_num_flash_banks;
|
||
|
#endif
|
||
|
#define CFG_MAX_FLASH_BANKS (mv_board_num_flash_banks)
|
||
|
|
||
|
#define CFG_MAX_FLASH_SECT 300 /* max number of sectors on one chip */
|
||
|
#define CFG_FLASH_PROTECTION 1
|
||
|
|
||
|
#define CFG_EXTRA_FLASH_DEVICE DEVICE3 /* extra flash at device 3 */
|
||
|
#define CFG_EXTRA_FLASH_WIDTH 4 /* 32 bit */
|
||
|
#define CFG_BOOT_FLASH_WIDTH 1 /* 8 bit */
|
||
|
|
||
|
#define CFG_FLASH_ERASE_TOUT 120000/1000 /* 120000 - Timeout for Flash Erase (in ms) */
|
||
|
#define CFG_FLASH_WRITE_TOUT 500 /* 500 - Timeout for Flash Write (in ms) */
|
||
|
#define CFG_FLASH_LOCK_TOUT 500 /* 500- Timeout for Flash Lock (in ms) */
|
||
|
|
||
|
|
||
|
/***************************/
|
||
|
/* CFI FLASH organization */
|
||
|
/***************************/
|
||
|
#define CFG_FLASH_CFI_DRIVER
|
||
|
#define CFG_FLASH_CFI 1
|
||
|
#define CFG_FLASH_USE_BUFFER_WRITE
|
||
|
#define CFG_FLASH_QUIET_TEST
|
||
|
#define CFG_FLASH_BANKS_LIST {BOOTDEV_CS_BASE}
|
||
|
#if defined(__BE)
|
||
|
#define CFG_WRITE_SWAPPED_DATA
|
||
|
#endif
|
||
|
|
||
|
#if defined(CONFIG_BUFFALO_PLATFORM)
|
||
|
|
||
|
#define CFG_FLASH_BASE DEVICE_SPI_BASE
|
||
|
#define CFG_FLASH_SIZE _512K
|
||
|
|
||
|
#if defined(MV_SEC_64K)
|
||
|
// #if defined(MV_TINY_IMAGE)
|
||
|
#define CFG_MONITOR_LEN (512 << 10) - 0x10000 /* Reserve 64 kB for Monitor */
|
||
|
// #else
|
||
|
// #define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
|
||
|
// #endif
|
||
|
#endif
|
||
|
#define CFG_ENV_SECT_SIZE 0x10000
|
||
|
|
||
|
#define MONITOR_HEADER_LEN 0x200
|
||
|
|
||
|
|
||
|
#define CFG_MONITOR_IMAGE_OFFSET 0 /* offset of the monitor from the u-boot image */
|
||
|
#define CFG_MONITOR_BASE (CFG_FLASH_BASE)
|
||
|
#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_FLASH_SIZE - CFG_ENV_SECT_SIZE)
|
||
|
#undef CFG_ENV_SIZE
|
||
|
#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE /* environment take 1 block */
|
||
|
#define CFG_ENV_OFFSET (CFG_FLASH_SIZE - CFG_ENV_SIZE)
|
||
|
|
||
|
#else // !defined(CONFIG_BUFFALO_PLATFORM)
|
||
|
|
||
|
#ifdef MV_BOOTROM
|
||
|
#if defined (MV_FLASH_BOOT)
|
||
|
#define CFG_FLASH_BASE DEVICE_MFLASH_BASE
|
||
|
#define CFG_FLASH_SIZE (256 << 10)
|
||
|
#elif defined (MV_SPI_BOOT)
|
||
|
#define CFG_FLASH_BASE DEVICE_SPI_BASE
|
||
|
#define CFG_FLASH_SIZE _16M
|
||
|
#endif
|
||
|
#else
|
||
|
#define CFG_FLASH_BASE BOOTDEV_CS_BASE
|
||
|
#define CFG_FLASH_SIZE BOOTDEV_CS_SIZE
|
||
|
#endif /* MV_BOOTROM */
|
||
|
|
||
|
#define CFG_ENV_SIZE 0x1000
|
||
|
#define MONITOR_HEADER_LEN 0x200
|
||
|
#if defined(MV_SEC_128K)
|
||
|
|
||
|
#if defined(MV_TINY_IMAGE)
|
||
|
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 252 kB for Monitor */
|
||
|
#else
|
||
|
#define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
|
||
|
#endif
|
||
|
|
||
|
#define CFG_ENV_SECT_SIZE 0x20000
|
||
|
|
||
|
#elif defined(MV_SEC_256K)
|
||
|
#if defined(MV_TINY_IMAGE)
|
||
|
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 252 kB for Monitor */
|
||
|
#else
|
||
|
#define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
|
||
|
#endif
|
||
|
|
||
|
#define CFG_ENV_SECT_SIZE 0x40000
|
||
|
#endif
|
||
|
|
||
|
#ifdef MV_BOOTROM
|
||
|
#define CFG_MONITOR_IMAGE_OFFSET 0 /* offset of the monitor from the u-boot image */
|
||
|
#define CFG_MONITOR_BASE (CFG_FLASH_BASE)
|
||
|
#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
|
||
|
#else
|
||
|
#define CFG_MONITOR_IMAGE_OFFSET CFG_ENV_SECT_SIZE /* offset of the monitor from the u-boot image */
|
||
|
#define CFG_MONITOR_BASE (CFG_FLASH_BASE + CFG_FLASH_SIZE \
|
||
|
- CFG_MONITOR_LEN)
|
||
|
#define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SECT_SIZE)
|
||
|
#endif
|
||
|
#endif // defined(CONFIG_BUFFALO_PLATFORM)
|
||
|
|
||
|
/*-----------------------------------------------------------------------
|
||
|
* NAND-FLASH stuff
|
||
|
*-----------------------------------------------------------------------*/
|
||
|
/* Use the new NAND code. */
|
||
|
|
||
|
#undef CFG_NAND_LEGACY
|
||
|
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
|
||
|
#define NAND_MAX_CHIPS CFG_MAX_NAND_DEVICE
|
||
|
|
||
|
/* JFFS2 over NAND define */
|
||
|
#define CONFIG_JFFS2_NAND 1
|
||
|
|
||
|
/* Boot from NAND settings */
|
||
|
/* Duplicate defines from nBootstrap.h */
|
||
|
#ifdef MV_NAND_BOOT
|
||
|
#define CFG_NAND_BOOT
|
||
|
#define CFG_ENV_IS_IN_NAND 1
|
||
|
|
||
|
#if defined(MV_BOOTROM)
|
||
|
#if defined(MV_LARGE_PAGE)
|
||
|
#define CFG_ENV_OFFSET (640 << 10) /* environment starts here */
|
||
|
#undef CFG_ENV_SECT_SIZE
|
||
|
#define CFG_ENV_SECT_SIZE (128 << 10) /* environment take 1 block */
|
||
|
#undef CFG_ENV_SIZE
|
||
|
#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE /* environment take 1 block */
|
||
|
#define CFG_NBOOT_BASE 0
|
||
|
#define CFG_NBOOT_LEN (4 << 10) /* Reserved 4KB for boot strap */
|
||
|
#undef CFG_MONITOR_LEN
|
||
|
#define CFG_MONITOR_LEN (640 << 10) /* Reserve 4 * 128KB + ENV = 640KB for Monitor */
|
||
|
#undef CFG_MONITOR_BASE
|
||
|
#define CFG_MONITOR_BASE 0
|
||
|
#undef CFG_ENV_IS_IN_FLASH
|
||
|
#undef CFG_MONITOR_IMAGE_OFFSET
|
||
|
#define CFG_MONITOR_IMAGE_OFFSET 0 /* offset of the monitor from the u-boot image */
|
||
|
#define CFG_MONITOR_IMAGE_DST TEXT_BASE /* Load NUB to this addr */
|
||
|
#undef CFG_ENV_ADDR
|
||
|
#define CFG_ENV_ADDR CFG_ENV_OFFSET
|
||
|
|
||
|
#else /* ! LARGE PAGE NAND */
|
||
|
|
||
|
#define CFG_ENV_OFFSET 0x84000 /* environment starts here */
|
||
|
#define CFG_NBOOT_BASE 0
|
||
|
#define CFG_NBOOT_LEN (16 << 10) /* Reserved 16kB for boot strap */
|
||
|
#undef CFG_MONITOR_LEN
|
||
|
#define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
|
||
|
#undef CFG_MONITOR_BASE
|
||
|
#define CFG_MONITOR_BASE (CFG_NBOOT_BASE + CFG_NBOOT_LEN)
|
||
|
#undef CFG_ENV_IS_IN_FLASH
|
||
|
#undef CFG_ENV_SECT_SIZE
|
||
|
#define CFG_ENV_SECT_SIZE 0x4000
|
||
|
#undef CFG_MONITOR_IMAGE_OFFSET
|
||
|
#define CFG_MONITOR_IMAGE_OFFSET 0 /* offset of the monitor from the u-boot image */
|
||
|
#define CFG_MONITOR_IMAGE_DST TEXT_BASE /* Load NUB to this addr */
|
||
|
#undef CFG_ENV_ADDR
|
||
|
#define CFG_ENV_ADDR CFG_ENV_OFFSET /* UBOOT_IMAGE_DEST - UBOOT_IMAGE_OFFS */
|
||
|
|
||
|
#endif /* defined(MV_LARGE_PAGE) */
|
||
|
|
||
|
#else /* ! MV_BOOTROM */
|
||
|
|
||
|
#if defined(MV_LARGE_PAGE)
|
||
|
#define CFG_ENV_OFFSET (640 << 10) /* environment starts here */
|
||
|
#undef CFG_ENV_SECT_SIZE
|
||
|
#define CFG_ENV_SECT_SIZE (128 << 10) /* environment take 1 block */
|
||
|
#undef CFG_ENV_SIZE
|
||
|
#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE /* environment take 1 block */
|
||
|
#define CFG_NBOOT_BASE 0
|
||
|
#define CFG_NBOOT_LEN (4 << 10) /* Reserved 4KB for boot strap */
|
||
|
#undef CFG_MONITOR_LEN
|
||
|
#define CFG_MONITOR_LEN (640 << 10) /* Reserve 4 * 128KB + ENV = 640KB for Monitor */
|
||
|
#undef CFG_MONITOR_BASE
|
||
|
#define CFG_MONITOR_BASE 0
|
||
|
#undef CFG_ENV_IS_IN_FLASH
|
||
|
#undef CFG_MONITOR_IMAGE_OFFSET
|
||
|
#define CFG_MONITOR_IMAGE_OFFSET 0 /* offset of the monitor from the u-boot image */
|
||
|
#define CFG_MONITOR_IMAGE_DST TEXT_BASE /* Load NUB to this addr */
|
||
|
#undef CFG_ENV_ADDR
|
||
|
#define CFG_ENV_ADDR CFG_ENV_OFFSET
|
||
|
|
||
|
#else /* ! LARGE PAGE NAND */
|
||
|
|
||
|
#define CFG_ENV_OFFSET (16 << 10) /* environment starts here */
|
||
|
#undef CFG_ENV_SECT_SIZE
|
||
|
#define CFG_ENV_SECT_SIZE (128 << 10)
|
||
|
#undef CFG_ENV_SIZE
|
||
|
#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE /* environment take 1 block */
|
||
|
#define CFG_NBOOT_BASE 0
|
||
|
#define CFG_NBOOT_LEN (4 << 10) /* Reserved 16kB for boot strap */
|
||
|
#undef CFG_MONITOR_LEN
|
||
|
#define CFG_MONITOR_LEN (640 << 10) /* Reserve 4 * 128KB + ENV = 640KB for Monitor */
|
||
|
#undef CFG_MONITOR_BASE
|
||
|
#define CFG_MONITOR_BASE (CFG_ENV_OFFSET)
|
||
|
#undef CFG_ENV_IS_IN_FLASH
|
||
|
#undef CFG_MONITOR_IMAGE_OFFSET
|
||
|
#define CFG_MONITOR_IMAGE_OFFSET CFG_ENV_SECT_SIZE /* offset of the monitor from the u-boot image */
|
||
|
#define CFG_MONITOR_IMAGE_DST TEXT_BASE - CFG_ENV_SECT_SIZE /* Load NUB to this addr */
|
||
|
#undef CFG_ENV_ADDR
|
||
|
#define CFG_ENV_ADDR CFG_MONITOR_IMAGE_DST
|
||
|
#endif /* defined(MV_LARGE_PAGE) */
|
||
|
#endif /* defined(MV_BOOTROM) */
|
||
|
|
||
|
#endif /* MV_NAND_BOOT */
|
||
|
|
||
|
|
||
|
#if defined(RD_88F5181L_FE) || defined(RD_88F5181L_GE) || defined(RD_88F5181L_FXO_GE) || \
|
||
|
defined(RD_88F5181_GTWGE) || defined (RD_88F5181_GTWFE) || \
|
||
|
defined(CONFIG_BUFFALO_PLATFORM)
|
||
|
#define BOARD_LATE_INIT
|
||
|
#endif
|
||
|
|
||
|
#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
|
||
|
#define CONFIG_JFFS2_CMDLINE
|
||
|
#endif /* #if (CONFIG_COMMANDS & CFG_CMD_JFFS2) */
|
||
|
|
||
|
|
||
|
/*****************/
|
||
|
/* others */
|
||
|
/*****************/
|
||
|
#define CFG_DFL_MV_REGS 0xd0000000 /* boot time MV_REGS */
|
||
|
#define CFG_MV_REGS INTER_REGS_BASE /* MV Registers will be mapped here */
|
||
|
|
||
|
#undef CONFIG_USE_IRQ
|
||
|
#define CONFIG_STACKSIZE (1 << 20) /* regular stack - up to 4M (in case of exception)*/
|
||
|
#define CONFIG_NR_DRAM_BANKS 4
|
||
|
|
||
|
#endif /* __CONFIG_H */
|