295 lines
7.6 KiB
C
295 lines
7.6 KiB
C
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/*
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* Copyright (C) 2008 Marvell Semiconductors, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#ifndef _MVSDMMC_INCLUDE
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#define _MVSDMMC_INCLUDE
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#define MV88F6281_SDHC_BASE 0xf1090000 // from 00-4c
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#define P(x) (MV88F6281_SDHC_BASE + (x))
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// #define GPIO_REG_READ32(addr) (*(volatile unsigned int*)(INTEGRATOR_GPIO_BASE+addr))
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// #define GPIO_REG_WRITE32(addr, val) (*(volatile unsigned int*)(INTEGRATOR_GPIO_BASE+addr)=val)
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#define SDIO_REG_WRITE32(addr,val) (*(volatile unsigned long*)(P(addr)) = val)
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#define SDIO_REG_WRITE16(addr,val) (*(volatile unsigned short*)(P(addr)) = val)
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#define SDIO_REG_READ16(addr) (*(volatile unsigned short*)(P(addr)))
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#define SDIO_REG_READ32(addr) (*(volatile unsigned long*)(P(addr)))
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#define MVSDMMC_DMA_SIZE 65536
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#define MVSDMMC_CMD_TIMEOUT 2 /* 100 usec*/
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/*
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* The base MMC clock rate
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*/
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#define MVSDMMC_CLOCKRATE_MIN 100000
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#define MVSDMMC_CLOCKRATE_MAX 50000000
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#define MVSDMMC_BASE_FAST_CLOCK 200000000//100000000
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/*
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* SDIO register
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*/
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#define SDIO_SYS_ADDR_LOW 0x000
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#define SDIO_SYS_ADDR_HI 0x004
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#define SDIO_BLK_SIZE 0x008
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#define SDIO_BLK_COUNT 0x00c
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#define SDIO_ARG_LOW 0x010
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#define SDIO_ARG_HI 0x014
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#define SDIO_XFER_MODE 0x018
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#define SDIO_CMD 0x01c
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#define SDIO_RSP(i) (0x020 + ((i)<<2))
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#define SDIO_RSP0 0x020
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#define SDIO_RSP1 0x024
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#define SDIO_RSP2 0x028
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#define SDIO_RSP3 0x02c
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#define SDIO_RSP4 0x030
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#define SDIO_RSP5 0x034
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#define SDIO_RSP6 0x038
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#define SDIO_RSP7 0x03c
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#define SDIO_BUF_DATA_PORT 0x040
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#define SDIO_RSVED 0x044
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#define SDIO_PRESENT_STATE0 0x048
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#define SDIO_PRESENT_STATE1 0x04c
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#define SDIO_HOST_CTRL 0x050
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#define SDIO_BLK_GAP_CTRL 0x054
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#define SDIO_CLK_CTRL 0x058
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#define SDIO_SW_RESET 0x05c
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#define SDIO_NOR_INTR_STATUS 0x060
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#define SDIO_ERR_INTR_STATUS 0x064
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#define SDIO_NOR_STATUS_EN 0x068
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#define SDIO_ERR_STATUS_EN 0x06c
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#define SDIO_NOR_INTR_EN 0x070
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#define SDIO_ERR_INTR_EN 0x074
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#define SDIO_AUTOCMD12_ERR_STATUS 0x078
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#define SDIO_CURR_BYTE_LEFT 0x07c
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#define SDIO_CURR_BLK_LEFT 0x080
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#define SDIO_AUTOCMD12_ARG_LOW 0x084
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#define SDIO_AUTOCMD12_ARG_HI 0x088
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#define SDIO_AUTOCMD12_INDEX 0x08c
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#define SDIO_AUTO_RSP(i) (0x090 + ((i)<<2))
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#define SDIO_AUTO_RSP0 0x090
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#define SDIO_AUTO_RSP1 0x094
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#define SDIO_AUTO_RSP2 0x098
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#define SDIO_CLK_DIV 0x128
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#define WINDOW_CTRL(i) (0x108 + ((i) << 3))
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#define WINDOW_BASE(i) (0x10c + ((i) << 3))
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/*
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* SDIO_PRESENT_STATE
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*/
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#define CARD_BUSY (1 << 1)
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#define CMD_INHIBIT (1 << 0)
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#define CMD_TXACTIVE (1 << 8)
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#define CMD_RXACTIVE (1 << 9)
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#define CMD_AUTOCMD12ACTIVE (1 << 14)
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#define CMD_BUS_BUSY (CMD_AUTOCMD12ACTIVE| \
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CMD_RXACTIVE| \
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CMD_TXACTIVE| \
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CMD_INHIBIT| \
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CARD_BUSY)
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/*
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* SDIO_CMD
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*/
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#define SDIO_CMD_RSP_NONE (0 << 0)
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#define SDIO_CMD_RSP_136 (1 << 0)
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#define SDIO_CMD_RSP_48 (2 << 0)
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#define SDIO_CMD_RSP_48BUSY (3 << 0)
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#define SDIO_CMD_CHECK_DATACRC16 (1 << 2)
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#define SDIO_CMD_CHECK_CMDCRC (1 << 3)
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#define SDIO_CMD_INDX_CHECK (1 << 4)
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#define SDIO_CMD_DATA_PRESENT (1 << 5)
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#define SDIO_UNEXPECTED_RESP (1 << 7)
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/*
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* SDIO_XFER_MODE
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*/
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#define SDIO_XFER_MODE_STOP_CLK (1 << 5)
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#define SDIO_XFER_MODE_HW_WR_DATA_EN (1 << 1)
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#define SDIO_XFER_MODE_AUTO_CMD12 (1 << 2)
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#define SDIO_XFER_MODE_INT_CHK_EN (1 << 3)
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#define SDIO_XFER_MODE_TO_HOST (1 << 4)
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/*
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* SDIO_HOST_CTRL
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*/
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#define SDIO_HOST_CTRL_PUSH_PULL_EN (1 << 0)
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#define SDIO_HOST_CTRL_CARD_TYPE_MEM_ONLY (0 << 1)
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#define SDIO_HOST_CTRL_CARD_TYPE_IO_ONLY (1 << 1)
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#define SDIO_HOST_CTRL_CARD_TYPE_IO_MEM_COMBO (2 << 1)
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#define SDIO_HOST_CTRL_CARD_TYPE_IO_MMC (3 << 1)
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#define SDIO_HOST_CTRL_CARD_TYPE_MASK (3 << 1)
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#define SDIO_HOST_CTRL_BIG_ENDIAN (1 << 3)
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#define SDIO_HOST_CTRL_LSB_FIRST (1 << 4)
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#define SDIO_HOST_CTRL_ID_MODE_LOW_FREQ (1 << 5)
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#define SDIO_HOST_CTRL_HALF_SPEED (1 << 6)
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#define SDIO_HOST_CTRL_DATA_WIDTH_4_BITS (1 << 9)
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#define SDIO_HOST_CTRL_HI_SPEED_EN (1 << 10)
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#define SDIO_HOST_CTRL_TMOUT_MASK (0xf << 11)
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#define SDIO_HOST_CTRL_TMOUT_MAX (0xf << 11)
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#define SDIO_HOST_CTRL_TMOUT(x) ((x) << 11)
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#define SDIO_HOST_CTRL_TMOUT_EN (1 << 15)
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#define SDIO_HOST_CTRL_DFAULT_OPEN_DRAIN \
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(SDIO_HOST_CTRL_TMOUT(x)(0xf))
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#define SDIO_HOST_CTRL_DFAULT_PUSH_PULL \
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(SDIO_HOST_CTRL_TMOUT(x)(0xf) | SDIO_HOST_CTRL_PUSH_PULL_EN)
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/*
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* NOR status bits
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*/
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#define SDIO_NOR_ERROR (1 << 15)
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#define SDIO_NOR_UNEXP_RSP (1 << 14)
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#define SDIO_NOR_AUTOCMD12_DONE (1 << 13)
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#define SDIO_NOR_SUSPEND_ON (1 << 12)
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#define SDIO_NOR_LMB_FF_8W_AVAIL (1 << 11)
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#define SDIO_NOR_LMB_FF_8W_FILLED (1 << 10)
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#define SDIO_NOR_READ_WAIT_ON (1 << 9)
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#define SDIO_NOR_CARD_INT (1 << 8)
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#define SDIO_NOR_READ_READY (1 << 5)
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#define SDIO_NOR_WRITE_READY (1 << 4)
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#define SDIO_NOR_DMA_INI (1 << 3)
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#define SDIO_NOR_BLK_GAP_EVT (1 << 2)
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#define SDIO_NOR_XFER_DONE (1 << 1)
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#define SDIO_NOR_CMD_DONE (1 << 0)
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/*
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* ERR status bits
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*/
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#define SDIO_ERR_CRC_STATUS (1 << 14)
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#define SDIO_ERR_CRC_STARTBIT (1 << 13)
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#define SDIO_ERR_CRC_ENDBIT (1 << 12)
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#define SDIO_ERR_RESP_TBIT (1 << 11)
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#define SDIO_ERR_SIZE (1 << 10)
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#define SDIO_ERR_CMD_STARTBIT (1 << 9)
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#define SDIO_ERR_AUTOCMD12 (1 << 8)
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#define SDIO_ERR_DATA_ENDBIT (1 << 6)
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#define SDIO_ERR_DATA_CRC (1 << 5)
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#define SDIO_ERR_DATA_TIMEOUT (1 << 4)
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#define SDIO_ERR_CMD_INDEX (1 << 3)
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#define SDIO_ERR_CMD_ENDBIT (1 << 2)
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#define SDIO_ERR_CMD_CRC (1 << 1)
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#define SDIO_ERR_CMD_TIMEOUT (1 << 0)
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#define SDIO_POLL_MASK 0xffff /* enable all for polling */
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#define MMC_BLOCK_SIZE 512
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#define MMC_CMD_RESET 0
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#define MMC_CMD_SEND_OP_COND 1
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#define MMC_CMD_ALL_SEND_CID 2
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#define MMC_CMD_SET_RCA 3
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#define MMC_CMD_SELECT_CARD 7
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#define MMC_CMD_SEND_CSD 9
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#define MMC_CMD_SEND_CID 10
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#define MMC_CMD_SEND_STATUS 13
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#define MMC_CMD_SET_BLOCKLEN 16
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#define MMC_CMD_READ_BLOCK 17
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#define MMC_CMD_RD_BLK_MULTI 18
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#define MMC_CMD_WRITE_BLOCK 24
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#define MMC_MAX_BLOCK_SIZE 512
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typedef struct mmc_cid
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{
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/* FIXME: BYTE_ORDER */
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uchar year:4,
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month:4;
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uchar sn[3];
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uchar fwrev:4,
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hwrev:4;
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uchar name[6];
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uchar id[3];
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} mmc_cid_t;
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typedef struct mmc_csd
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{
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uchar ecc:2,
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file_format:2,
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tmp_write_protect:1,
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perm_write_protect:1,
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copy:1,
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file_format_grp:1;
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uint64_t content_prot_app:1,
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rsvd3:4,
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write_bl_partial:1,
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write_bl_len:4,
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r2w_factor:3,
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default_ecc:2,
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wp_grp_enable:1,
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wp_grp_size:5,
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erase_grp_mult:5,
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erase_grp_size:5,
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c_size_mult1:3,
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vdd_w_curr_max:3,
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vdd_w_curr_min:3,
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vdd_r_curr_max:3,
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vdd_r_curr_min:3,
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c_size:12,
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rsvd2:2,
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dsr_imp:1,
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read_blk_misalign:1,
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write_blk_misalign:1,
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read_bl_partial:1;
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ushort read_bl_len:4,
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ccc:12;
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uchar tran_speed;
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uchar nsac;
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uchar taac;
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uchar rsvd1:2,
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spec_vers:4,
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csd_structure:2;
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} mmc_csd_t;
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typedef struct {
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char pnm_0; /* product name */
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char oid_1; /* OEM/application ID */
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char oid_0;
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uint8_t mid; /* manufacturer ID */
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char pnm_4;
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char pnm_3;
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char pnm_2;
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char pnm_1;
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uint8_t psn_2; /* product serial number */
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uint8_t psn_1;
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uint8_t psn_0; /* MSB */
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uint8_t prv; /* product revision */
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uint8_t crc; /* CRC7 checksum, b0 is unused and set to 1 */
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uint8_t mdt_1; /* manufacturing date, LSB, RRRRyyyy yyyymmmm */
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uint8_t mdt_0; /* MSB */
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uint8_t psn_3; /* LSB */
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} sd_cid_t;
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#endif /* _MVSDMMC_INCLUDE */
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