412 lines
15 KiB
C
412 lines
15 KiB
C
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/*******************************************************************************
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Copyright (C) Marvell International Ltd. and its affiliates
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This software file (the "File") is owned and distributed by Marvell
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International Ltd. and/or its affiliates ("Marvell") under the following
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alternative licensing terms. Once you have made an election to distribute the
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File under one of the following license alternatives, please (i) delete this
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introductory statement regarding license alternatives, (ii) delete the two
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license alternatives that you have not elected to use and (iii) preserve the
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Marvell copyright notice above.
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********************************************************************************
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Marvell Commercial License Option
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If you received this File from Marvell and you have entered into a commercial
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license agreement (a "Commercial License") with Marvell, the File is licensed
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to you under the terms of the applicable Commercial License.
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********************************************************************************
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Marvell GPL License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File in accordance with the terms and conditions of the General
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Public License Version 2, June 1991 (the "GPL License"), a copy of which is
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available along with the File in the license.txt file or by writing to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
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on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
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THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
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WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
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DISCLAIMED. The GPL License provides additional details about this warranty
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disclaimer.
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********************************************************************************
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Marvell BSD License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File under the following licensing terms.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of Marvell nor the names of its contributors may be
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used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************/
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#ifndef __INCMVAudioRegsH
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#define __INCMVAudioRegsH
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#include "ctrlEnv/mvCtrlEnvSpec.h"
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/* Audio source Clocks enum*/
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typedef enum _mvAudioClock
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{
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AUDIO_DCO_CLK = 0,
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AUDIO_SPCR_CLK = 2,
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AUDIO_EXT_CLK = 3
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}MV_AUDIO_CLOCK;
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typedef enum _mvAudioFreq
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{
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AUDIO_FREQ_44_1KH = 0, /* 11.2896Mhz */
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AUDIO_FREQ_48KH = 1, /* 12.288Mhz */
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AUDIO_FREQ_96KH =2, /* 24.576Mhz */
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AUDIO_FREQ_LOWER_44_1KH = 3 ,/*Lower than 11.2896MHz*/
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AUDIO_FREQ_HIGHER_96KH = 4, /*Higher than 24.576MHz*/
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AUDIO_FREQ_OTHER = 7, /*Other frequency*/
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}MV_AUDIO_FREQ;
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typedef enum _mvAudioSampleFreq
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{
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SMAPLE_8KHZ = 0,
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SMAPLE_16KHZ,
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SMAPLE_22_05KHZ,
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SMAPLE_24KHZ,
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SMAPLE_32KHZ,
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SMAPLE_44_1KHZ,
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SMAPLE_48KHZ,
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SMAPLE_64KHZ,
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SMAPLE_88KHZ,
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SMAPLE_96KHZ,
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SMAPLE_176KHZ,
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SMAPLE_192KHZ
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}MV_AUDIO_SAMPLE_FREQ;
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typedef enum _mvAudioBurstSize
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{
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AUDIO_32BYTE_BURST = 1,
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AUDIO_128BYTE_BURST = 2,
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}MV_AUDIO_BURST_SIZE;
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typedef enum _mvAudioPlaybackMono
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{
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AUDIO_PLAY_MONO_OFF = 0,
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AUDIO_PLAY_LEFT_MONO = 1,
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AUDIO_PLAY_RIGHT_MONO = 2,
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AUDIO_PLAY_BOTH_MONO = 3,
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AUDIO_PLAY_OTHER_MONO = 4
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}MV_AUDIO_PLAYBACK_MONO;
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typedef enum _mvAudioRecordMono
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{
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AUDIO_REC_LEFT_MONO = 0,
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AUDIO_REC_RIGHT_MONO = 1,
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}MV_AUDIO_RECORD_MONO;
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typedef enum _mvAudioSampleSize
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{
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SAMPLE_32BIT = 0,
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SAMPLE_24BIT = 1,
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SAMPLE_20BIT = 2,
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SAMPLE_16BIT = 3,
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SAMPLE_16BIT_NON_COMPACT = 7
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}MV_AUDIO_SAMPLE_SIZE;
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typedef enum _mvAudioI2SJustification
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{
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LEFT_JUSTIFIED = 0,
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I2S_JUSTIFIED = 5,
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RISE_BIT_CLCK_JUSTIFIED =7,
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RIGHT_JUSTIFIED = 8,
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}MV_AUDIO_I2S_JUSTIFICATION;
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#define APBBCR_SIZE_MAX 0x3FFFFF
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#define APBBCR_SIZE_SHIFT 0x2
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#define AUDIO_REG_TO_SIZE(reg) (((reg) + 1) << APBBCR_SIZE_SHIFT)
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#define AUDIO_SIZE_TO_REG(size) (((size) >> APBBCR_SIZE_SHIFT) - 1)
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#define MV_AUDIO_BUFFER_MIN_ALIGN 0x8
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/********************/
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/* Clocking Control*/
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/*******************/
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#define MV_AUDIO_PLL_CTRL1_REG(unit) (AUDIO_REG_BASE(unit) + 0x1200)
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#define MV_AUDIO_DCO_CTRL_REG(unit) (AUDIO_REG_BASE(unit) + 0x1204)
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#define MV_AUDIO_SPCR_DCO_STATUS_REG(unit) (AUDIO_REG_BASE(unit) + 0x120c)
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#define MV_AUDIO_SAMPLE_CNTR_CTRL_REG(unit) (AUDIO_REG_BASE(unit) + 0x1220)
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#define MV_AUDIO_PLAYBACK_SAMPLE_CNTR_REG(unit) (AUDIO_REG_BASE(unit) + 0x1224)
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#define MV_AUDIO_RECORD_SAMPLE_CNTR_REG(unit) (AUDIO_REG_BASE(unit) + 0x1228)
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#define MV_AUDIO_CLOCK_CTRL_REG(unit) (AUDIO_REG_BASE(unit) + 0x1230)
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/* MV_AUDIO_DCO_CTRL_REG */
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#define ADCR_DCO_CTRL_FS_OFFS 0
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#define ADCR_DCO_CTRL_FS_MASK (0x3 << ADCR_DCO_CTRL_FS_OFFS)
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#define ADCR_DCO_CTRL_FS_44_1KHZ (0x0 << ADCR_DCO_CTRL_FS_OFFS)
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#define ADCR_DCO_CTRL_FS_48KHZ (0x1 << ADCR_DCO_CTRL_FS_OFFS)
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#define ADCR_DCO_CTRL_FS_96KHZ (0x2 << ADCR_DCO_CTRL_FS_OFFS)
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#define ADCR_DCO_CTRL_OFFSET_OFFS 2
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#define ADCR_DCO_CTRL_OFFSET_MASK (0xfff << ADCR_DCO_CTRL_OFFSET_OFFS)
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/* MV_AUDIO_SPCR_DCO_STATUS_REG */
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#define ASDSR_SPCR_CTRLFS_OFFS 0
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#define ASDSR_SPCR_CTRLFS_MASK (0x7 << ASDSR_SPCR_CTRLFS_OFFS)
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#define ASDSR_SPCR_CTRLFS_44_1KHZ (0x0 << ASDSR_SPCR_CTRLFS_OFFS)
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#define ASDSR_SPCR_CTRLFS_48KHZ (0x1 << ASDSR_SPCR_CTRLFS_OFFS)
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#define ASDSR_SPCR_CTRLFS_96KHZ (0x2 << ASDSR_SPCR_CTRLFS_OFFS)
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#define ASDSR_SPCR_CTRLFS_44_1KHZ_LESS (0x3 << ASDSR_SPCR_CTRLFS_OFFS)
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#define ASDSR_SPCR_CTRLFS_96KHZ_MORE (0x4 << ASDSR_SPCR_CTRLFS_OFFS)
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#define ASDSR_SPCR_CTRLFS_OTHER (0x7 << ASDSR_SPCR_CTRLFS_OFFS)
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#define ASDSR_SPCR_CTRLOFFSET_OFFS 3
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#define ASDSR_SPCR_CTRLOFFSET_MASK (0xfff << ASDSR_SPCR_CTRLOFFSET_OFFS)
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#define ASDSR_SPCR_LOCK_OFFS 15
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#define ASDSR_SPCR_LOCK_MASK (0x1 << ASDSR_SPCR_LOCK_OFFS)
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#define ASDSR_DCO_LOCK_OFFS 16
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#define ASDSR_DCO_LOCK_MASK (0x1 << ASDSR_DCO_LOCK_OFFS)
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#define ASDSR_PLL_LOCK_OFFS 17
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#define ASDSR_PLL_LOCK_MASK (0x1 << ASDSR_PLL_LOCK_OFFS)
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/*MV_AUDIO_SAMPLE_CNTR_CTRL_REG */
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#define ASCCR_CLR_PLAY_CNTR_OFFS 9
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#define ASCCR_CLR_PLAY_CNTR_MASK (0x1 << ASCCR_CLR_PLAY_CNTR_OFFS)
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#define ASCCR_CLR_REC_CNTR_OFFS 8
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#define ASCCR_CLR_REC_CNTR_MASK (0x1 << ASCCR_CLR_REC_CNTR_OFFS)
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#define ASCCR_ACTIVE_PLAY_CNTR_OFFS 1
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#define ASCCR_ACTIVE_PLAY_CNTR_MASK (0x1 << ASCCR_ACTIVE_PLAY_CNTR_OFFS)
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#define ASCCR_ACTIVE_REC_CNTR_OFFS 0
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#define ASCCR_ACTIVE_REC_CNTR_MASK (0x1 << ASCCR_ACTIVE_REC_CNTR_OFFS)
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/* MV_AUDIO_CLOCK_CTRL_REG */
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#define ACCR_MCLK_SOURCE_OFFS 0
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#define ACCR_MCLK_SOURCE_MASK (0x3 << ACCR_MCLK_SOURCE_OFFS)
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#define ACCR_MCLK_SOURCE_DCO (0x0 << ACCR_MCLK_SOURCE_OFFS)
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#define ACCR_MCLK_SOURCE_SPCR (0x2 << ACCR_MCLK_SOURCE_OFFS)
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#define ACCR_MCLK_SOURCE_EXT (0x3 << ACCR_MCLK_SOURCE_OFFS)
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/********************/
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/* Interrupts */
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/*******************/
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#define MV_AUDIO_ERROR_CAUSE_REG(unit) (AUDIO_REG_BASE(unit) + 0x1300)
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#define MV_AUDIO_ERROR_MASK_REG(unit) (AUDIO_REG_BASE(unit) + 0x1304)
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#define MV_AUDIO_INT_CAUSE_REG(unit) (AUDIO_REG_BASE(unit) + 0x1308)
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#define MV_AUDIO_INT_MASK_REG(unit) (AUDIO_REG_BASE(unit) + 0x130C)
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#define MV_AUDIO_RECORD_BYTE_CNTR_INT_REG(unit) (AUDIO_REG_BASE(unit) + 0x1310)
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#define MV_AUDIO_PLAYBACK_BYTE_CNTR_INT_REG(unit) (AUDIO_REG_BASE(unit) + 0x1314)
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/* MV_AUDIO_INT_CAUSE_REG*/
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#define AICR_RECORD_BYTES_INT (0x1 << 13)
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#define AICR_PLAY_BYTES_INT (0x1 << 14)
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#define ARBCI_BYTE_COUNT_MASK 0xFFFFFF
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#define APBCI_BYTE_COUNT_MASK 0xFFFFFF
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/********************/
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/* Audio Playback */
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/*******************/
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/* General */
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#define MV_AUDIO_PLAYBACK_CTRL_REG(unit) (AUDIO_REG_BASE(unit) + 0x1100)
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#define MV_AUDIO_PLAYBACK_BUFF_START_REG(unit) (AUDIO_REG_BASE(unit) + 0x1104)
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#define MV_AUDIO_PLAYBACK_BUFF_SIZE_REG(unit) (AUDIO_REG_BASE(unit) + 0x1108)
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#define MV_AUDIO_PLAYBACK_BUFF_BYTE_CNTR_REG(unit) (AUDIO_REG_BASE(unit) + 0x110c)
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/*SPDIF */
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#define MV_AUDIO_SPDIF_PLAY_CTRL_REG(unit) (AUDIO_REG_BASE(unit) + 0x2204)
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#define MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(unit,ind) \
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(AUDIO_REG_BASE(unit) + 0x2280 + (ind << 2))
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#define MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(unit,ind) \
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(AUDIO_REG_BASE(unit) + 0x22a0 + (ind << 2))
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#define MV_AUDIO_SPDIF_PLAY_USR_BITS_LEFT_REG(unit,ind) \
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(AUDIO_REG_BASE(unit) + 0x22c0 + (ind << 2))
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#define MV_AUDIO_SPDIF_PLAY_USR_BITS_RIGHT_REG(unit,ind) \
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(AUDIO_REG_BASE(unit) + 0x22e0 + (ind << 2))
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/*I2S*/
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#define MV_AUDIO_I2S_PLAY_CTRL_REG(unit) (AUDIO_REG_BASE(unit) + 0x2508)
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/* MV_AUDIO_PLAYBACK_CTRL_REG */
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#define APCR_PLAY_SAMPLE_SIZE_OFFS 0
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#define APCR_PLAY_SAMPLE_SIZE_MASK (0x7 << APCR_PLAY_SAMPLE_SIZE_OFFS)
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#define APCR_PLAY_I2S_ENABLE_OFFS 3
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#define APCR_PLAY_I2S_ENABLE_MASK (0x1 << APCR_PLAY_I2S_ENABLE_OFFS)
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#define APCR_PLAY_SPDIF_ENABLE_OFFS 4
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#define APCR_PLAY_SPDIF_ENABLE_MASK (0x1 << APCR_PLAY_SPDIF_ENABLE_OFFS)
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#define APCR_PLAY_MONO_OFFS 5
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#define APCR_PLAY_MONO_MASK (0x3 << APCR_PLAY_MONO_OFFS)
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#define APCR_PLAY_I2S_MUTE_OFFS 7
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#define APCR_PLAY_I2S_MUTE_MASK (0x1 << APCR_PLAY_I2S_MUTE_OFFS)
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#define APCR_PLAY_SPDIF_MUTE_OFFS 8
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#define APCR_PLAY_SPDIF_MUTE_MASK (0x1 << APCR_PLAY_SPDIF_MUTE_OFFS)
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#define APCR_PLAY_PAUSE_OFFS 9
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#define APCR_PLAY_PAUSE_MASK (0x1 << APCR_PLAY_PAUSE_OFFS)
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#define APCR_LOOPBACK_OFFS 10
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#define APCR_LOOPBACK_MASK (0x1 << APCR_LOOPBACK_OFFS)
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#define APCR_PLAY_BURST_SIZE_OFFS 11
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#define APCR_PLAY_BURST_SIZE_MASK (0x3 << APCR_PLAY_BURST_SIZE_OFFS)
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#define APCR_PLAY_BUSY_OFFS 16
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#define APCR_PLAY_BUSY_MASK (0x1 << APCR_PLAY_BUSY_OFFS)
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/* MV_AUDIO_PLAYBACK_BUFF_BYTE_CNTR_REG */
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#define APBBCR_SIZE_MAX 0x3FFFFF
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#define APBBCR_SIZE_SHIFT 0x2
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/* MV_AUDIO_SPDIF_PLAY_CTRL_REG */
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#define ASPCR_SPDIF_BLOCK_START_OFFS 0x0
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#define ASPCR_SPDIF_BLOCK_START_MASK (0x1 << ASPCR_SPDIF_BLOCK_START_OFFS)
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#define ASPCR_SPDIF_PB_EN_MEM_VALIDITY_OFFS 0x1
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#define ASPCR_SPDIF_PB_EN_MEM_VALIDITY_MASK (0x1 << ASPCR_SPDIF_PB_EN_MEM_VALIDITY_OFFS)
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#define ASPCR_SPDIF_PB_MEM_USR_EN_OFFS 0x2
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#define ASPCR_SPDIF_PB_MEM_USR_EN_MASK (0x1 << ASPCR_SPDIF_PB_MEM_USR_EN_OFFS)
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#define ASPCR_SPDIF_UNDERRUN_DATA_OFFS 0x5
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#define ASPCR_SPDIF_UNDERRUN_DATA_MASK (0x1 << ASPCR_SPDIF_UNDERRUN_DATA_OFFS)
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#define ASPCR_SPDIF_PB_REG_VALIDITY_OFFS 16
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#define ASPCR_SPDIF_PB_REG_VALIDITY_MASK (0x1 << ASPCR_SPDIF_PB_REG_VALIDITY_OFFS)
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#define ASPCR_SPDIF_PB_NONPCM_OFFS 17
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#define ASPCR_SPDIF_PB_NONPCM_MASK (0x1 << ASPCR_SPDIF_PB_NONPCM_OFFS)
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/* MV_AUDIO_I2S_PLAY_CTRL_REG */
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#define AIPCR_I2S_SEND_LAST_FRM_OFFS 23
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#define AIPCR_I2S_SEND_LAST_FRM_MASK (1 << AIPCR_I2S_SEND_LAST_FRM_OFFS)
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#define AIPCR_I2S_PB_JUSTF_OFFS 26
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#define AIPCR_I2S_PB_JUSTF_MASK (0xf << AIPCR_I2S_PB_JUSTF_OFFS)
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#define AIPCR_I2S_PB_SAMPLE_SIZE_OFFS 30
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#define AIPCR_I2S_PB_SAMPLE_SIZE_MASK (0x3 << AIPCR_I2S_PB_SAMPLE_SIZE_OFFS)
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/********************/
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/* Audio Recordnig */
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/*******************/
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/* General */
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#define MV_AUDIO_RECORD_CTRL_REG(unit) (AUDIO_REG_BASE(unit) + 0x1000)
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#define MV_AUDIO_RECORD_START_ADDR_REG(unit) (AUDIO_REG_BASE(unit) + 0x1004)
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#define MV_AUDIO_RECORD_BUFF_SIZE_REG(unit) (AUDIO_REG_BASE(unit) + 0x1008)
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#define MV_AUDIO_RECORD_BUF_BYTE_CNTR_REG(unit) (AUDIO_REG_BASE(unit) + 0x100C)
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/*SPDIF */
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#define MV_AUDIO_SPDIF_REC_GEN_REG(unit) (AUDIO_REG_BASE(unit) + 0x2004)
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#define MV_AUDIO_SPDIF_REC_INT_CAUSE_MASK_REG(unit) (AUDIO_REG_BASE(unit) + 0x2008)
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#define MV_AUDIO_SPDIF_REC_CH_STATUS_LEFT_REG(unit,ind) \
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(AUDIO_REG_BASE(unit) + 0x2180 + ((ind) << 2))
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#define MV_AUDIO_SPDIF_REC_CH_STATUS_RIGHT_REG(unit,ind) \
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(AUDIO_REG_BASE(unit) + 0x21a0 + ((ind) << 2))
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#define MV_AUDIO_SPDIF_REC_USR_BITS_LEFT_REG(unit,ind) \
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(AUDIO_REG_BASE(unit) + 0x21c0 + ((ind) << 2))
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#define MV_AUDIO_SPDIF_REC_USR_BITS_RIGHT_REG(unit,ind) \
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(AUDIO_REG_BASE(unit) + 0x21e0 + ((ind) << 2))
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/*I2S*/
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#define MV_AUDIO_I2S_REC_CTRL_REG(unit) (AUDIO_REG_BASE(unit) + 0x2408)
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/* MV_AUDIO_RECORD_CTRL_REG*/
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#define ARCR_RECORD_SAMPLE_SIZE_OFFS 0
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#define ARCR_RECORD_SAMPLE_SIZE_MASK (0x7 << ARCR_RECORD_SAMPLE_SIZE_OFFS)
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#define ARCR_RECORDED_MONO_CHNL_OFFS 3
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#define ARCR_RECORDED_MONO_CHNL_MASK (0x1 << ARCR_RECORDED_MONO_CHNL_OFFS)
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#define ARCR_RECORD_MONO_OFFS 4
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#define ARCR_RECORD_MONO_MASK (0x1 << ARCR_RECORD_MONO_OFFS)
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#define ARCR_RECORD_BURST_SIZE_OFFS 5
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#define ARCR_RECORD_BURST_SIZE_MASK (0x3 << ARCR_RECORD_BURST_SIZE_OFFS)
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#define ARCR_RECORD_MUTE_OFFS 8
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#define ARCR_RECORD_MUTE_MASK (0x1 << ARCR_RECORD_MUTE_OFFS)
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#define ARCR_RECORD_PAUSE_OFFS 9
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#define ARCR_RECORD_PAUSE_MASK (0x1 << ARCR_RECORD_PAUSE_OFFS)
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#define ARCR_RECORD_I2S_EN_OFFS 10
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#define ARCR_RECORD_I2S_EN_MASK (0x1 << ARCR_RECORD_I2S_EN_OFFS)
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#define ARCR_RECORD_SPDIF_EN_OFFS 11
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#define ARCR_RECORD_SPDIF_EN_MASK (0x1 << ARCR_RECORD_SPDIF_EN_OFFS)
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/* MV_AUDIO_SPDIF_REC_GEN_REG*/
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#define ASRGR_CORE_CLK_FREQ_OFFS 1
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#define ASRGR_CORE_CLK_FREQ_MASK (0x3 << ASRGR_CORE_CLK_FREQ_OFFS)
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#define ASRGR_CORE_CLK_FREQ_133MHZ (0x0 << ASRGR_CORE_CLK_FREQ_OFFS)
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#define ASRGR_CORE_CLK_FREQ_150MHZ (0x1 << ASRGR_CORE_CLK_FREQ_OFFS)
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#define ASRGR_CORE_CLK_FREQ_166MHZ (0x2 << ASRGR_CORE_CLK_FREQ_OFFS)
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#define ASRGR_CORE_CLK_FREQ_200MHZ (0x3 << ASRGR_CORE_CLK_FREQ_OFFS)
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#define ASRGR_VALID_PCM_INFO_OFFS 7
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#define ASRGR_VALID_PCM_INFO_MASK (0x1 << ASRGR_VALID_PCM_INFO_OFFS)
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#define ASRGR_SAMPLE_FREQ_OFFS 8
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#define ASRGR_SAMPLE_FREQ_MASK (0xf << ASRGR_SAMPLE_FREQ_OFFS)
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#define ASRGR_NON_PCM_OFFS 14
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#define ASRGR_NON_PCM_MASK (1 << ASRGR_NON_PCM_OFFS)
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/* MV_AUDIO_I2S_REC_CTRL_REG*/
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#define AIRCR_I2S_RECORD_JUSTF_OFFS 26
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#define AIRCR_I2S_RECORD_JUSTF_MASK (0xf << AIRCR_I2S_RECORD_JUSTF_OFFS)
|
||
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||
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#define AIRCR_I2S_SAMPLE_SIZE_OFFS 30
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||
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#define AIRCR_I2S_SAMPLE_SIZE_MASK (0x3 << AIRCR_I2S_SAMPLE_SIZE_OFFS)
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||
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#endif /* __INCMVAudioRegsH */
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