173 lines
6.7 KiB
C
173 lines
6.7 KiB
C
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/*******************************************************************************
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Copyright (C) Marvell International Ltd. and its affiliates
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This software file (the "File") is owned and distributed by Marvell
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International Ltd. and/or its affiliates ("Marvell") under the following
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alternative licensing terms. Once you have made an election to distribute the
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File under one of the following license alternatives, please (i) delete this
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introductory statement regarding license alternatives, (ii) delete the two
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license alternatives that you have not elected to use and (iii) preserve the
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Marvell copyright notice above.
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********************************************************************************
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Marvell Commercial License Option
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If you received this File from Marvell and you have entered into a commercial
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license agreement (a "Commercial License") with Marvell, the File is licensed
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to you under the terms of the applicable Commercial License.
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********************************************************************************
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Marvell GPL License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File in accordance with the terms and conditions of the General
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Public License Version 2, June 1991 (the "GPL License"), a copy of which is
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available along with the File in the license.txt file or by writing to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
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on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
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THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
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WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
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DISCLAIMED. The GPL License provides additional details about this warranty
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disclaimer.
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********************************************************************************
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Marvell BSD License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File under the following licensing terms.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of Marvell nor the names of its contributors may be
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used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************/
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#ifndef __INCmvDramIfh
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#define __INCmvDramIfh
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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/* includes */
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#include "ddr2/mvDramIfRegs.h"
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#include "ddr2/mvDramIfConfig.h"
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#include "ctrlEnv/mvCtrlEnvLib.h"
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/* defines */
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/* DRAM Timing parameters */
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#define SDRAM_TWR 15 /* ns tWr */
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#define SDRAM_TRFC_64_512M_AT_200MHZ 70 /* ns tRfc for dens 64-512 @ 200MHz */
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#define SDRAM_TRFC_64_512M 75 /* ns tRfc for dens 64-512 */
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#define SDRAM_TRFC_1G 120 /* ns tRfc for dens 1GB */
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#define SDRAM_TR2R_CYC 1 /* cycle for tR2r */
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#define CAL_AUTO_DETECT 0 /* Do not force CAS latancy (mvDramIfDetect) */
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#define ECC_DISABLE 1 /* Force ECC to Disable */
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#define ECC_ENABLE 0 /* Force ECC to ENABLE */
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/* typedefs */
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/* enumeration for memory types */
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typedef enum _mvMemoryType
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{
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MEM_TYPE_SDRAM,
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MEM_TYPE_DDR1,
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MEM_TYPE_DDR2
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}MV_MEMORY_TYPE;
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/* enumeration for DDR2 supported CAS Latencies */
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typedef enum _mvDimmDdr2Cas
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{
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DDR2_CL_3 = 0x08,
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DDR2_CL_4 = 0x10,
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DDR2_CL_5 = 0x20,
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DDR2_CL_6 = 0x40,
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DDR2_CL_FAULT
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} MV_DIMM_DDR2_CAS;
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typedef struct _mvDramBankInfo
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{
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MV_MEMORY_TYPE memoryType; /* DDR1, DDR2 or SDRAM */
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/* DIMM dimensions */
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MV_U32 numOfRowAddr;
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MV_U32 numOfColAddr;
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MV_U32 dataWidth;
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MV_U32 errorCheckType; /* ECC , PARITY..*/
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MV_U32 sdramWidth; /* 4,8,16 or 32 */
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MV_U32 errorCheckDataWidth; /* 0 - no, 1 - Yes */
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MV_U32 burstLengthSupported;
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MV_U32 numOfBanksOnEachDevice;
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MV_U32 suportedCasLatencies;
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MV_U32 refreshInterval;
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/* DIMM timing parameters */
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MV_U32 minCycleTimeAtMaxCasLatPs;
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MV_U32 minCycleTimeAtMaxCasLatMinus1Ps;
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MV_U32 minCycleTimeAtMaxCasLatMinus2Ps;
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MV_U32 minRowPrechargeTime;
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MV_U32 minRowActiveToRowActive;
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MV_U32 minRasToCasDelay;
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MV_U32 minRasPulseWidth;
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MV_U32 minWriteRecoveryTime; /* DDR2 only */
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MV_U32 minWriteToReadCmdDelay; /* DDR2 only */
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MV_U32 minReadToPrechCmdDelay; /* DDR2 only */
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MV_U32 minRefreshToActiveCmd; /* DDR2 only */
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/* Parameters calculated from the extracted DIMM information */
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MV_U32 size;
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MV_U32 deviceDensity; /* 16,64,128,256 or 512 Mbit */
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MV_U32 numberOfDevices;
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/* DIMM attributes (MV_TRUE for yes) */
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MV_BOOL registeredAddrAndControlInputs;
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MV_BOOL registeredDQMBinputs;
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}MV_DRAM_BANK_INFO;
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#include "ddr2/spd/mvSpd.h"
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/* mvDramIf.h API list */
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MV_VOID mvDramIfBasicAsmInit(MV_VOID);
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MV_STATUS mvDramIfDetect(MV_U32 forcedCl, MV_BOOL eccDisable);
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MV_VOID _mvDramIfConfig(int entryNum);
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MV_U32 mvDramIfBankSizeGet(MV_U32 bankNum);
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MV_U32 mvDramIfBankBaseGet(MV_U32 bankNum);
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MV_U32 mvDramIfSizeGet(MV_VOID);
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MV_U32 mvDramIfCalGet(void);
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MV_STATUS mvDramIfSingleBitErrThresholdSet(MV_U32 threshold);
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MV_VOID mvDramIfSelfRefreshSet(void);
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void mvDramIfShow(void);
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MV_U32 mvDramIfGetFirstCS(void);
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MV_U32 mvDramIfGetCSorder(MV_U32 csOrder );
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MV_U32 mvDramCsSizeGet(MV_U32 csNum);
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* __INCmvDramIfh */
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