742 lines
29 KiB
C
742 lines
29 KiB
C
/*******************************************************************************
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Copyright (C) Marvell International Ltd. and its affiliates
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This software file (the "File") is owned and distributed by Marvell
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International Ltd. and/or its affiliates ("Marvell") under the following
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alternative licensing terms. Once you have made an election to distribute the
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File under one of the following license alternatives, please (i) delete this
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introductory statement regarding license alternatives, (ii) delete the two
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license alternatives that you have not elected to use and (iii) preserve the
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Marvell copyright notice above.
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********************************************************************************
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Marvell Commercial License Option
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If you received this File from Marvell and you have entered into a commercial
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license agreement (a "Commercial License") with Marvell, the File is licensed
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to you under the terms of the applicable Commercial License.
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********************************************************************************
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Marvell GPL License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File in accordance with the terms and conditions of the General
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Public License Version 2, June 1991 (the "GPL License"), a copy of which is
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available along with the File in the license.txt file or by writing to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
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on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
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THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
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WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
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DISCLAIMED. The GPL License provides additional details about this warranty
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disclaimer.
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********************************************************************************
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Marvell BSD License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File under the following licensing terms.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of Marvell nor the names of its contributors may be
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used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************/
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/*******************************************************************************
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* mvEth.h - Header File for : Marvell Gigabit Ethernet Controller
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*
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* DESCRIPTION:
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* This header file contains macros typedefs and function declaration specific to
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* the Marvell Gigabit Ethernet Controller.
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*
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* DEPENDENCIES:
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* None.
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*
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*******************************************************************************/
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#ifndef __mvEthGbe_h__
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#define __mvEthGbe_h__
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extern MV_BOOL ethDescInSram;
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extern MV_BOOL ethDescSwCoher;
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extern ETH_PORT_CTRL* ethPortCtrl[];
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static INLINE MV_ULONG ethDescVirtToPhy(ETH_QUEUE_CTRL* pQueueCtrl, MV_U8* pDesc)
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{
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#if defined (ETH_DESCR_IN_SRAM)
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if( ethDescInSram )
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return mvSramVirtToPhy(pDesc);
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else
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#endif /* ETH_DESCR_IN_SRAM */
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return (pQueueCtrl->descBuf.bufPhysAddr + (pDesc - pQueueCtrl->descBuf.bufVirtPtr));
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}
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/* Return port handler */
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#define mvEthPortHndlGet(port) ethPortCtrl[port]
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/* Used as WA for HW/SW race on TX */
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static INLINE int mvEthPortTxEnable(void* pPortHndl, int queue, int max_deep)
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{
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int deep = 0;
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MV_U32 txCurrReg, txEnReg;
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ETH_TX_DESC* pTxLastDesc;
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ETH_QUEUE_CTRL* pQueueCtrl;
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ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
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txEnReg = MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo));
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if( (txEnReg & MV_32BIT_LE_FAST(ETH_TXQ_ENABLE_MASK)) == 0)
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{
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MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo)) = pPortCtrl->portTxQueueCmdReg;
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return 0;
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}
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pQueueCtrl = &pPortCtrl->txQueue[queue];
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pTxLastDesc = pQueueCtrl->pCurrentDescr;
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txCurrReg = MV_REG_READ(ETH_TX_CUR_DESC_PTR_REG(pPortCtrl->portNo, queue));
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if(ethDescVirtToPhy(pQueueCtrl, (MV_U8*)pTxLastDesc) == txCurrReg)
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{
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/* All descriptors are processed, no chance for race */
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return 0;
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}
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/* Check distance betwee HW and SW location: */
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/* If distance between HW and SW pointers is less than mvEthTxEnDeep descriptors */
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/* Race condition is possible, so wait end of TX and restart TXQ */
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while(deep < max_deep)
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{
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pTxLastDesc = TX_PREV_DESC_PTR(pTxLastDesc, pQueueCtrl);
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if(ethDescVirtToPhy(pQueueCtrl, (MV_U8*)pTxLastDesc) == txCurrReg)
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{
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int count = 0;
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while( (txEnReg & MV_32BIT_LE_FAST(0x000000FF)) != 0)
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{
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count++;
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if(count > 10000)
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{
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mvOsPrintf("mvEthPortTxEnable: timeout - TXQ_CMD=0x%08x\n",
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MV_REG_READ(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo)) );
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break;
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}
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txEnReg = MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo));
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}
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MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo)) = pPortCtrl->portTxQueueCmdReg;
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return count;
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}
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deep++;
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}
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/* Distance between HW and SW pointers is more than mvEthTxEnDeep descriptors, */
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/* So NO race condition - do nothing */
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return -1;
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}
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/* defines */
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#define ETH_CSUM_MIN_BYTE_COUNT 72
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/* Tailgate and Kirwood have only 2K TX FIFO */
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#if (MV_ETH_VERSION == 2) || (MV_ETH_VERSION == 4)
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#define ETH_CSUM_MAX_BYTE_COUNT 1600
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#else
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#define ETH_CSUM_MAX_BYTE_COUNT 9*1024
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#endif /* MV_ETH_VERSION */
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#define ETH_MV_HEADER_SIZE 2
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#define ETH_MV_TX_EN
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/* An offest in Tx descriptors to store data for buffers less than 8 Bytes */
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#define MIN_TX_BUFF_LOAD 8
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#define TX_BUF_OFFSET_IN_DESC (ETH_TX_DESC_ALIGNED_SIZE - MIN_TX_BUFF_LOAD)
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/* Default port configuration value */
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#define PORT_CONFIG_VALUE \
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ETH_DEF_RX_QUEUE_MASK(0) | \
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ETH_DEF_RX_ARP_QUEUE_MASK(0) | \
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ETH_DEF_RX_TCP_QUEUE_MASK(0) | \
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ETH_DEF_RX_UDP_QUEUE_MASK(0) | \
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ETH_DEF_RX_BPDU_QUEUE_MASK(0) | \
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ETH_RX_CHECKSUM_WITH_PSEUDO_HDR
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/* Default port extend configuration value */
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#define PORT_CONFIG_EXTEND_VALUE 0
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#define PORT_SERIAL_CONTROL_VALUE \
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ETH_DISABLE_FC_AUTO_NEG_MASK | \
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BIT9 | \
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ETH_DO_NOT_FORCE_LINK_FAIL_MASK | \
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ETH_MAX_RX_PACKET_1552BYTE | \
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ETH_SET_FULL_DUPLEX_MASK
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#define PORT_SERIAL_CONTROL_100MB_FORCE_VALUE \
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ETH_FORCE_LINK_PASS_MASK | \
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ETH_DISABLE_DUPLEX_AUTO_NEG_MASK | \
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ETH_DISABLE_FC_AUTO_NEG_MASK | \
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BIT9 | \
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ETH_DO_NOT_FORCE_LINK_FAIL_MASK | \
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ETH_DISABLE_SPEED_AUTO_NEG_MASK | \
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ETH_SET_FULL_DUPLEX_MASK | \
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ETH_SET_MII_SPEED_100_MASK | \
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ETH_MAX_RX_PACKET_1552BYTE
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#define PORT_SERIAL_CONTROL_1000MB_FORCE_VALUE \
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ETH_FORCE_LINK_PASS_MASK | \
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ETH_DISABLE_DUPLEX_AUTO_NEG_MASK | \
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ETH_DISABLE_FC_AUTO_NEG_MASK | \
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BIT9 | \
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ETH_DO_NOT_FORCE_LINK_FAIL_MASK | \
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ETH_DISABLE_SPEED_AUTO_NEG_MASK | \
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ETH_SET_FULL_DUPLEX_MASK | \
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ETH_SET_GMII_SPEED_1000_MASK | \
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ETH_MAX_RX_PACKET_1552BYTE
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#define PORT_SERIAL_CONTROL_SGMII_IBAN_VALUE \
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ETH_DISABLE_FC_AUTO_NEG_MASK | \
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BIT9 | \
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ETH_IN_BAND_AN_EN_MASK | \
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ETH_DO_NOT_FORCE_LINK_FAIL_MASK | \
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ETH_MAX_RX_PACKET_1552BYTE
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/* Function headers: */
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MV_VOID mvEthSetSpecialMcastTable(int portNo, int queue);
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MV_STATUS mvEthArpRxQueue(void* pPortHandle, int arpQueue);
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MV_STATUS mvEthUdpRxQueue(void* pPortHandle, int udpQueue);
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MV_STATUS mvEthTcpRxQueue(void* pPortHandle, int tcpQueue);
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MV_STATUS mvEthMacAddrGet(int portNo, unsigned char *pAddr);
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MV_VOID mvEthSetOtherMcastTable(int portNo, int queue);
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MV_STATUS mvEthHeaderModeSet(void* pPortHandle, MV_ETH_HEADER_MODE headerMode);
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/* Interrupt Coalesting functions */
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MV_U32 mvEthRxCoalSet(void* pPortHndl, MV_U32 uSec);
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MV_U32 mvEthTxCoalSet(void* pPortHndl, MV_U32 uSec);
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MV_STATUS mvEthCoalGet(void* pPortHndl, MV_U32* pRxCoal, MV_U32* pTxCoal);
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/******************************************************************************/
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/* Data Flow functions */
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/******************************************************************************/
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static INLINE void mvEthPortTxRestart(void* pPortHndl)
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{
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ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
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MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(pPortCtrl->portNo)) = pPortCtrl->portTxQueueCmdReg;
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}
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/* Get number of Free resources in specific TX queue */
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static INLINE int mvEthTxResourceGet(void* pPortHndl, int txQueue)
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{
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ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
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return (pPortCtrl->txQueue[txQueue].resource);
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}
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/* Get number of Free resources in specific RX queue */
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static INLINE int mvEthRxResourceGet(void* pPortHndl, int rxQueue)
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{
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ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
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return (pPortCtrl->rxQueue[rxQueue].resource);
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}
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static INLINE int mvEthTxQueueIsFull(void* pPortHndl, int txQueue)
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{
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ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
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if(pPortCtrl->txQueue[txQueue].resource == 0)
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return MV_TRUE;
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return MV_FALSE;
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}
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/* Get number of Free resources in specific RX queue */
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static INLINE int mvEthRxQueueIsFull(void* pPortHndl, int rxQueue)
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{
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ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
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ETH_QUEUE_CTRL* pQueueCtrl = &pPortCtrl->rxQueue[rxQueue];
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if( (pQueueCtrl->pUsedDescr == pQueueCtrl->pCurrentDescr) &&
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(pQueueCtrl->resource != 0) )
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return MV_TRUE;
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return MV_FALSE;
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}
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static INLINE int mvEthTxQueueIsEmpty(void* pPortHndl, int txQueue)
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{
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ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
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ETH_QUEUE_CTRL* pQueueCtrl = &pPortCtrl->txQueue[txQueue];
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if( (pQueueCtrl->pUsedDescr == pQueueCtrl->pCurrentDescr) &&
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(pQueueCtrl->resource != 0) )
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{
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return MV_TRUE;
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}
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return MV_FALSE;
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}
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/* Get number of Free resources in specific RX queue */
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static INLINE int mvEthRxQueueIsEmpty(void* pPortHndl, int rxQueue)
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{
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ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pPortHndl;
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if(pPortCtrl->rxQueue[rxQueue].resource == 0)
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return MV_TRUE;
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return MV_FALSE;
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}
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/*******************************************************************************
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* mvEthPortTx - Send an Ethernet packet
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*
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* DESCRIPTION:
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* This routine send a given packet described by pPktInfo parameter.
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* Single buffer only.
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*
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* INPUT:
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* void* pEthPortHndl - Ethernet Port handler.
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* int txQueue - Number of Tx queue.
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* MV_PKT_INFO *pPktInfo - User packet to send.
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*
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* RETURN:
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* MV_NO_RESOURCE - No enough resources to send this packet.
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* MV_ERROR - Unexpected Fatal error.
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* MV_OK - Packet send successfully.
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*
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*******************************************************************************/
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static INLINE MV_STATUS mvEthPortTx(void* pEthPortHndl, int txQueue, MV_PKT_INFO* pPktInfo)
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{
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ETH_TX_DESC* pTxCurrDesc;
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ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
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ETH_QUEUE_CTRL* pQueueCtrl;
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int portNo;
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MV_BUF_INFO* pBufInfo = pPktInfo->pFrags;
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#ifdef ETH_DEBUG
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if(pPortCtrl->portState != MV_ACTIVE)
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return MV_BAD_STATE;
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#endif /* ETH_DEBUG */
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portNo = pPortCtrl->portNo;
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pQueueCtrl = &pPortCtrl->txQueue[txQueue];
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/* Get the Tx Desc ring indexes */
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pTxCurrDesc = pQueueCtrl->pCurrentDescr;
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/* Check if there is enough resources to send the packet */
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if(pQueueCtrl->resource == 0)
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return MV_NO_RESOURCE;
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pTxCurrDesc->bufPtr = pBufInfo->bufPhysAddr;
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pTxCurrDesc->byteCnt = pBufInfo->dataSize;
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/* Flash Buffer */
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if(pPktInfo->pktSize != 0)
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{
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ETH_PACKET_CACHE_FLUSH(pBufInfo->bufVirtPtr, pPktInfo->pktSize);
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pPktInfo->pktSize = 0;
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}
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pTxCurrDesc->returnInfo = (MV_ULONG)pPktInfo;
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/* There is only one buffer in the packet */
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/* The OSG might set some bits for checksum offload, so add them to first descriptor */
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pTxCurrDesc->cmdSts = pPktInfo->status |
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ETH_BUFFER_OWNED_BY_DMA |
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ETH_TX_GENERATE_CRC_MASK |
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ETH_TX_ENABLE_INTERRUPT_MASK |
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ETH_TX_ZERO_PADDING_MASK |
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ETH_TX_FIRST_DESC_MASK |
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ETH_TX_LAST_DESC_MASK;
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ETH_DESCR_FLUSH_INV(pPortCtrl, pTxCurrDesc);
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pQueueCtrl->resource--;
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pQueueCtrl->pCurrentDescr = TX_NEXT_DESC_PTR(pTxCurrDesc, pQueueCtrl);
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/* Apply send command */
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MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(portNo)) = pPortCtrl->portTxQueueCmdReg;
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return MV_OK;
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}
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/*******************************************************************************
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* mvEthPortSgTx - Send an Ethernet packet
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*
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* DESCRIPTION:
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* This routine send a given packet described by pBufInfo parameter. It
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* supports transmitting of a packet spaned over multiple buffers.
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*
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* INPUT:
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* void* pEthPortHndl - Ethernet Port handler.
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* int txQueue - Number of Tx queue.
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* MV_PKT_INFO *pPktInfo - User packet to send.
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*
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* RETURN:
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* MV_NO_RESOURCE - No enough resources to send this packet.
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* MV_ERROR - Unexpected Fatal error.
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* MV_OK - Packet send successfully.
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*
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*******************************************************************************/
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static INLINE MV_STATUS mvEthPortSgTx(void* pEthPortHndl, int txQueue, MV_PKT_INFO* pPktInfo)
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{
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ETH_TX_DESC* pTxFirstDesc;
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ETH_TX_DESC* pTxCurrDesc;
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ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
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ETH_QUEUE_CTRL* pQueueCtrl;
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int portNo, bufCount;
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MV_BUF_INFO* pBufInfo = pPktInfo->pFrags;
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MV_U8* pTxBuf;
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#ifdef ETH_DEBUG
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if(pPortCtrl->portState != MV_ACTIVE)
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return MV_BAD_STATE;
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#endif /* ETH_DEBUG */
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portNo = pPortCtrl->portNo;
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pQueueCtrl = &pPortCtrl->txQueue[txQueue];
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/* Get the Tx Desc ring indexes */
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pTxCurrDesc = pQueueCtrl->pCurrentDescr;
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/* Check if there is enough resources to send the packet */
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if(pQueueCtrl->resource < pPktInfo->numFrags)
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return MV_NO_RESOURCE;
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/* Remember first desc */
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pTxFirstDesc = pTxCurrDesc;
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bufCount = 0;
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while(MV_TRUE)
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{
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if(pBufInfo[bufCount].dataSize <= MIN_TX_BUFF_LOAD)
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{
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/* Buffers with a payload smaller than MIN_TX_BUFF_LOAD (8 bytes) must be aligned */
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/* to 64-bit boundary. Two options here: */
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/* 1) Usually, copy the payload to the reserved 8 bytes inside descriptor. */
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/* 2) In the Half duplex workaround, the reserved 8 bytes inside descriptor are used */
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/* as a pointer to the aligned buffer, copy the small payload to this buffer. */
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pTxBuf = ((MV_U8*)pTxCurrDesc)+TX_BUF_OFFSET_IN_DESC;
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mvOsBCopy(pBufInfo[bufCount].bufVirtPtr, pTxBuf, pBufInfo[bufCount].dataSize);
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pTxCurrDesc->bufPtr = ethDescVirtToPhy(pQueueCtrl, pTxBuf);
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}
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else
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{
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pTxCurrDesc->bufPtr = mvOsIoVirtToPhy(NULL, pBufInfo[bufCount].bufVirtPtr);
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/* Flash Buffer */
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ETH_PACKET_CACHE_FLUSH(pBufInfo[bufCount].bufVirtPtr, pBufInfo[bufCount].dataSize);
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}
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pTxCurrDesc->byteCnt = pBufInfo[bufCount].dataSize;
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bufCount++;
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if(bufCount >= pPktInfo->numFrags)
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break;
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|
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if(bufCount > 1)
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{
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/* There is middle buffer of the packet Not First and Not Last */
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pTxCurrDesc->cmdSts = ETH_BUFFER_OWNED_BY_DMA;
|
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ETH_DESCR_FLUSH_INV(pPortCtrl, pTxCurrDesc);
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}
|
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/* Go to next descriptor and next buffer */
|
|
pTxCurrDesc = TX_NEXT_DESC_PTR(pTxCurrDesc, pQueueCtrl);
|
|
}
|
|
/* Set last desc with DMA ownership and interrupt enable. */
|
|
pTxCurrDesc->returnInfo = (MV_ULONG)pPktInfo;
|
|
if(bufCount == 1)
|
|
{
|
|
/* There is only one buffer in the packet */
|
|
/* The OSG might set some bits for checksum offload, so add them to first descriptor */
|
|
pTxCurrDesc->cmdSts = pPktInfo->status |
|
|
ETH_BUFFER_OWNED_BY_DMA |
|
|
ETH_TX_GENERATE_CRC_MASK |
|
|
ETH_TX_ENABLE_INTERRUPT_MASK |
|
|
ETH_TX_ZERO_PADDING_MASK |
|
|
ETH_TX_FIRST_DESC_MASK |
|
|
ETH_TX_LAST_DESC_MASK;
|
|
|
|
ETH_DESCR_FLUSH_INV(pPortCtrl, pTxCurrDesc);
|
|
}
|
|
else
|
|
{
|
|
/* Last but not First */
|
|
pTxCurrDesc->cmdSts = ETH_BUFFER_OWNED_BY_DMA |
|
|
ETH_TX_ENABLE_INTERRUPT_MASK |
|
|
ETH_TX_ZERO_PADDING_MASK |
|
|
ETH_TX_LAST_DESC_MASK;
|
|
|
|
ETH_DESCR_FLUSH_INV(pPortCtrl, pTxCurrDesc);
|
|
|
|
/* Update First when more than one buffer in the packet */
|
|
/* The OSG might set some bits for checksum offload, so add them to first descriptor */
|
|
pTxFirstDesc->cmdSts = pPktInfo->status |
|
|
ETH_BUFFER_OWNED_BY_DMA |
|
|
ETH_TX_GENERATE_CRC_MASK |
|
|
ETH_TX_FIRST_DESC_MASK;
|
|
|
|
ETH_DESCR_FLUSH_INV(pPortCtrl, pTxFirstDesc);
|
|
}
|
|
/* Update txQueue state */
|
|
pQueueCtrl->resource -= bufCount;
|
|
pQueueCtrl->pCurrentDescr = TX_NEXT_DESC_PTR(pTxCurrDesc, pQueueCtrl);
|
|
|
|
/* Apply send command */
|
|
MV_REG_VALUE(ETH_TX_QUEUE_COMMAND_REG(portNo)) = pPortCtrl->portTxQueueCmdReg;
|
|
|
|
return MV_OK;
|
|
}
|
|
|
|
/*******************************************************************************
|
|
* mvEthPortTxDone - Free all used Tx descriptors and mBlks.
|
|
*
|
|
* DESCRIPTION:
|
|
* This routine returns the transmitted packet information to the caller.
|
|
*
|
|
* INPUT:
|
|
* void* pEthPortHndl - Ethernet Port handler.
|
|
* int txQueue - Number of Tx queue.
|
|
*
|
|
* OUTPUT:
|
|
* MV_PKT_INFO *pPktInfo - Pointer to packet was sent.
|
|
*
|
|
* RETURN:
|
|
* MV_NOT_FOUND - No transmitted packets to return. Transmit in progress.
|
|
* MV_EMPTY - No transmitted packets to return. TX Queue is empty.
|
|
* MV_ERROR - Unexpected Fatal error.
|
|
* MV_OK - There is transmitted packet in the queue,
|
|
* 'pPktInfo' filled with relevant information.
|
|
*
|
|
*******************************************************************************/
|
|
static INLINE MV_PKT_INFO* mvEthPortTxDone(void* pEthPortHndl, int txQueue)
|
|
{
|
|
ETH_TX_DESC* pTxCurrDesc;
|
|
ETH_TX_DESC* pTxUsedDesc;
|
|
ETH_QUEUE_CTRL* pQueueCtrl;
|
|
ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
|
|
MV_PKT_INFO* pPktInfo;
|
|
MV_U32 commandStatus;
|
|
|
|
pQueueCtrl = &pPortCtrl->txQueue[txQueue];
|
|
|
|
pTxUsedDesc = pQueueCtrl->pUsedDescr;
|
|
pTxCurrDesc = pQueueCtrl->pCurrentDescr;
|
|
|
|
while(MV_TRUE)
|
|
{
|
|
/* No more used descriptors */
|
|
commandStatus = pTxUsedDesc->cmdSts;
|
|
if (commandStatus & (ETH_BUFFER_OWNED_BY_DMA))
|
|
{
|
|
ETH_DESCR_INV(pPortCtrl, pTxUsedDesc);
|
|
return NULL;
|
|
}
|
|
if( (pTxUsedDesc == pTxCurrDesc) &&
|
|
(pQueueCtrl->resource != 0) )
|
|
{
|
|
return NULL;
|
|
}
|
|
pQueueCtrl->resource++;
|
|
pQueueCtrl->pUsedDescr = TX_NEXT_DESC_PTR(pTxUsedDesc, pQueueCtrl);
|
|
if(commandStatus & (ETH_TX_LAST_DESC_MASK))
|
|
{
|
|
pPktInfo = (MV_PKT_INFO*)pTxUsedDesc->returnInfo;
|
|
pPktInfo->status = commandStatus;
|
|
return pPktInfo;
|
|
}
|
|
pTxUsedDesc = pQueueCtrl->pUsedDescr;
|
|
}
|
|
}
|
|
|
|
/*******************************************************************************
|
|
* mvEthPortRx - Get new received packets from Rx queue.
|
|
*
|
|
* DESCRIPTION:
|
|
* This routine returns the received data to the caller. There is no
|
|
* data copying during routine operation. All information is returned
|
|
* using pointer to packet information struct passed from the caller.
|
|
*
|
|
* INPUT:
|
|
* void* pEthPortHndl - Ethernet Port handler.
|
|
* int rxQueue - Number of Rx queue.
|
|
*
|
|
* OUTPUT:
|
|
* MV_PKT_INFO *pPktInfo - Pointer to received packet.
|
|
*
|
|
* RETURN:
|
|
* MV_NO_RESOURCE - No free resources in RX queue.
|
|
* MV_ERROR - Unexpected Fatal error.
|
|
* MV_OK - New packet received and 'pBufInfo' structure filled
|
|
* with relevant information.
|
|
*
|
|
*******************************************************************************/
|
|
static INLINE MV_PKT_INFO* mvEthPortRx(void* pEthPortHndl, int rxQueue)
|
|
{
|
|
ETH_RX_DESC *pRxCurrDesc;
|
|
MV_U32 commandStatus;
|
|
ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
|
|
ETH_QUEUE_CTRL* pQueueCtrl;
|
|
MV_PKT_INFO* pPktInfo;
|
|
|
|
pQueueCtrl = &(pPortCtrl->rxQueue[rxQueue]);
|
|
|
|
/* Check resources */
|
|
if(pQueueCtrl->resource == 0)
|
|
{
|
|
mvOsPrintf("ethPortRx: no more resources\n");
|
|
return NULL;
|
|
}
|
|
while(MV_TRUE)
|
|
{
|
|
/* Get the Rx Desc ring 'curr and 'used' indexes */
|
|
pRxCurrDesc = pQueueCtrl->pCurrentDescr;
|
|
|
|
commandStatus = pRxCurrDesc->cmdSts;
|
|
if (commandStatus & (ETH_BUFFER_OWNED_BY_DMA))
|
|
{
|
|
/* Nothing to receive... */
|
|
ETH_DESCR_INV(pPortCtrl, pRxCurrDesc);
|
|
return NULL;
|
|
}
|
|
|
|
/* Valid RX only if FIRST and LAST bits are set */
|
|
if( (commandStatus & (ETH_RX_LAST_DESC_MASK | ETH_RX_FIRST_DESC_MASK)) ==
|
|
(ETH_RX_LAST_DESC_MASK | ETH_RX_FIRST_DESC_MASK) )
|
|
{
|
|
pPktInfo = (MV_PKT_INFO*)pRxCurrDesc->returnInfo;
|
|
pPktInfo->pFrags->dataSize = pRxCurrDesc->byteCnt - 4;
|
|
pPktInfo->status = commandStatus;
|
|
pPktInfo->fragIP = pRxCurrDesc->bufSize & ETH_RX_IP_FRAGMENTED_FRAME_MASK;
|
|
|
|
pQueueCtrl->resource--;
|
|
/* Update 'curr' in data structure */
|
|
pQueueCtrl->pCurrentDescr = RX_NEXT_DESC_PTR(pRxCurrDesc, pQueueCtrl);
|
|
|
|
#ifdef INCLUDE_SYNC_BARR
|
|
mvCpuIfSyncBarr(DRAM_TARGET);
|
|
#endif
|
|
return pPktInfo;
|
|
}
|
|
else
|
|
{
|
|
ETH_RX_DESC* pRxUsedDesc = pQueueCtrl->pUsedDescr;
|
|
|
|
#ifdef ETH_DEBUG
|
|
mvOsPrintf("ethDrv: Unexpected Jumbo frame: "
|
|
"status=0x%08x, byteCnt=%d, pData=0x%x\n",
|
|
commandStatus, pRxCurrDesc->byteCnt, pRxCurrDesc->bufPtr);
|
|
#endif /* ETH_DEBUG */
|
|
|
|
/* move buffer from pCurrentDescr position to pUsedDescr position */
|
|
pRxUsedDesc->bufPtr = pRxCurrDesc->bufPtr;
|
|
pRxUsedDesc->returnInfo = pRxCurrDesc->returnInfo;
|
|
pRxUsedDesc->bufSize = pRxCurrDesc->bufSize & ETH_RX_BUFFER_MASK;
|
|
|
|
/* Return the descriptor to DMA ownership */
|
|
pRxUsedDesc->cmdSts = ETH_BUFFER_OWNED_BY_DMA |
|
|
ETH_RX_ENABLE_INTERRUPT_MASK;
|
|
|
|
/* Flush descriptor and CPU pipe */
|
|
ETH_DESCR_FLUSH_INV(pPortCtrl, pRxUsedDesc);
|
|
|
|
/* Move the used descriptor pointer to the next descriptor */
|
|
pQueueCtrl->pUsedDescr = RX_NEXT_DESC_PTR(pRxUsedDesc, pQueueCtrl);
|
|
pQueueCtrl->pCurrentDescr = RX_NEXT_DESC_PTR(pRxCurrDesc, pQueueCtrl);
|
|
}
|
|
}
|
|
}
|
|
|
|
/*******************************************************************************
|
|
* mvEthPortRxDone - Returns a Rx buffer back to the Rx ring.
|
|
*
|
|
* DESCRIPTION:
|
|
* This routine returns a Rx buffer back to the Rx ring.
|
|
*
|
|
* INPUT:
|
|
* void* pEthPortHndl - Ethernet Port handler.
|
|
* int rxQueue - Number of Rx queue.
|
|
* MV_PKT_INFO *pPktInfo - Pointer to received packet.
|
|
*
|
|
* RETURN:
|
|
* MV_ERROR - Unexpected Fatal error.
|
|
* MV_OUT_OF_RANGE - RX queue is already FULL, so this buffer can't be
|
|
* returned to this queue.
|
|
* MV_FULL - Buffer returned successfully and RX queue became full.
|
|
* More buffers should not be returned at the time.
|
|
* MV_OK - Buffer returned successfully and there are more free
|
|
* places in the queue.
|
|
*
|
|
*******************************************************************************/
|
|
static INLINE MV_STATUS mvEthPortRxDone(void* pEthPortHndl, int rxQueue, MV_PKT_INFO *pPktInfo)
|
|
{
|
|
ETH_RX_DESC* pRxUsedDesc;
|
|
ETH_QUEUE_CTRL* pQueueCtrl;
|
|
ETH_PORT_CTRL* pPortCtrl = (ETH_PORT_CTRL*)pEthPortHndl;
|
|
|
|
pQueueCtrl = &pPortCtrl->rxQueue[rxQueue];
|
|
|
|
/* Get 'used' Rx descriptor */
|
|
pRxUsedDesc = pQueueCtrl->pUsedDescr;
|
|
|
|
/* Check that ring is not FULL */
|
|
if( (pQueueCtrl->pUsedDescr == pQueueCtrl->pCurrentDescr) &&
|
|
(pQueueCtrl->resource != 0) )
|
|
{
|
|
mvOsPrintf("%s %d: out of range Error resource=%d, curr=%p, used=%p\n",
|
|
__FUNCTION__, pPortCtrl->portNo, pQueueCtrl->resource,
|
|
pQueueCtrl->pCurrentDescr, pQueueCtrl->pUsedDescr);
|
|
return MV_OUT_OF_RANGE;
|
|
}
|
|
|
|
pRxUsedDesc->bufPtr = pPktInfo->pFrags->bufPhysAddr;
|
|
pRxUsedDesc->returnInfo = (MV_ULONG)pPktInfo;
|
|
pRxUsedDesc->bufSize = pPktInfo->pFrags->bufSize & ETH_RX_BUFFER_MASK;
|
|
|
|
/* Invalidate data buffer accordingly with pktSize */
|
|
if(pPktInfo->pktSize != 0)
|
|
{
|
|
ETH_PACKET_CACHE_INVALIDATE(pPktInfo->pFrags->bufVirtPtr, pPktInfo->pktSize);
|
|
pPktInfo->pktSize = 0;
|
|
}
|
|
|
|
/* Return the descriptor to DMA ownership */
|
|
pRxUsedDesc->cmdSts = ETH_BUFFER_OWNED_BY_DMA | ETH_RX_ENABLE_INTERRUPT_MASK;
|
|
|
|
/* Flush descriptor and CPU pipe */
|
|
ETH_DESCR_FLUSH_INV(pPortCtrl, pRxUsedDesc);
|
|
|
|
pQueueCtrl->resource++;
|
|
|
|
/* Move the used descriptor pointer to the next descriptor */
|
|
pQueueCtrl->pUsedDescr = RX_NEXT_DESC_PTR(pRxUsedDesc, pQueueCtrl);
|
|
|
|
/* If ring became Full return MV_FULL */
|
|
if(pQueueCtrl->pUsedDescr == pQueueCtrl->pCurrentDescr)
|
|
return MV_FULL;
|
|
|
|
return MV_OK;
|
|
}
|
|
|
|
|
|
#endif /* __mvEthGbe_h__ */
|
|
|
|
|