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uboot-1.1.4-kirkwood/board/mv_feroceon/mv_hal/gpp/mvGpp.c

551 lines
14 KiB
C

/*******************************************************************************
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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*******************************************************************************/
#include "gpp/mvGpp.h"
#include "ctrlEnv/mvCtrlEnvLib.h"
/* defines */
#ifdef MV_DEBUG
#define DB(x) x
#else
#define DB(x)
#endif
static MV_VOID gppRegSet(MV_U32 group, MV_U32 regOffs,MV_U32 mask,MV_U32 value);
/*******************************************************************************
* mvGppTypeSet - Enable a GPP (OUT) pin
*
* DESCRIPTION:
*
* INPUT:
* group - GPP group number
* mask - 32bit mask value. Each set bit in the mask means that the type
* of corresponding GPP will be set. Other GPPs are ignored.
* value - 32bit value that describes GPP type per pin.
*
* OUTPUT:
* None.
*
* EXAMPLE:
* Set GPP8 to input and GPP15 to output.
* mvGppTypeSet(0, (GPP8 | GPP15),
* ((MV_GPP_IN & GPP8) | (MV_GPP_OUT & GPP15)) );
*
* RETURN:
* None.
*
*******************************************************************************/
MV_STATUS mvGppTypeSet(MV_U32 group, MV_U32 mask, MV_U32 value)
{
if (group >= MV_GPP_MAX_GROUP)
{
DB(mvOsPrintf("mvGppTypeSet: ERR. invalid group number \n"));
return MV_BAD_PARAM;
}
gppRegSet(group, GPP_DATA_OUT_EN_REG(group), mask, value);
/* Workaround for Erratum FE-MISC-70*/
if(mvCtrlRevGet()==MV_88F6XXX_A0_REV && (group == 1))
{
mask &= 0x2;
gppRegSet(0, GPP_DATA_OUT_EN_REG(0), mask, value);
} /*End of WA*/
return MV_OK;
}
/*******************************************************************************
* mvGppBlinkEn - Set a GPP (IN) Pin list to blink every ~100ms
*
* DESCRIPTION:
*
* INPUT:
* group - GPP group number
* mask - 32bit mask value. Each set bit in the mask means that the type
* of corresponding GPP will be set. Other GPPs are ignored.
* value - 32bit value that describes GPP blink per pin.
*
* OUTPUT:
* None.
*
* EXAMPLE:
* Set GPP8 to be static and GPP15 to be blinking.
* mvGppBlinkEn(0, (GPP8 | GPP15),
* ((MV_GPP_OUT_STATIC & GPP8) | (MV_GPP_OUT_BLINK & GPP15)) );
*
* RETURN:
* None.
*
*******************************************************************************/
MV_STATUS mvGppBlinkEn(MV_U32 group, MV_U32 mask, MV_U32 value)
{
if (group >= MV_GPP_MAX_GROUP)
{
DB(mvOsPrintf("mvGppBlinkEn: ERR. invalid group number \n"));
return MV_BAD_PARAM;
}
gppRegSet(group, GPP_BLINK_EN_REG(group), mask, value);
return MV_OK;
}
/*******************************************************************************
* mvGppPolaritySet - Set a GPP (IN) Pin list Polarity mode
*
* DESCRIPTION:
*
* INPUT:
* group - GPP group number
* mask - 32bit mask value. Each set bit in the mask means that the type
* of corresponding GPP will be set. Other GPPs are ignored.
* value - 32bit value that describes GPP polarity per pin.
*
* OUTPUT:
* None.
*
* EXAMPLE:
* Set GPP8 to the actual pin value and GPP15 to be inverted.
* mvGppPolaritySet(0, (GPP8 | GPP15),
* ((MV_GPP_IN_ORIGIN & GPP8) | (MV_GPP_IN_INVERT & GPP15)) );
*
* RETURN:
* None.
*
*******************************************************************************/
MV_STATUS mvGppPolaritySet(MV_U32 group, MV_U32 mask, MV_U32 value)
{
if (group >= MV_GPP_MAX_GROUP)
{
DB(mvOsPrintf("mvGppPolaritySet: ERR. invalid group number \n"));
return MV_BAD_PARAM;
}
gppRegSet(group, GPP_DATA_IN_POL_REG(group), mask, value);
return MV_OK;
}
/*******************************************************************************
* mvGppPolarityGet - Get a value of relevant bits from GPP Polarity register.
*
* DESCRIPTION:
*
* INPUT:
* group - GPP group number
* mask - 32bit mask value. Each set bit in the mask means that the
* returned value is valid for it.
*
* OUTPUT:
* None.
*
* EXAMPLE:
* Get GPP8 and GPP15 value.
* mvGppPolarityGet(0, (GPP8 | GPP15));
*
* RETURN:
* 32bit value that describes GPP polatity mode per pin.
*
*******************************************************************************/
MV_U32 mvGppPolarityGet(MV_U32 group, MV_U32 mask)
{
MV_U32 regVal;
if (group >= MV_GPP_MAX_GROUP)
{
DB(mvOsPrintf("mvGppActiveSet: Error invalid group number \n"));
return MV_ERROR;
}
regVal = MV_REG_READ(GPP_DATA_IN_POL_REG(group));
return (regVal & mask);
}
/*******************************************************************************
* mvGppValueGet - Get a GPP Pin list value.
*
* DESCRIPTION:
* This function get GPP value.
*
* INPUT:
* group - GPP group number
* mask - 32bit mask value. Each set bit in the mask means that the
* returned value is valid for it.
*
* OUTPUT:
* None.
*
* EXAMPLE:
* Get GPP8 and GPP15 value.
* mvGppValueGet(0, (GPP8 | GPP15));
*
* RETURN:
* 32bit value that describes GPP activity mode per pin.
*
*******************************************************************************/
MV_U32 mvGppValueGet(MV_U32 group, MV_U32 mask)
{
MV_U32 gppData;
gppData = MV_REG_READ(GPP_DATA_IN_REG(group));
gppData &= mask;
return gppData;
}
/*******************************************************************************
* mvGppValueSet - Set a GPP Pin list value.
*
* DESCRIPTION:
* This function set value for given GPP pin list.
*
* INPUT:
* group - GPP group number
* mask - 32bit mask value. Each set bit in the mask means that the
* value of corresponding GPP will be set accordingly. Other GPP
* are not affected.
* value - 32bit value that describes GPP value per pin.
*
* OUTPUT:
* None.
*
* EXAMPLE:
* Set GPP8 value of '0' and GPP15 value of '1'.
* mvGppActiveSet(0, (GPP8 | GPP15), ((0 & GPP8) | (GPP15)) );
*
* RETURN:
* None.
*
*******************************************************************************/
MV_STATUS mvGppValueSet (MV_U32 group, MV_U32 mask, MV_U32 value)
{
MV_U32 outEnable, tmp;
MV_U32 i;
if (group >= MV_GPP_MAX_GROUP)
{
DB(mvOsPrintf("mvGppValueSet: Error invalid group number \n"));
return MV_BAD_PARAM;
}
/* verify that the gpp pin is configured as output */
/* Note that in the register out enabled -> bit = '0'. */
outEnable = ~MV_REG_READ(GPP_DATA_OUT_EN_REG(group));
/* Workaround for Erratum FE-MISC-70*/
if(mvCtrlRevGet()==MV_88F6XXX_A0_REV && (group == 1))
{
tmp = ~MV_REG_READ(GPP_DATA_OUT_EN_REG(0));
outEnable &= 0xfffffffd;
outEnable |= (tmp & 0x2);
} /*End of WA*/
for (i = 0 ; i < 32 ;i++)
{
if (((mask & (1 << i)) & (outEnable & (1 << i))) != (mask & (1 << i)))
{
mvOsPrintf("mvGppValueSet: Err. An attempt to set output "\
"value to GPP %d in input mode.\n", i);
return MV_ERROR;
}
}
gppRegSet(group, GPP_DATA_OUT_REG(group), mask, value);
return MV_OK;
}
/*******************************************************************************
* gppRegSet - Set a specific GPP pin on a specific GPP register
*
* DESCRIPTION:
* This function set a specific GPP pin on a specific GPP register
*
* INPUT:
* regOffs - GPP Register offset
* group - GPP group number
* mask - 32bit mask value. Each set bit in the mask means that the
* value of corresponding GPP will be set accordingly. Other GPP
* are not affected.
* value - 32bit value that describes GPP value per pin.
*
* OUTPUT:
* None.
*
* EXAMPLE:
* Set GPP8 value of '0' and GPP15 value of '1'.
* mvGppActiveSet(0, (GPP8 | GPP15), ((0 & GPP8) | (1 & GPP15)) );
*
* RETURN:
* None.
*
*******************************************************************************/
static MV_VOID gppRegSet (MV_U32 group, MV_U32 regOffs,MV_U32 mask,MV_U32 value)
{
MV_U32 gppData;
gppData = MV_REG_READ(regOffs);
gppData &= ~mask;
gppData |= (value & mask);
MV_REG_WRITE(regOffs, gppData);
}
#if defined(CONFIG_BUFFALO_PLATFORM)
#define BIT(x) (1<<(x))
MV_BOOL bfGppInRegBitTest(MV_32 bit)
{
if (bit < 0)
return MV_FALSE;
if (bit < 32)
return mvGppValueGet(0, BIT(bit)) ? MV_TRUE : MV_FALSE;
else
return mvGppValueGet(1, BIT(bit - 32)) ? MV_TRUE : MV_FALSE;
}
MV_BOOL bfGppOutRegBitTest(MV_32 bit)
{
if (bit < 0)
return MV_FALSE;
if (bit < 32)
return MV_REG_READ(GPP_DATA_OUT_REG(0)) & BIT(bit) ? MV_TRUE : MV_FALSE;
else
return MV_REG_READ(GPP_DATA_OUT_REG(1)) & BIT(bit - 32) ? MV_TRUE : MV_FALSE;
}
MV_VOID bfGppOutRegBitSet(MV_32 bit)
{
if (bit < 0)
return;
if (bit < 32)
mvGppValueSet(0, BIT(bit), 0xffffffff);
else
mvGppValueSet(1, BIT(bit - 32), 0xffffffff);
}
MV_VOID bfGppOutRegBitClr(MV_32 bit)
{
if (bit < 0)
return;
if (bit < 32)
mvGppValueSet(0, BIT(bit), 0x0);
else
mvGppValueSet(1, BIT(bit - 32), 0x0);
}
MV_VOID bfGppOutRegBitInv(MV_32 bit)
{
if (bit < 0)
return;
if (bit < 32)
MV_REG_READ(GPP_BLINK_EN_REG(0)) & BIT(bit) ? MV_TRUE : MV_FALSE;
else
MV_REG_READ(GPP_BLINK_EN_REG(1)) & BIT(bit - 32) ? MV_TRUE : MV_FALSE;
}
MV_BOOL bfGppBlinkRegBitTest(MV_32 bit)
{
if (bit < 0)
return MV_FALSE;
if (bit < 32)
return MV_REG_READ(GPP_BLINK_EN_REG(0)) & BIT(bit) ? MV_TRUE : MV_FALSE;
else
return MV_REG_READ(GPP_BLINK_EN_REG(1)) & BIT(bit - 32) ? MV_TRUE : MV_FALSE;
}
MV_VOID bfGppBlinkRegBitSet(MV_32 bit)
{
if (bit < 0)
return;
if (bit < 32)
mvGppBlinkEn(0, BIT(bit), 0xffffffff);
else
mvGppBlinkEn(1, BIT(bit - 32), 0xffffffff);
}
MV_VOID bfGppBlinkRegBitClr(MV_32 bit)
{
if (bit < 0)
return;
if (bit < 32)
mvGppBlinkEn(0, BIT(bit), 0x0);
else
mvGppBlinkEn(1, BIT(bit - 32), 0x0);
}
MV_BOOL bfGppOutEnableRegBitTest(MV_32 bit)
{
if (bit < 0)
return MV_FALSE;
if (bit < 32)
return MV_REG_READ(GPP_DATA_OUT_EN_REG(0)) & BIT(bit) ? MV_TRUE : MV_FALSE;
else
return MV_REG_READ(GPP_DATA_OUT_EN_REG(1)) & BIT(bit - 32) ? MV_TRUE : MV_FALSE;
}
MV_VOID bfGppOutEnableRegBitSet(MV_32 bit)
{
if (bit < 0)
return;
if (bit < 32)
mvGppTypeSet(0, BIT(bit), 0xffffffff);
else
mvGppTypeSet(1, BIT(bit - 32), 0xffffffff);
}
MV_VOID bfGppOutEnableRegBitClr(MV_32 bit)
{
if (bit < 0)
return;
if (bit < 32)
mvGppTypeSet(0, BIT(bit), 0x0);
else
mvGppTypeSet(1, BIT(bit - 32), 0x0);
}
MV_BOOL bfGppDataInPolRegBitTest(MV_32 bit)
{
if (bit < 0)
return MV_FALSE;
if (bit < 32)
return MV_REG_READ(GPP_DATA_IN_POL_REG(0)) & BIT(bit) ? MV_TRUE : MV_FALSE;
else
return MV_REG_READ(GPP_DATA_IN_POL_REG(1)) & BIT(bit - 32) ? MV_TRUE : MV_FALSE;
}
MV_VOID bfGppOutRegBitAssert(MV_32 bit)
{
MV_U32 group;
MV_U32 mask;
MV_U32 value;
if (bit < 0)
return;
if (bit < 32) {
mask = BIT(bit);
group = 0;
}
else {
mask = BIT(bit - 32);
group = 1;
}
if (bfGppDataInPolRegBitTest(bit))
value = 0x0;
else
value = 0xffffffff;
mvGppValueSet(group, mask, value);
}
MV_VOID bfGppOutRegBitNagate(MV_32 bit)
{
MV_U32 group;
MV_U32 mask;
MV_U32 value;
if (bit < 0)
return;
if (bit < 32) {
mask = BIT(bit);
group = 0;
}
else {
mask = BIT(bit - 32);
group = 1;
}
if (bfGppDataInPolRegBitTest(bit))
value = 0xffffffff;
else
value = 0x0;
mvGppValueSet(group, mask, value);
}
#endif // CONFIG_BUFFALO_PLATFORM