100 lines
2.9 KiB
ArmAsm
100 lines
2.9 KiB
ArmAsm
/*******************************************************************************
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Copyright (C) Marvell International Ltd. and its affiliates
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********************************************************************************
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Marvell GPL License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File in accordance with the terms and conditions of the General
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Public License Version 2, June 1991 (the "GPL License"), a copy of which is
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available along with the File in the license.txt file or by writing to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
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on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
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THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
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WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
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DISCLAIMED. The GPL License provides additional details about this warranty
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disclaimer.
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*******************************************************************************/
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#define MV_ASMLANGUAGE
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#include "mvOsAsm.h"
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#include <config.h>
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#include <version.h>
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#include "mvBoardEnvSpec.h"
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#include "mvCtrlEnvSpec.h"
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#include "mvCpuIfRegs.h"
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#include "ddr2/mvDramIfRegs.h"
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#include "mvCtrlEnvAsm.h"
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#if defined(MV_INC_BOARD_SPI_FLASH)
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#include "spi/mvSpiSpec.h"
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#endif
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/*
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get_board_id - get board id from twsi eeprom
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input : r5 - board id data start offset in the eeprom
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*/
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.globl lowlevel_init
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/************************************************/
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/* lowlevel_init *
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/************************************************/
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lowlevel_init:
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/* change reg base to 0xf1000000 */
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ldr r4, =CFG_MV_REGS
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MV_DV_REG_WRITE_ASM(r4, r1, 0x20080)
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/* save Link Registers */
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mov r2, lr
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/* Change L2 cache to exist */
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MV_REG_READ_ASM(r4, r1, 0x20128)
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orr r4, r4, #0x18
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MV_REG_WRITE_ASM(r4, r1, 0x20128)
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/* Read operation to make sure the L2 bit is set */
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MV_REG_READ_ASM(r4, r1, 0x20128)
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/* invalidate L2 cache */
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mov r0, #0
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mcr p15, 1, r0, c15, c11, 0
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bl _i2cInit
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/* Initialize BUS-L to DDR configuration parameters */
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/* Must be done prior to DDR operation */
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#if !defined(MV_BOOTROM)
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bl _mvCpuIfPreInit
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#endif
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#if defined(MV_INC_BOARD_SPI_FLASH)
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/* configure the Prescale of SPI clk Tclk = 166MHz */
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MV_REG_READ_ASM (r6, r1, MV_SPI_IF_CONFIG_REG)
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and r6, r6, #~MV_SPI_CLK_PRESCALE_MASK
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orr r6, r6, #0x14
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MV_REG_WRITE_ASM (r6, r1, MV_SPI_IF_CONFIG_REG)
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#endif
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#if !defined(MV_INC_BOARD_DDIM)
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#if !defined(MV_BOOTROM)
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/* Call DRAM static initialization */
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bl _mvDramIfStaticInit
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#else
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b done
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#endif
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#else /* #if !defined(MV_INC_BOARD_DDIM) */
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/* Call DRAM basic initialization to allow C runtime stack */
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bl _mvDramIfBasicInit
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b done
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#endif /* #if !defined(MV_INC_BOARD_DDIM) */
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done:
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mov lr, r2
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mov pc, lr
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