usbfanctrl/pwm.c

/***************************************************************************
 *   Copyright (C) 02/2021 by Olaf Rempel                                  *
 *   razzor@kopf-tisch.de                                                  *
 *                                                                         *
 *   This program is free software; you can redistribute it and/or modify  *
 *   it under the terms of the GNU General Public License as published by  *
 *   the Free Software Foundation; version 2 of the License,               *
 *                                                                         *
 *   This program is distributed in the hope that it will be useful,       *
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
 *   GNU General Public License for more details.                          *
 *                                                                         *
 *   You should have received a copy of the GNU General Public License     *
 *   along with this program; if not, write to the                         *
 *   Free Software Foundation, Inc.,                                       *
 *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
 ***************************************************************************/
#include <avr/io.h>
#include "pwm.h"

/* *********************************************************************** */

#define PWM_TIM_INIT()      {   \
                                /* enable output for OC1A, OC1B, OC3A */ \
                                DDRB |= (1<<PORTB5) | (1<<PORTB6); \
                                DDRC |= (1<<PORTC6); \
                                /* FastModePWM, ICRn is TOP */ \
                                TCCR1A = (1<<WGM11); \
                                TCCR1B = (1<<WGM13) | (1<<WGM12); \
                                ICR1 = 0xFFFF; \
                                TCCR3A = (1<<WGM31); \
                                TCCR3B = (1<<WGM33) | (1<<WGM32); \
                                ICR3 = 0xFF; \
                            }

#define PWM_CH0_MIN         0
#define PWM_CH0_MAX         ICR1
#define PWM_CH0_ENABLE()    { TCCR1B |= (1<<CS10); }
#define PWM_CH0_DISABLE()   { TCCR1B &= ~(1<<CS10); }
#define PWM_CH0_RUNNING()   (TCCR1B & ((1<<CS10) | (1<<CS11) | (1<<CS12)))
#define PWM_CH0_CHECK()     (TCCR1A & ((1<<COM1A1) | (1<<COM1B1)))
#define PWM_CH0_PORT        PORTB
#define PWM_CH0_NUM         5
#define PWM_CH0_OFF()       { PWM_CH0_PORT &= ~(1<<PWM_CH0_NUM); TCCR1A &= ~(1<<COM1A1); }
#define PWM_CH0_ON()        { PWM_CH0_PORT |=  (1<<PWM_CH0_NUM); TCCR1A &= ~(1<<COM1A1); }
#define PWM_CH0_PWM(x)      { PWM_CH0_PORT &= ~(1<<PWM_CH0_NUM); TCCR1A |=  (1<<COM1A1); OCR1A = x; }

#define PWM_CH1_MIN         0
#define PWM_CH1_MAX         ICR1
#define PWM_CH1_ENABLE()    PWM_CH0_ENABLE()
#define PWM_CH1_DISABLE()   PWM_CH0_DISABLE()
#define PWM_CH1_RUNNING()   PWM_CH0_RUNNING()
#define PWM_CH1_CHECK()     PWM_CH0_CHECK()
#define PWM_CH1_PORT        PORTB
#define PWM_CH1_NUM         6
#define PWM_CH1_OFF()       { PWM_CH1_PORT &= ~(1<<PWM_CH1_NUM); TCCR1A &= ~(1<<COM1B1); }
#define PWM_CH1_ON()        { PWM_CH1_PORT |=  (1<<PWM_CH1_NUM); TCCR1A &= ~(1<<COM1B1); }
#define PWM_CH1_PWM(x)      { PWM_CH1_PORT &= ~(1<<PWM_CH1_NUM); TCCR1A |=  (1<<COM1B1); OCR1B = x; }

#define PWM_CH2_MIN         0
#define PWM_CH2_MAX         ICR3
#define PWM_CH2_ENABLE()    { TCCR3B |= (1<<CS30); }
#define PWM_CH2_DISABLE()   { TCCR3B &= ~(1<<CS30); }
#define PWM_CH2_RUNNING()   (TCCR3B & ((1<<CS30) | (1<<CS31) | (1<<CS32)))
#define PWM_CH2_CHECK()     (TCCR3A & ((1<<COM3A1) | (1<<COM3B1)))
#define PWM_CH2_PORT        PORTC
#define PWM_CH2_NUM         6
#define PWM_CH2_OFF()       { PWM_CH2_PORT &= ~(1<<PWM_CH2_NUM); TCCR3A &= ~(1<<COM3A1); }
#define PWM_CH2_ON()        { PWM_CH2_PORT |=  (1<<PWM_CH2_NUM); TCCR3A &= ~(1<<COM3A1); }
#define PWM_CH2_PWM(x)      { PWM_CH2_PORT &= ~(1<<PWM_CH2_NUM); TCCR3A |=  (1<<COM3A1); OCR3A = x; }

/* *********************************************************************** */

static void pwm_update(uint8_t channel, uint16_t value)
{
    switch (channel)
    {
    case 0:
        if (value <= PWM_CH0_MIN)
        {
            PWM_CH0_OFF();
        }
        else if (value >= PWM_CH0_MAX)
        {
            PWM_CH0_ON();
        }
        else
        {
            PWM_CH0_PWM(value);
        }

        if (PWM_CH0_CHECK())
        {
            PWM_CH0_ENABLE();
        }
        else
        {
            PWM_CH0_DISABLE();
        }
        break;

    case 1:
        if (value <= PWM_CH1_MIN)
        {
            PWM_CH1_OFF();
        }
        else if (value >= PWM_CH1_MAX)
        {
            PWM_CH1_ON();
        }
        else
        {
            PWM_CH1_PWM(value);
        }

        if (PWM_CH1_CHECK())
        {
            PWM_CH1_ENABLE();
        }
        else
        {
            PWM_CH1_DISABLE();
        }
        break;

    case 2:
        if (value <= PWM_CH2_MIN)
        {
            PWM_CH2_OFF();
        }
        else if (value >= PWM_CH2_MAX)
        {
            PWM_CH2_ON();
        }
        else
        {
            PWM_CH2_PWM(value);
        }

        if (PWM_CH2_CHECK())
        {
            PWM_CH2_ENABLE();
        }
        else
        {
            PWM_CH2_DISABLE();
        }
        break;
    }
} /* pwm_update */


void pwm_event_handler(event_entry_t * p_event)
{
    if (p_event->type == EVENT_TYPE_PWM_VALUE)
    {
        pwm_update(p_event->num, p_event->value);
    }
} /* pwm_event_handler */


uint8_t pwm_need_hw_clock(void)
{
    return !!(PWM_CH0_RUNNING() || PWM_CH1_RUNNING() || PWM_CH2_RUNNING());
} /* pwm_need_hw_clock */


void pwm_init(void)
{
    PWM_TIM_INIT();
} /* pwm_init */