precalc outputvalues
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02b6e08279
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18612d804c
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dmx8chan.c
45
dmx8chan.c
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@ -27,53 +27,56 @@
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// channel values
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// channel values
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volatile uint8_t chan[8] = { 0xFF, 0xFE, 0x80, 0x40, 0x20, 0x10, 0x01, 0x00 };
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volatile uint8_t chan[8] = { 0xFF, 0xFE, 0x80, 0x40, 0x20, 0x10, 0x01, 0x00 };
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// rx variables
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// rx receive variables
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static uint16_t rx_chan;
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static uint16_t rx_chan;
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static uint16_t my_base;
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static uint16_t my_base;
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// next OCR1 value
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// timer variables
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static uint8_t cnt;
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static uint8_t cnt;
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static uint16_t pwm_load;
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static uint16_t pwm_next;
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static uint8_t out_next;
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/*
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/* Timer 1 Overflow (every 10ms) */
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* Timer 1 Overflow (every 10ms)
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* - reload 10ms
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* - schedule compare match in 40us
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*/
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ISR(SIG_OVERFLOW1)
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ISR(SIG_OVERFLOW1)
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{
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{
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TCNT1 = TIMER1_RELOAD;
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TCNT1 = TIMER1_RELOAD;
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OCR1A = (TIMER1_RELOAD + TIMER1_STEP);
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OCR1A = (TIMER1_RELOAD + TIMER1_STEP);
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pwm_load = (TIMER1_RELOAD + (TIMER1_STEP * 2));
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pwm_next = (TIMER1_RELOAD + (TIMER1_STEP * 2));
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cnt = 0x00;
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cnt = 0x00;
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}
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}
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/*
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/*
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* Timer 1 Compare Match (every 40us)
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* Timer 1 Compare Match (every 40us)
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* - schedule next compare match in 40us
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* asap:
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* - set PWM Outputs (PORTB)
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* - schedule next compare match
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* - set PWM Outputs
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* interruptible:
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* - calc next compare match
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* - calc next output values
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*/
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*/
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ISR(SIG_OUTPUT_COMPARE1A)
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ISR(SIG_OUTPUT_COMPARE1A)
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{
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{
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OCR1A = pwm_load;
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OCR1A = pwm_next;
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pwm_load += TIMER1_STEP;
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PORTB = out_next;
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/* rest can be interrupted by DMX receive */
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sei();
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pwm_next += TIMER1_STEP;
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if (cnt == 0x00)
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out_next = 0x00;
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cnt--;
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cnt--;
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uint8_t out = PORTB;
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if (cnt == 0xFF)
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out = 0x00;
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uint8_t i, shift = 1;
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uint8_t i, shift = 1;
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uint8_t *tmp = chan;
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volatile uint8_t *tmp = chan;
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for (i = 0; i < 8; i++) {
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for (i = 0; i < 8; i++) {
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if (*tmp++ >= cnt)
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if (*tmp++ >= cnt)
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out |= shift;
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out_next |= shift;
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shift <<= 1;
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shift <<= 1;
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}
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}
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PORTB = out;
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}
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}
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/*
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/*
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