mega88 version
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a41be6d7ca
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4
Makefile
4
Makefile
@ -1,6 +1,6 @@
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PRG = bl_test
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OBJ = blmc.o eeprom.o i2c-slave.o main.o
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MCU_TARGET = atmega8
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MCU_TARGET = atmega88
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OPTIMIZE = -Os
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DEFS =
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@ -61,4 +61,4 @@ ebin: $(PRG)_eeprom.bin
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install: text
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# uisp -dprog=avr910 -dserial=/dev/ttyS0 -dspeed=115200 -dpart=M8 --erase --upload if=$(PRG).hex
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avrdude -p m8 -c butterfly -b 115200 -P /dev/ttyUSB1 -u -e -V -U flash:w:$(PRG).hex
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avrdude -p m88 -c butterfly -b 115200 -u -e -V -U flash:w:$(PRG).hex
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64
blmc.c
64
blmc.c
@ -49,48 +49,66 @@ void next_phase(void)
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/* Disable Analog Comperator */
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ACSR &= ~(1<<ACIE);
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TCNT1 = 0x00;
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TCNT0 = 0x00;
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TCNT2 = 0x00;
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switch (phase) {
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case 0: PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_B_L;
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TCCR1A = (TCCR1A & ~(1<<COM1B1)) | (1<<COM1A1);
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TCCR2 &= ~(1<<COM21);
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case 0: /* A: PWM, B: LOW, C: SENSE */
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PORTB |= PHASE_A_EN;
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PORTD = (PORTD & ~PHASE_C_EN) | PHASE_B_EN;
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TCCR0A &= ~PHASE_B_OC;
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TCCR2A = (TCCR2A & ~PHASE_C_OC) | PHASE_A_OC;
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ACSR = (1<<ACIS1);
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next_sense = SENSE_C;
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break;
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case 1: PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_B_L;
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TCCR1A &= ~((1<<COM1A1) | (1<<COM1B1));
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TCCR2 |= (1<<COM21);
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case 1: /* A: SENSE, B: LOW, C: PWM */
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PORTB &= ~PHASE_A_EN;
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PORTD |= PHASE_B_EN | PHASE_C_EN;
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TCCR0A &= ~PHASE_B_OC;
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TCCR2A = (TCCR2A & ~PHASE_A_OC) | PHASE_C_OC;
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ACSR = (1<<ACIS1) | (1<<ACIS0);
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next_sense = SENSE_A;
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break;
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case 2: PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_A_L;
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TCCR1A &= ~((1<<COM1A1) | (1<<COM1B1));
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TCCR2 |= (1<<COM21);
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case 2: /* A: LOW, B: SENSE, C: PWM */
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PORTB |= PHASE_A_EN;
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PORTD = (PORTD & ~PHASE_B_EN) | PHASE_C_EN;
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TCCR0A &= ~PHASE_B_OC;
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TCCR2A = (TCCR2A & ~PHASE_A_OC) | PHASE_C_OC;
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ACSR = (1<<ACIS1);
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next_sense = SENSE_B;
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break;
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case 3: PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_A_L;
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TCCR1A = (TCCR1A & ~(1<<COM1A1)) | (1<<COM1B1);
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TCCR2 &= ~(1<<COM21);
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case 3: /* A: LOW, B: PWM, C: SENSE */
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PORTB |= PHASE_A_EN;
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PORTD = (PORTD & ~PHASE_C_EN) | PHASE_B_EN;
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TCCR0A |= PHASE_B_OC;
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TCCR2A &= ~(PHASE_A_OC | PHASE_C_OC);
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ACSR = (1<<ACIS1) | (1<<ACIS0);
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next_sense = SENSE_C;
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break;
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case 4: PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_C_L;
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TCCR1A = (TCCR1A & ~(1<<COM1A1)) | (1<<COM1B1);
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TCCR2 &= ~(1<<COM21);
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case 4: /* A: SENSE, B: PWM, C: LOW */
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PORTB &= ~PHASE_A_EN;
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PORTD = (PORTD & ~PHASE_B_EN) | PHASE_C_EN;
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TCCR0A |= PHASE_B_OC;
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TCCR2A &= ~(PHASE_A_OC | PHASE_C_OC);
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ACSR = (1<<ACIS1);
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next_sense = SENSE_A;
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break;
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case 5: PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_C_L;
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TCCR1A = (TCCR1A & ~(1<<COM1B1)) | (1<<COM1A1);
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TCCR2 &= ~(1<<COM21);
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case 5: /* A: PWM, B: SENSE, C: LOW */
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PORTB |= PHASE_A_EN;
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PORTD = (PORTD & ~PHASE_B_EN) | PHASE_C_EN;
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TCCR0A &= ~PHASE_B_OC;
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TCCR2A = (TCCR2A & ~PHASE_C_OC) | PHASE_A_OC;
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ACSR = (1<<ACIS1) | (1<<ACIS0);
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next_sense = SENSE_B;
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break;
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@ -208,12 +226,12 @@ void setpwm(uint8_t pwm)
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if (pwm > params.pwm_max)
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pwm = params.pwm_max;
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OCR1A = pwm;
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OCR1B = pwm;
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OCR2 = pwm;
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OCR0B = pwm;
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OCR2A = pwm;
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OCR2B = pwm;
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}
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ISR(ANA_COMP_vect)
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ISR(ANALOG_COMP_vect)
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{
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next_phase();
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}
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17
blmc.h
17
blmc.h
@ -3,23 +3,6 @@
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#include <avr/io.h>
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#define PHASE_A_H (1<<PORTB1)
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#define PHASE_B_H (1<<PORTB2)
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#define PHASE_C_H (1<<PORTB3)
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#define PHASE_H_MASK (PHASE_A_H | PHASE_B_H | PHASE_C_H)
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#define PHASE_A_L (1<<PORTD4)
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#define PHASE_B_L (1<<PORTD3)
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#define PHASE_C_L (1<<PORTD2)
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#define PHASE_L_MASK (PHASE_A_L | PHASE_B_L | PHASE_C_L)
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#define SENSE_A 0
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#define SENSE_B 1
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#define SENSE_C 2
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#define SENSE_VOLTAGE 3
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#define SENSE_CURRENT 6
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#define FLAG_RUN_MASK 0x00F
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#define FLAG_PWM_SPINUP 0x001
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#define FLAG_PWM_NORMAL 0x002
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@ -35,7 +35,7 @@ extern struct ee_param params;
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#define CMD_GET_PARAM 0x24
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#define CMD_BOOT_LOADER 0x2F
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const static uint8_t info[16] = "blctrl m8-v1.2";
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const static uint8_t info[16] = "blctrl m88-v1.2";
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ISR(TWI_vect)
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{
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38
main.c
38
main.c
@ -45,13 +45,13 @@ extern struct blmc_ blmc;
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static uint8_t led[2];
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ISR(TIMER0_OVF_vect)
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ISR(TIMER1_OVF_vect)
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{
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static uint8_t timer0_cnt = 0;
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static uint8_t rpm_cnt = 0;
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static uint8_t adc_chan = SENSE_CURRENT;
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/* Come back in 20ms */
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TCNT0 = 0xFF - 156;
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TCNT1 = (0xFFFF - 20000);
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/* commutations during last 20ms */
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uint16_t diff = blmc.rpm_tmp - blmc.rpm_tmp_old;
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@ -76,16 +76,17 @@ ISR(TIMER0_OVF_vect)
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blmc.flags &= ~FLAG_I2C_TIMEOUT;
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}
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blmc.flags &= ~FLAG_I2C_ACTIVE;
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// TODO: currently disabled
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// blmc.flags &= ~FLAG_I2C_ACTIVE;
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}
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/* set pwm again (adjust current limit) */
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setpwm(blmc.pwm);
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/* calc rpm every second */
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timer0_cnt++;
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if (timer0_cnt == 50) {
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timer0_cnt = 0;
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rpm_cnt++;
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if (rpm_cnt == 50) {
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rpm_cnt = 0;
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blmc.rpm = blmc.rpm_tmp;
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blmc.rpm_tmp = 0;
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@ -127,27 +128,28 @@ ISR(TIMER0_OVF_vect)
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int main(void)
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{
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DDRB = PHASE_H_MASK | LED_RT | LED_GN;
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DDRD = PHASE_L_MASK;
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DDRB = PHASE_A_EN | PHASE_A_PWM | LED_RT | LED_GN;
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DDRD = PHASE_B_EN | PHASE_B_PWM | PHASE_C_EN | PHASE_C_PWM;
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PORTB = 0x00;
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PORTD = 0x00;
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/* timer0: running with F_CPU/1024 */
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TCCR0 = (1<<CS02) | (1<<CS00);
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/* timer0: running with F_CPU, 8bit Phase Correct PWM (16kHz) */
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TCCR0A = (1<<WGM00);
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TCCR0B = (1<<CS00);
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/* timer1: running with F_CPU, 8bit Phase Correct PWM (16kHz) */
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TCCR1B = (1<<CS10);
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TCCR1A = (1<<WGM10);
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/* timer1: running with F_CPU/8 */
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TCCR1B = (1<<CS11);
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/* timer2: running with F_CPU, 8bit Phase Correct PWM (16kHz) */
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TCCR2 = (1<<WGM20) | (1<<CS20);
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TCCR2A = (1<<WGM20);
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TCCR2B = (1<<CS20);
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/* enable Timer0 OVF Interrupt */
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TIMSK = (1<<TOIE0);
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/* enable Timer1 OVF Interrupt */
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TIMSK1 = (1<<TOIE1);
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/* Enable Analog Comparator Multiplexer */
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SFIOR |= (1<<ACME);
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ADCSRB |= (1<<ACME);
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/* I2C Init: keep Address from bootloader, Auto ACKs with Interrupts */
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TWCR = (1<<TWEA) | (1<<TWEN) | (1<<TWIE);
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19
main.h
19
main.h
@ -9,4 +9,23 @@
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#define LED_RT (1<<PORTB4)
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#define LED_GN (1<<PORTB5)
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#define PHASE_A_EN (1<<PORTB2)
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#define PHASE_A_PWM (1<<PORTB3)
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#define PHASE_A_OC (1<<COM2A1)
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#define PHASE_B_EN (1<<PORTD7)
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#define PHASE_B_PWM (1<<PORTD5)
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#define PHASE_B_OC (1<<COM0B1)
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#define PHASE_C_EN (1<<PORTD4)
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#define PHASE_C_PWM (1<<PORTD3)
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#define PHASE_C_OC (1<<COM2B1)
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#define SENSE_A 0
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#define SENSE_B 2
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#define SENSE_C 1
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#define SENSE_VOLTAGE 7
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#define SENSE_CURRENT 3
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#endif
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