533 lines
12 KiB
C
533 lines
12 KiB
C
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/*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* Hacked for the DB64360 board by Ingo.Assmus@keymile.com
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* extra improvments by Brain Waite
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*/
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#include <common.h>
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#include <mpc8xx.h>
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#include <malloc.h>
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#include "../include/mv_gen_reg.h"
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#include "../include/core.h"
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#define MAX_I2C_RETRYS 10
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#define I2C_DELAY 1000 /* Should be at least the # of MHz of Tclk */
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#undef DEBUG_I2C
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/*#define DEBUG_I2C*/
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#ifdef DEBUG_I2C
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#define DP(x) x
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#else
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#define DP(x)
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#endif
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/* Assuming that there is only one master on the bus (us) */
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static void i2c_init (int speed, int slaveaddr)
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{
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unsigned int n, m, freq, margin, power;
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unsigned int actualN = 0, actualM = 0;
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unsigned int control, status;
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unsigned int minMargin = 0xffffffff;
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unsigned int tclk = CFG_TCLK;
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unsigned int i2cFreq = speed; /* 100000 max. Fast mode not supported */
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DP (puts ("i2c_init\n"));
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/* gtI2cMasterInit */
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for (n = 0; n < 8; n++) {
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for (m = 0; m < 16; m++) {
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power = 2 << n; /* power = 2^(n+1) */
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freq = tclk / (10 * (m + 1) * power);
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if (i2cFreq > freq)
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margin = i2cFreq - freq;
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else
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margin = freq - i2cFreq;
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if (margin < minMargin) {
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minMargin = margin;
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actualN = n;
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actualM = m;
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}
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}
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}
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DP (puts ("setup i2c bus\n"));
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/* Setup bus */
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/* gtI2cReset */
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GT_REG_WRITE (I2C_SOFT_RESET, 0);
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DP (puts ("udelay...\n"));
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udelay (I2C_DELAY);
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DP (puts ("set baudrate\n"));
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GT_REG_WRITE (I2C_STATUS_BAUDE_RATE, (actualM << 3) | actualN);
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GT_REG_WRITE (I2C_CONTROL, (0x1 << 2) | (0x1 << 6));
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udelay (I2C_DELAY * 10);
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DP (puts ("read control, baudrate\n"));
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GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
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GT_REG_READ (I2C_CONTROL, &control);
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}
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static uchar i2c_start (void)
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{ /* DB64360 checked -> ok */
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unsigned int control, status;
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int count = 0;
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DP (puts ("i2c_start\n"));
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/* Set the start bit */
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/* gtI2cGenerateStartBit() */
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GT_REG_READ (I2C_CONTROL, &control);
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control |= (0x1 << 5); /* generate the I2C_START_BIT */
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GT_REG_WRITE (I2C_CONTROL, control);
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GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
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count = 0;
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while ((status & 0xff) != 0x08) {
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udelay (I2C_DELAY);
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if (count > 20) {
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GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
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return (status);
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}
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GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
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count++;
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}
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return (0);
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}
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static uchar i2c_select_device (uchar dev_addr, uchar read, int ten_bit)
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{
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unsigned int status, data, bits = 7;
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int count = 0;
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DP (puts ("i2c_select_device\n"));
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/* Output slave address */
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if (ten_bit) {
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bits = 10;
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}
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data = (dev_addr << 1);
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/* set the read bit */
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data |= read;
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GT_REG_WRITE (I2C_DATA, data);
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/* assert the address */
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RESET_REG_BITS (I2C_CONTROL, BIT3);
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udelay (I2C_DELAY);
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GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
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count = 0;
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while (((status & 0xff) != 0x40) && ((status & 0xff) != 0x18)) {
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udelay (I2C_DELAY);
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if (count > 20) {
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GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
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return (status);
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}
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GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
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count++;
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}
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if (bits == 10) {
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printf ("10 bit I2C addressing not yet implemented\n");
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return (0xff);
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}
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return (0);
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}
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static uchar i2c_get_data (uchar * return_data, int len)
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{
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unsigned int data, status = 0;
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int count = 0;
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DP (puts ("i2c_get_data\n"));
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while (len) {
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/* Get and return the data */
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RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
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udelay (I2C_DELAY * 5);
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GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
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count++;
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while ((status & 0xff) != 0x50) {
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udelay (I2C_DELAY);
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if (count > 2) {
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GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
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return 0;
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}
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GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
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count++;
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}
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GT_REG_READ (I2C_DATA, &data);
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len--;
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*return_data = (uchar) data;
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return_data++;
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}
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RESET_REG_BITS (I2C_CONTROL, BIT2 | BIT3);
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while ((status & 0xff) != 0x58) {
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udelay (I2C_DELAY);
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if (count > 200) {
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GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
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return (status);
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}
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GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
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count++;
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}
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GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /* stop */
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return (0);
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}
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static uchar i2c_write_data (unsigned int *data, int len)
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{
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unsigned int status;
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int count = 0;
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unsigned int temp;
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unsigned int *temp_ptr = data;
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DP (puts ("i2c_write_data\n"));
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while (len) {
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temp = (unsigned int) (*temp_ptr);
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GT_REG_WRITE (I2C_DATA, temp);
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RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
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udelay (I2C_DELAY);
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GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
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count++;
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while ((status & 0xff) != 0x28) {
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udelay (I2C_DELAY);
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if (count > 20) {
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GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
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return (status);
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}
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GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
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count++;
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}
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len--;
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temp_ptr++;
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}
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/* 11-14-2002 Paul Marchese */
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/* Can't have the write issuing a stop command */
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/* it's wrong to have a stop bit in read stream or write stream */
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/* since we don't know if it's really the end of the command */
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/* or whether we have just send the device address + offset */
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/* we will push issuing the stop command off to the original */
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/* calling function */
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/* set the interrupt bit in the control register */
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GT_REG_WRITE (I2C_CONTROL, (0x1 << 3));
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udelay (I2C_DELAY * 10);
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return (0);
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}
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/* 11-14-2002 Paul Marchese */
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/* created this function to get the i2c_write() */
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/* function working properly. */
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/* function to write bytes out on the i2c bus */
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/* this is identical to the function i2c_write_data() */
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/* except that it requires a buffer that is an */
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/* unsigned character array. You can't use */
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/* i2c_write_data() to send an array of unsigned characters */
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/* since the byte of interest ends up on the wrong end of the bus */
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/* aah, the joys of big endian versus little endian! */
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/* */
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/* returns 0 = success */
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/* anything other than zero is failure */
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static uchar i2c_write_byte (unsigned char *data, int len)
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{
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unsigned int status;
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int count = 0;
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unsigned int temp;
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unsigned char *temp_ptr = data;
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DP (puts ("i2c_write_byte\n"));
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while (len) {
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/* Set and assert the data */
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temp = *temp_ptr;
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GT_REG_WRITE (I2C_DATA, temp);
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RESET_REG_BITS (I2C_CONTROL, (0x1 << 3));
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udelay (I2C_DELAY);
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GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
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count++;
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while ((status & 0xff) != 0x28) {
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udelay (I2C_DELAY);
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if (count > 20) {
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GT_REG_WRITE (I2C_CONTROL, (0x1 << 4)); /*stop */
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return (status);
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}
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GT_REG_READ (I2C_STATUS_BAUDE_RATE, &status);
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count++;
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}
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len--;
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temp_ptr++;
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}
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/* Can't have the write issuing a stop command */
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/* it's wrong to have a stop bit in read stream or write stream */
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/* since we don't know if it's really the end of the command */
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/* or whether we have just send the device address + offset */
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/* we will push issuing the stop command off to the original */
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/* calling function */
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/* GT_REG_WRITE(I2C_CONTROL, (0x1 << 3) | (0x1 << 4));
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GT_REG_WRITE(I2C_CONTROL, (0x1 << 4)); */
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/* set the interrupt bit in the control register */
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GT_REG_WRITE (I2C_CONTROL, (0x1 << 3));
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udelay (I2C_DELAY * 10);
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return (0);
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}
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static uchar
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i2c_set_dev_offset (uchar dev_addr, unsigned int offset, int ten_bit,
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int alen)
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{
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uchar status;
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unsigned int table[2];
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/* initialize the table of address offset bytes */
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/* utilized for 2 byte address offsets */
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/* NOTE: the order is high byte first! */
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table[1] = offset & 0xff; /* low byte */
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table[0] = offset / 0x100; /* high byte */
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DP (puts ("i2c_set_dev_offset\n"));
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status = i2c_select_device (dev_addr, 0, ten_bit);
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if (status) {
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#ifdef DEBUG_I2C
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printf ("Failed to select device setting offset: 0x%02x\n",
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status);
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#endif
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return status;
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}
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/* check the address offset length */
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if (alen == 0)
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/* no address offset */
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return (0);
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else if (alen == 1) {
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/* 1 byte address offset */
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status = i2c_write_data (&offset, 1);
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if (status) {
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#ifdef DEBUG_I2C
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printf ("Failed to write data: 0x%02x\n", status);
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#endif
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return status;
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}
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} else if (alen == 2) {
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/* 2 bytes address offset */
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status = i2c_write_data (table, 2);
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if (status) {
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#ifdef DEBUG_I2C
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printf ("Failed to write data: 0x%02x\n", status);
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#endif
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return status;
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}
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} else {
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/* address offset unknown or not supported */
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printf ("Address length offset %d is not supported\n", alen);
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return 1;
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}
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return 0; /* sucessful completion */
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}
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uchar
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i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data,
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int len)
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{
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uchar status = 0;
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unsigned int i2cFreq = CFG_I2C_SPEED;
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DP (puts ("i2c_read\n"));
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i2c_init (i2cFreq, 0); /* set the i2c frequency */
|
||
|
|
|
||
|
|
status = i2c_start ();
|
||
|
|
|
||
|
|
if (status) {
|
||
|
|
#ifdef DEBUG_I2C
|
||
|
|
printf ("Transaction start failed: 0x%02x\n", status);
|
||
|
|
#endif
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */
|
||
|
|
if (status) {
|
||
|
|
#ifdef DEBUG_I2C
|
||
|
|
printf ("Failed to set slave address & offset: 0x%02x\n",
|
||
|
|
status);
|
||
|
|
#endif
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
i2c_init (i2cFreq, 0); /* set the i2c frequency again */
|
||
|
|
|
||
|
|
status = i2c_start ();
|
||
|
|
if (status) {
|
||
|
|
#ifdef DEBUG_I2C
|
||
|
|
printf ("Transaction restart failed: 0x%02x\n", status);
|
||
|
|
#endif
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
status = i2c_select_device (dev_addr, 1, 0); /* send the slave address */
|
||
|
|
if (status) {
|
||
|
|
#ifdef DEBUG_I2C
|
||
|
|
printf ("Address not acknowledged: 0x%02x\n", status);
|
||
|
|
#endif
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
status = i2c_get_data (data, len);
|
||
|
|
if (status) {
|
||
|
|
#ifdef DEBUG_I2C
|
||
|
|
printf ("Data not recieved: 0x%02x\n", status);
|
||
|
|
#endif
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* 11-14-2002 Paul Marchese */
|
||
|
|
/* Function to set the I2C stop bit */
|
||
|
|
void i2c_stop (void)
|
||
|
|
{
|
||
|
|
GT_REG_WRITE (I2C_CONTROL, (0x1 << 4));
|
||
|
|
}
|
||
|
|
|
||
|
|
/* 11-14-2002 Paul Marchese */
|
||
|
|
/* I2C write function */
|
||
|
|
/* dev_addr = device address */
|
||
|
|
/* offset = address offset */
|
||
|
|
/* alen = length in bytes of the address offset */
|
||
|
|
/* data = pointer to buffer to read data into */
|
||
|
|
/* len = # of bytes to read */
|
||
|
|
/* */
|
||
|
|
/* returns 0 = succesful */
|
||
|
|
/* anything but zero is failure */
|
||
|
|
uchar
|
||
|
|
i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data,
|
||
|
|
int len)
|
||
|
|
{
|
||
|
|
uchar status = 0;
|
||
|
|
unsigned int i2cFreq = CFG_I2C_SPEED;
|
||
|
|
|
||
|
|
DP (puts ("i2c_write\n"));
|
||
|
|
|
||
|
|
i2c_init (i2cFreq, 0); /* set the i2c frequency */
|
||
|
|
|
||
|
|
status = i2c_start (); /* send a start bit */
|
||
|
|
|
||
|
|
if (status) {
|
||
|
|
#ifdef DEBUG_I2C
|
||
|
|
printf ("Transaction start failed: 0x%02x\n", status);
|
||
|
|
#endif
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
status = i2c_set_dev_offset (dev_addr, offset, 0, alen); /* send the slave address + offset */
|
||
|
|
if (status) {
|
||
|
|
#ifdef DEBUG_I2C
|
||
|
|
printf ("Failed to set slave address & offset: 0x%02x\n",
|
||
|
|
status);
|
||
|
|
#endif
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
status = i2c_write_byte (data, len); /* write the data */
|
||
|
|
if (status) {
|
||
|
|
#ifdef DEBUG_I2C
|
||
|
|
printf ("Data not written: 0x%02x\n", status);
|
||
|
|
#endif
|
||
|
|
return status;
|
||
|
|
}
|
||
|
|
/* issue a stop bit */
|
||
|
|
i2c_stop ();
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* 11-14-2002 Paul Marchese */
|
||
|
|
/* function to determine if an I2C device is present */
|
||
|
|
/* chip = device address of chip to check for */
|
||
|
|
/* */
|
||
|
|
/* returns 0 = sucessful, the device exists */
|
||
|
|
/* anything other than zero is failure, no device */
|
||
|
|
int i2c_probe (uchar chip)
|
||
|
|
{
|
||
|
|
|
||
|
|
/* We are just looking for an <ACK> back. */
|
||
|
|
/* To see if the device/chip is there */
|
||
|
|
|
||
|
|
#ifdef DEBUG_I2C
|
||
|
|
unsigned int i2c_status;
|
||
|
|
#endif
|
||
|
|
uchar status = 0;
|
||
|
|
unsigned int i2cFreq = CFG_I2C_SPEED;
|
||
|
|
|
||
|
|
DP (puts ("i2c_probe\n"));
|
||
|
|
|
||
|
|
i2c_init (i2cFreq, 0); /* set the i2c frequency */
|
||
|
|
|
||
|
|
status = i2c_start (); /* send a start bit */
|
||
|
|
|
||
|
|
if (status) {
|
||
|
|
#ifdef DEBUG_I2C
|
||
|
|
printf ("Transaction start failed: 0x%02x\n", status);
|
||
|
|
#endif
|
||
|
|
return (int) status;
|
||
|
|
}
|
||
|
|
|
||
|
|
status = i2c_set_dev_offset (chip, 0, 0, 0); /* send the slave address + no offset */
|
||
|
|
if (status) {
|
||
|
|
#ifdef DEBUG_I2C
|
||
|
|
printf ("Failed to set slave address: 0x%02x\n", status);
|
||
|
|
#endif
|
||
|
|
return (int) status;
|
||
|
|
}
|
||
|
|
#ifdef DEBUG_I2C
|
||
|
|
GT_REG_READ (I2C_STATUS_BAUDE_RATE, &i2c_status);
|
||
|
|
printf ("address %#x returned %#x\n", chip, i2c_status);
|
||
|
|
#endif
|
||
|
|
/* issue a stop bit */
|
||
|
|
i2c_stop ();
|
||
|
|
return 0; /* successful completion */
|
||
|
|
}
|