64 lines
1.9 KiB
Plaintext
64 lines
1.9 KiB
Plaintext
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By Thomas.Lange@corelatus.se 2004-Oct-05
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----------------------------------------
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DbAu1xx0 are development boards from AMD containing
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an Alchemy AU1xx0 series cpu with mips32 core.
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Existing cpu:s are Au1000, Au1100, Au1500 and Au1550
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Limitations & comments
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----------------------
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Support was originally big endian only.
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I have not tested, but several u-boot users report working
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configurations in little endian mode.
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I named the board dbau1x00, to allow
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support for all three development boards
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( dbau1000, dbau1100 and dbau1500 ).
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Now there is a new board called dbau1550 also, which
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should be supported RSN.
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I only have a dbau1000, so my testing is limited
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to this board.
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The board has two different flash banks, that can
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be selected via dip switch. This makes it possible
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to test new bootloaders without thrashing the YAMON
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boot loader delivered with board.
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NOTE! When you switch between the two boot flashes, the
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base addresses will be swapped.
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Have this in mind when you compile u-boot. TEXT_BASE has
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to match the address where u-boot is located when you
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actually launch.
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Ethernet only supported for mac0.
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PCMCIA only supported for slot 0, only 3.3V.
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PCMCIA IDE tested with Sandisk Compact Flash and
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IBM microdrive.
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###################################
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######## NOTE!!!!!! #########
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###################################
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If you partition a disk on another system (e.g. laptop),
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all bytes will be swapped on 16bit level when using
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PCMCIA and running cpu in big endian mode!!!!
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This is probably due to an error in Au1000 chip.
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Solution:
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a) Boot via network and partition disk directly from
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dbau1x00. The endian will then be correct.
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b) Partition disk on "laptop" and fill it with all files
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you need. Then write a simple program that endian swaps
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whole disk,
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Example:
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Original "laptop" byte order:
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B0 B1 B2 B3 B4 B5 B6 B7 B8 B9...
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Dbau1000 byte order will then be:
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B1 B0 B3 B2 B5 B4 B7 B6 B9 B8...
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