85 lines
1.3 KiB
C
85 lines
1.3 KiB
C
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#ifndef _MACROS_H
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#define _MACROS_H
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/*
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** Load a long integer into a register
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*/
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.macro liw reg, value
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lis \reg, \value@h
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ori \reg, \reg, \value@l
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.endm
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/*
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** Generate config_addr request
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** This macro expects the values in registers:
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** r3 - bus
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** r4 - devfn
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** r5 - offset
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*/
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.macro config_addr
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rlwinm r9, r5, 24, 0, 6
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rlwinm r8, r4, 16, 0, 31
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rlwinm r7, r3, 8, 0, 31
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or r9, r8, r9
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or r9, r7, r9
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ori r9, r9, 0x80
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liw r10, 0xfec00cf8
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stw r9, 0(r10)
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eieio
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sync
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.endm
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/*
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** Generate config_data address
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*/
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.macro config_data mask
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andi. r9, r5, \mask
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addi r9, r9, 0xcfc
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oris r9, r9, 0xfee0
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.endm
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/*
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** Write a byte value to an output port
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*/
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.macro outb port, value
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lis r2, 0xfe00
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li r0, \value
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stb r0, \port(r2)
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.endm
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/*
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** Write a register byte value to an output port
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*/
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.macro outbr port, value
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lis r2, 0xfe00
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stb \value, \port(r2)
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.endm
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/*
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** Read a byte value from a port into a specified register
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*/
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.macro inb reg, port
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lis r2, 0xfe00
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lbz \reg, \port(r2)
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.endm
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/*
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** Write a byte to the SuperIO config area
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*/
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.macro siowb offset, value
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li r3, 0
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li r4, (7<<3)
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li r5, \offset
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li r6, \value
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bl pci_write_cfg_byte
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.endm
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#endif
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