572 lines
16 KiB
C
572 lines
16 KiB
C
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/*
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* (C) Copyright 2001
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* Wolfgang Denk, DENX Software Engineering -- wd@denx.de
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/************************************************************************/
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/* ** DEBUG SETTINGS */
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/************************************************************************/
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/* #define DEBUG */
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/************************************************************************/
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/* ** HEADER FILES */
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/************************************************************************/
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#include <config.h>
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#include <common.h>
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#include <version.h>
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#include <stdarg.h>
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#include <linux/types.h>
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#include <devices.h>
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#include <s3c2400.h>
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#ifdef CONFIG_VFD
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/************************************************************************/
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/* ** CONFIG STUFF -- should be moved to board config file */
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/************************************************************************/
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/************************************************************************/
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#ifndef PAGE_SIZE
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#define PAGE_SIZE 4096
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#endif
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#define ROT 0x09
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#define BLAU 0x0C
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#define VIOLETT 0X0D
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/* MAGIC */
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#define FRAME_BUF_SIZE ((256*4*56)/8)
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#define frame_buf_offs 4
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/* defines for starting Timer3 as CPLD-Clk */
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#define START3 (1 << 16)
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#define UPDATE3 (1 << 17)
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#define INVERT3 (1 << 18)
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#define RELOAD3 (1 << 19)
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/* CPLD-Register for controlling vfd-blank-signal */
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#define VFD_DISABLE (*(volatile uchar *)0x04038000=0x0000)
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#define VFD_ENABLE (*(volatile uchar *)0x04038000=0x0001)
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/* Supported VFD Types */
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#define VFD_TYPE_T119C 1 /* Noritake T119C VFD */
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#define VFD_TYPE_MN11236 2
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/*#define NEW_CPLD_CLK*/
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int vfd_board_id;
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/* taken from armboot/common/vfd.c */
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unsigned long adr_vfd_table[112][18][2][4][2];
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unsigned char bit_vfd_table[112][18][2][4][2];
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/*
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* initialize the values for the VFD-grid-control in the framebuffer
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*/
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void init_grid_ctrl(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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ulong adr, grid_cycle;
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unsigned int bit, display;
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unsigned char temp, bit_nr;
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/*
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* clear frame buffer (logical clear => set to "black")
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*/
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memset ((void *)(gd->fb_base), 0, FRAME_BUF_SIZE);
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switch (gd->vfd_type) {
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case VFD_TYPE_T119C:
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for (display=0; display<4; display++) {
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for(grid_cycle=0; grid_cycle<56; grid_cycle++) {
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bit = grid_cycle * 256 * 4 +
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(grid_cycle + 200) * 4 +
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frame_buf_offs + display;
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/* wrap arround if offset (see manual S3C2400) */
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if (bit>=FRAME_BUF_SIZE*8)
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bit = bit - (FRAME_BUF_SIZE * 8);
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adr = gd->fb_base + (bit/32) * 4 + (3 - (bit%32) / 8);
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bit_nr = bit % 8;
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bit_nr = (bit_nr > 3) ? bit_nr-4 : bit_nr+4;
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temp=(*(volatile unsigned char*)(adr));
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temp |= (1<<bit_nr);
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(*(volatile unsigned char*)(adr))=temp;
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if(grid_cycle<55)
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bit = grid_cycle*256*4+(grid_cycle+201)*4+frame_buf_offs+display;
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else
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bit = grid_cycle*256*4+200*4+frame_buf_offs+display-4; /* grid nr. 0 */
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/* wrap arround if offset (see manual S3C2400) */
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if (bit>=FRAME_BUF_SIZE*8)
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bit = bit-(FRAME_BUF_SIZE*8);
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adr = gd->fb_base+(bit/32)*4+(3-(bit%32)/8);
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bit_nr = bit%8;
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bit_nr = (bit_nr>3)?bit_nr-4:bit_nr+4;
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temp=(*(volatile unsigned char*)(adr));
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temp |= (1<<bit_nr);
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(*(volatile unsigned char*)(adr))=temp;
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}
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}
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break;
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case VFD_TYPE_MN11236:
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for (display=0; display<4; display++) {
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for (grid_cycle=0; grid_cycle<38; grid_cycle++) {
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bit = grid_cycle * 256 * 4 +
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(253 - grid_cycle) * 4 +
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frame_buf_offs + display;
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/* wrap arround if offset (see manual S3C2400) */
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if (bit>=FRAME_BUF_SIZE*8)
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bit = bit - (FRAME_BUF_SIZE * 8);
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adr = gd->fb_base + (bit/32) * 4 + (3 - (bit%32) / 8);
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bit_nr = bit % 8;
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bit_nr = (bit_nr > 3) ? bit_nr-4 : bit_nr+4;
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temp=(*(volatile unsigned char*)(adr));
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temp |= (1<<bit_nr);
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(*(volatile unsigned char*)(adr))=temp;
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if(grid_cycle<37)
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bit = grid_cycle*256*4+(252-grid_cycle)*4+frame_buf_offs+display;
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/* wrap arround if offset (see manual S3C2400) */
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if (bit>=FRAME_BUF_SIZE*8)
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bit = bit-(FRAME_BUF_SIZE*8);
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adr = gd->fb_base+(bit/32)*4+(3-(bit%32)/8);
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bit_nr = bit%8;
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bit_nr = (bit_nr>3)?bit_nr-4:bit_nr+4;
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temp=(*(volatile unsigned char*)(adr));
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temp |= (1<<bit_nr);
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(*(volatile unsigned char*)(adr))=temp;
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}
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}
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break;
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default:
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printf ("Warning: unknown display type\n");
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break;
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}
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}
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/*
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*create translation table for getting easy the right position in the
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*physical framebuffer for some x/y-coordinates of the VFDs
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*/
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void create_vfd_table(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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unsigned long vfd_table[112][18][2][4][2];
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unsigned int x, y, color, display, entry, pixel;
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unsigned int x_abcdef = 0;
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switch (gd->vfd_type) {
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case VFD_TYPE_T119C:
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for(y=0; y<=17; y++) { /* Line */
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for(x=0; x<=111; x++) { /* Column */
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for(display=0; display <=3; display++) {
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/* Display 0 blue pixels */
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vfd_table[x][y][0][display][0] =
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(x==0) ? y*16+display
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: (x%4)*4+y*16+((x-1)/2)*1024+display;
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/* Display 0 red pixels */
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vfd_table[x][y][1][display][0] =
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(x==0) ? y*16+512+display
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: (x%4)*4+y*16+((x-1)/2)*1024+512+display;
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}
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}
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}
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break;
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case VFD_TYPE_MN11236:
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for(y=0; y<=17; y++) { /* Line */
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for(x=0; x<=111; x++) { /* Column */
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for(display=0; display <=3; display++) {
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vfd_table[x][y][0][display][0]=0;
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vfd_table[x][y][0][display][1]=0;
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vfd_table[x][y][1][display][0]=0;
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vfd_table[x][y][1][display][1]=0;
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switch (x%6) {
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case 0: x_abcdef=0; break; /* a -> a */
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case 1: x_abcdef=2; break; /* b -> c */
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case 2: x_abcdef=4; break; /* c -> e */
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case 3: x_abcdef=5; break; /* d -> f */
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case 4: x_abcdef=3; break; /* e -> d */
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case 5: x_abcdef=1; break; /* f -> b */
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}
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/* blue pixels */
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vfd_table[x][y][0][display][0] =
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(x>1) ? x_abcdef*4+((x-1)/3)*1024+y*48+display
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: x_abcdef*4+ 0+y*48+display;
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/* blue pixels */
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if (x>1 && (x-1)%3)
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vfd_table[x][y][0][display][1] = x_abcdef*4+((x-1)/3+1)*1024+y*48+display;
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/* red pixels */
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vfd_table[x][y][1][display][0] =
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(x>1) ? x_abcdef*4+24+((x-1)/3)*1024+y*48+display
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: x_abcdef*4+24+ 0+y*48+display;
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/* red pixels */
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if (x>1 && (x-1)%3)
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vfd_table[x][y][1][display][1] = x_abcdef*4+24+((x-1)/3+1)*1024+y*48+display;
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}
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}
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}
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break;
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default:
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/* do nothing */
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return;
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}
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/*
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* Create table with entries for physical byte adresses and
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* bit-number within the byte
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* from table with bit-numbers within the total framebuffer
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*/
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for(y=0;y<18;y++) {
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for(x=0;x<112;x++) {
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for(color=0;color<2;color++) {
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for(display=0;display<4;display++) {
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for(entry=0;entry<2;entry++) {
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unsigned long adr = gd->fb_base;
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unsigned int bit_nr = 0;
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if (vfd_table[x][y][color][display][entry]) {
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pixel = vfd_table[x][y][color][display][entry] + frame_buf_offs;
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/*
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* wrap arround if offset
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* (see manual S3C2400)
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*/
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if (pixel>=FRAME_BUF_SIZE*8)
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pixel = pixel-(FRAME_BUF_SIZE*8);
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adr = gd->fb_base+(pixel/32)*4+(3-(pixel%32)/8);
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bit_nr = pixel%8;
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bit_nr = (bit_nr>3)?bit_nr-4:bit_nr+4;
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}
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adr_vfd_table[x][y][color][display][entry] = adr;
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bit_vfd_table[x][y][color][display][entry] = bit_nr;
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}
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}
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}
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}
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}
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}
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/*
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* Set/clear pixel of the VFDs
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*/
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void set_vfd_pixel(unsigned char x, unsigned char y,
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unsigned char color, unsigned char display,
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unsigned char value)
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{
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DECLARE_GLOBAL_DATA_PTR;
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ulong adr;
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unsigned char bit_nr, temp;
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if (! gd->vfd_type) {
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/* Unknown type. */
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return;
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}
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/* Pixel-Eintrag Nr. 1 */
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adr = adr_vfd_table[x][y][color][display][0];
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/* Pixel-Eintrag Nr. 1 */
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bit_nr = bit_vfd_table[x][y][color][display][0];
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temp=(*(volatile unsigned char*)(adr));
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if (value)
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temp |= (1<<bit_nr);
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else
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temp &= ~(1<<bit_nr);
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(*(volatile unsigned char*)(adr))=temp;
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}
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/*
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* transfer image from BMP-File
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*/
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void transfer_pic(int display, unsigned char *adr, int height, int width)
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{
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int x, y;
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unsigned char temp;
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for (; height > 0; height -= 18)
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{
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if (height > 18)
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y = 18;
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else
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y = height;
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for (; y > 0; y--)
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{
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for (x = 0; x < width; x += 2)
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{
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temp = *adr++;
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set_vfd_pixel(x, y-1, 0, display, 0);
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set_vfd_pixel(x, y-1, 1, display, 0);
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if ((temp >> 4) == BLAU)
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set_vfd_pixel(x, y-1, 0, display, 1);
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else if ((temp >> 4) == ROT)
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set_vfd_pixel(x, y-1, 1, display, 1);
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else if ((temp >> 4) == VIOLETT)
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{
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set_vfd_pixel(x, y-1, 0, display, 1);
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set_vfd_pixel(x, y-1, 1, display, 1);
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}
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set_vfd_pixel(x+1, y-1, 0, display, 0);
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set_vfd_pixel(x+1, y-1, 1, display, 0);
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if ((temp & 0x0F) == BLAU)
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set_vfd_pixel(x+1, y-1, 0, display, 1);
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else if ((temp & 0x0F) == ROT)
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set_vfd_pixel(x+1, y-1, 1, display, 1);
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else if ((temp & 0x0F) == VIOLETT)
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{
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set_vfd_pixel(x+1, y-1, 0, display, 1);
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set_vfd_pixel(x+1, y-1, 1, display, 1);
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}
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}
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}
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if (display > 0)
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display--;
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else
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display = 3;
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}
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}
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/*
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* This function initializes VFD clock that is needed for the CPLD that
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* manages the keyboard.
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*/
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int vfd_init_clocks (void)
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{
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S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
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S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
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S3C24X0_LCD * const lcd = S3C24X0_GetBase_LCD();
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/* try to determine display type from the value
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* defined by pull-ups
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*/
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gpio->PCUP = (gpio->PCUP & 0xFFF0); /* activate GPC0...GPC3 pullups */
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gpio->PCCON = (gpio->PCCON & 0xFFFFFF00); /* configure GPC0...GPC3 as inputs */
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udelay (10); /* allow signals to settle */
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vfd_board_id = (~gpio->PCDAT) & 0x000F; /* read GPC0...GPC3 port pins */
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VFD_DISABLE; /* activate blank for the vfd */
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#define NEW_CPLD_CLK
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#ifdef NEW_CPLD_CLK
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if (vfd_board_id) {
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/* If new board revision, then use PWM 3 as cpld-clock */
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/* Enable 500 Hz timer for fill level sensor to operate properly */
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/* Configure TOUT3 as functional pin, disable pull-up */
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gpio->PDCON &= ~0x30000;
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gpio->PDCON |= 0x20000;
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gpio->PDUP |= (1 << 8);
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/* Configure the prescaler */
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timers->TCFG0 &= ~0xff00;
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timers->TCFG0 |= 0x0f00;
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/* Select MUX input (divider) for timer3 (1/16) */
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timers->TCFG1 &= ~0xf000;
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timers->TCFG1 |= 0x3000;
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/* Enable autoreload and set the counter and compare
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* registers to values for the 500 Hz clock
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* (for a given prescaler (15) and divider (16)):
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* counter = (66000000 / 500) >> 9;
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*/
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timers->ch[3].TCNTB = 0x101;
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timers->ch[3].TCMPB = 0x101 / 2;
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/* Start timer */
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timers->TCON = (timers->TCON | UPDATE3 | RELOAD3) & ~INVERT3;
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timers->TCON = (timers->TCON | START3) & ~UPDATE3;
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}
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#endif
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/* If old board revision, then use vm-signal as cpld-clock */
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lcd->LCDCON2 = 0x00FFC000;
|
||
|
lcd->LCDCON3 = 0x0007FF00;
|
||
|
lcd->LCDCON4 = 0x00000000;
|
||
|
lcd->LCDCON5 = 0x00000400;
|
||
|
lcd->LCDCON1 = 0x00000B75;
|
||
|
/* VM (GPD1) is used as clock for the CPLD */
|
||
|
gpio->PDCON = (gpio->PDCON & 0xFFFFFFF3) | 0x00000008;
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* initialize LCD-Controller of the S3C2400 for using VFDs
|
||
|
*
|
||
|
* VFD detection depends on the board revision:
|
||
|
* starting from Rev. 200 a type code can be read from the data pins,
|
||
|
* driven by some pull-up resistors; all earlier systems must be
|
||
|
* manually configured. The type is set in the "vfd_type" environment
|
||
|
* variable.
|
||
|
*/
|
||
|
int drv_vfd_init(void)
|
||
|
{
|
||
|
S3C24X0_LCD * const lcd = S3C24X0_GetBase_LCD();
|
||
|
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
|
||
|
char *tmp;
|
||
|
ulong palette;
|
||
|
static int vfd_init_done = 0;
|
||
|
int vfd_inv_data = 0;
|
||
|
|
||
|
DECLARE_GLOBAL_DATA_PTR;
|
||
|
|
||
|
if (vfd_init_done != 0)
|
||
|
return (0);
|
||
|
vfd_init_done = 1;
|
||
|
|
||
|
debug("Detecting Revison of WA4-VFD: ID=0x%X\n", vfd_board_id);
|
||
|
|
||
|
switch (vfd_board_id) {
|
||
|
case 0: /* board revision < Rev.200 */
|
||
|
if ((tmp = getenv ("vfd_type")) == NULL) {
|
||
|
break;
|
||
|
}
|
||
|
if (strcmp(tmp, "T119C") == 0) {
|
||
|
gd->vfd_type = VFD_TYPE_T119C;
|
||
|
} else if (strcmp(tmp, "MN11236") == 0) {
|
||
|
gd->vfd_type = VFD_TYPE_MN11236;
|
||
|
} else {
|
||
|
/* cannot use printf for a warning here */
|
||
|
gd->vfd_type = 0; /* unknown */
|
||
|
}
|
||
|
|
||
|
break;
|
||
|
default: /* default to MN11236, data inverted */
|
||
|
gd->vfd_type = VFD_TYPE_MN11236;
|
||
|
vfd_inv_data = 1;
|
||
|
setenv ("vfd_type", "MN11236");
|
||
|
}
|
||
|
debug ("VFD type: %s%s\n",
|
||
|
(gd->vfd_type == VFD_TYPE_T119C) ? "T119C" :
|
||
|
(gd->vfd_type == VFD_TYPE_MN11236) ? "MN11236" :
|
||
|
"unknown",
|
||
|
vfd_inv_data ? ", inverted data" : "");
|
||
|
|
||
|
gd->fb_base = gd->fb_base;
|
||
|
create_vfd_table();
|
||
|
init_grid_ctrl();
|
||
|
|
||
|
for (palette=0; palette < 16; palette++)
|
||
|
(*(volatile unsigned int*)(PALETTE+(palette*4)))=palette;
|
||
|
for (palette=16; palette < 256; palette++)
|
||
|
(*(volatile unsigned int*)(PALETTE+(palette*4)))=0x00;
|
||
|
|
||
|
/*
|
||
|
* Hinweis: Der Framebuffer ist um genau ein Nibble verschoben
|
||
|
* Das erste angezeigte Pixel wird aus dem zweiten Nibble geholt
|
||
|
* das letzte angezeigte Pixel wird aus dem ersten Nibble geholt
|
||
|
* (wrap around)
|
||
|
* see manual S3C2400
|
||
|
*/
|
||
|
/* Stopp LCD-Controller */
|
||
|
lcd->LCDCON1 = 0x00000000;
|
||
|
/* frame buffer startadr */
|
||
|
lcd->LCDSADDR1 = gd->fb_base >> 1;
|
||
|
/* frame buffer endadr */
|
||
|
lcd->LCDSADDR2 = (gd->fb_base + FRAME_BUF_SIZE) >> 1;
|
||
|
lcd->LCDSADDR3 = ((256/4));
|
||
|
lcd->LCDCON2 = 0x000DC000;
|
||
|
if(gd->vfd_type == VFD_TYPE_MN11236)
|
||
|
lcd->LCDCON2 = 37 << 14; /* MN11236: 38 lines */
|
||
|
else
|
||
|
lcd->LCDCON2 = 55 << 14; /* T119C: 56 lines */
|
||
|
lcd->LCDCON3 = 0x0051000A;
|
||
|
lcd->LCDCON4 = 0x00000001;
|
||
|
if (gd->vfd_type && vfd_inv_data)
|
||
|
lcd->LCDCON5 = 0x000004C0;
|
||
|
else
|
||
|
lcd->LCDCON5 = 0x00000440;
|
||
|
|
||
|
/* Port pins as LCD output */
|
||
|
gpio->PCCON = (gpio->PCCON & 0xFFFFFF00)| 0x000000AA;
|
||
|
gpio->PDCON = (gpio->PDCON & 0xFFFFFF03)| 0x000000A8;
|
||
|
|
||
|
/* Synchronize VFD enable with LCD controller to avoid flicker */
|
||
|
lcd->LCDCON1 = 0x00000B75; /* Start LCD-Controller */
|
||
|
while((lcd->LCDCON5 & 0x180000)!=0x100000); /* Wait for end of VSYNC */
|
||
|
while((lcd->LCDCON5 & 0x060000)!=0x040000); /* Wait for next HSYNC */
|
||
|
while((lcd->LCDCON5 & 0x060000)==0x040000);
|
||
|
while((lcd->LCDCON5 & 0x060000)!=0x000000);
|
||
|
if(gd->vfd_type)
|
||
|
VFD_ENABLE;
|
||
|
|
||
|
debug ("LCDSADDR1: %lX\n", lcd->LCDSADDR1);
|
||
|
debug ("LCDSADDR2: %lX\n", lcd->LCDSADDR2);
|
||
|
debug ("LCDSADDR3: %lX\n", lcd->LCDSADDR3);
|
||
|
|
||
|
return 0;
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* Disable VFD: should be run before resetting the system:
|
||
|
* disable VM, enable pull-up
|
||
|
*/
|
||
|
void disable_vfd (void)
|
||
|
{
|
||
|
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
|
||
|
|
||
|
VFD_DISABLE;
|
||
|
gpio->PDCON &= ~0xC;
|
||
|
gpio->PDUP &= ~0x2;
|
||
|
}
|
||
|
|
||
|
/************************************************************************/
|
||
|
/* ** ROM capable initialization part - needed to reserve FB memory */
|
||
|
/************************************************************************/
|
||
|
|
||
|
/*
|
||
|
* This is called early in the system initialization to grab memory
|
||
|
* for the VFD controller.
|
||
|
*
|
||
|
* Note that this is running from ROM, so no write access to global data.
|
||
|
*/
|
||
|
ulong vfd_setmem (ulong addr)
|
||
|
{
|
||
|
ulong size;
|
||
|
|
||
|
/* Round up to nearest full page */
|
||
|
size = (FRAME_BUF_SIZE + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
|
||
|
|
||
|
debug ("Reserving %ldk for VFD Framebuffer at: %08lx\n", size>>10, addr);
|
||
|
|
||
|
return (size);
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* Calculate fb size for VIDEOLFB_ATAG. Size returned contains fb,
|
||
|
* descriptors and palette areas.
|
||
|
*/
|
||
|
ulong calc_fbsize (void)
|
||
|
{
|
||
|
return FRAME_BUF_SIZE;
|
||
|
}
|
||
|
|
||
|
#endif /* CONFIG_VFD */
|