176 lines
6.9 KiB
Plaintext
176 lines
6.9 KiB
Plaintext
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NAND FLASH commands and notes
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# (C) Copyright 2003
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# Dave Ellis, SIXNET, dge@sixnetio.com
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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Commands:
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nand bad
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Print a list of all of the bad blocks in the current device.
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nand device
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Print information about the current NAND device.
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nand device num
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Make device `num' the current device and print information about it.
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nand erase off size
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nand erase clean [off size]
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Erase `size' bytes starting at offset `off'. Only complete erase
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blocks can be erased.
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If `clean' is specified, a JFFS2-style clean marker is written to
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each block after it is erased. If `clean' is specified without an
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offset or size, the entire flash is erased.
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This command will not erase blocks that are marked bad. There is
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a debug option in cmd_nand.c to allow bad blocks to be erased.
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Please read the warning there before using it, as blocks marked
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bad by the manufacturer must _NEVER_ be erased.
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nand info
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Print information about all of the NAND devices found.
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nand read addr ofs size
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Read `size' bytes from `ofs' in NAND flash to `addr'. If a page
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cannot be read because it is marked bad or an uncorrectable data
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error is found the command stops with an error.
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nand read.jffs2 addr ofs size
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Like `read', but the data for blocks that are marked bad is read as
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0xff. This gives a readable JFFS2 image that can be processed by
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the JFFS2 commands such as ls and fsload.
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nand read.oob addr ofs size
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Read `size' bytes from the out-of-band data area corresponding to
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`ofs' in NAND flash to `addr'. This is limited to the 16 bytes of
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data for one 512-byte page or 2 256-byte pages. There is no check
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for bad blocks or ECC errors.
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nand write addr ofs size
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Write `size' bytes from `addr' to `ofs' in NAND flash. If a page
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cannot be written because it is marked bad or the write fails the
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command stops with an error.
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nand write.jffs2 addr ofs size
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Like `write', but blocks that are marked bad are skipped and the
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is written to the next block instead. This allows writing writing
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a JFFS2 image, as long as the image is short enough to fit even
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after skipping the bad blocks. Compact images, such as those
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produced by mkfs.jffs2 should work well, but loading an image copied
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from another flash is going to be trouble if there are any bad blocks.
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nand write.oob addr ofs size
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Write `size' bytes from `addr' to the out-of-band data area
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corresponding to `ofs' in NAND flash. This is limited to the 16 bytes
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of data for one 512-byte page or 2 256-byte pages. There is no check
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for bad blocks.
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Configuration Options:
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CFG_CMD_NAND
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A good one to add to CONFIG_COMMANDS since it enables NAND support.
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CONFIG_MTD_NAND_ECC_JFFS2
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Define this if you want the Error Correction Code information in
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the out-of-band data to be formatted to match the JFFS2 file system.
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CONFIG_MTD_NAND_ECC_YAFFS would be another useful choice for
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someone to implement.
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CFG_MAX_NAND_DEVICE
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The maximum number of NAND devices you want to support.
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NAND Interface:
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#define NAND_WAIT_READY(nand)
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Wait until the NAND flash is ready. Typically this would be a
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loop waiting for the READY/BUSY line from the flash to indicate it
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it is ready.
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#define WRITE_NAND_COMMAND(d, adr)
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Write the command byte `d' to the flash at `adr' with the
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CLE (command latch enable) line true. If your board uses writes to
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different addresses to control CLE and ALE, you can modify `adr'
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to be the appropriate address here. If your board uses I/O registers
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to control them, it is probably better to let NAND_CTL_SETCLE()
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and company do it.
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#define WRITE_NAND_ADDRESS(d, adr)
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Write the address byte `d' to the flash at `adr' with the
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ALE (address latch enable) line true. If your board uses writes to
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different addresses to control CLE and ALE, you can modify `adr'
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to be the appropriate address here. If your board uses I/O registers
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to control them, it is probably better to let NAND_CTL_SETALE()
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and company do it.
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#define WRITE_NAND(d, adr)
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Write the data byte `d' to the flash at `adr' with the
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ALE and CLE lines false. If your board uses writes to
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different addresses to control CLE and ALE, you can modify `adr'
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to be the appropriate address here. If your board uses I/O registers
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to control them, it is probably better to let NAND_CTL_CLRALE()
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and company do it.
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#define READ_NAND(adr)
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Read a data byte from the flash at `adr' with the
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ALE and CLE lines false. If your board uses reads from
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different addresses to control CLE and ALE, you can modify `adr'
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to be the appropriate address here. If your board uses I/O registers
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to control them, it is probably better to let NAND_CTL_CLRALE()
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and company do it.
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#define NAND_DISABLE_CE(nand)
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Set CE (Chip Enable) low to enable the NAND flash.
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#define NAND_ENABLE_CE(nand)
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Set CE (Chip Enable) high to disable the NAND flash.
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#define NAND_CTL_CLRALE(nandptr)
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Set ALE (address latch enable) low. If ALE control is handled by
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WRITE_NAND_ADDRESS() this can be empty.
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#define NAND_CTL_SETALE(nandptr)
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Set ALE (address latch enable) high. If ALE control is handled by
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WRITE_NAND_ADDRESS() this can be empty.
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#define NAND_CTL_CLRCLE(nandptr)
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Set CLE (command latch enable) low. If CLE control is handled by
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WRITE_NAND_ADDRESS() this can be empty.
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#define NAND_CTL_SETCLE(nandptr)
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Set CLE (command latch enable) high. If CLE control is handled by
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WRITE_NAND_ADDRESS() this can be empty.
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More Definitions:
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These definitions are needed in the board configuration for now, but
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may really belong in a header file.
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TODO: Figure which ones are truly configuration settings and rename
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them to CFG_NAND_... and move the rest somewhere appropriate.
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#define SECTORSIZE 512
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#define ADDR_COLUMN 1
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#define ADDR_PAGE 2
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#define ADDR_COLUMN_PAGE 3
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#define NAND_ChipID_UNKNOWN 0x00
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#define NAND_MAX_FLOORS 1
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#define NAND_MAX_CHIPS 1
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