83 lines
2.4 KiB
Plaintext
83 lines
2.4 KiB
Plaintext
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XES XPedite1000 Board
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Last Update: December 29, 2003
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=======================================================================
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This file contains some handy info regarding U-Boot and the XES
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XPedite1000 PPC440GX PrPMC board. See the README.ppc440 for additional
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information.
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SWITCH SETTINGS & JUMPERS
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==========================
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Jumpers selected for AMD29LV040B flash part as the boot flash.
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I2C Strap EEPROM & Environment Settings
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=======================================
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The XPedite1000 uses a single I2C eeprom for the 440 strappings and for
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the environment variables. The first page (256 bytes) contains the
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strappings and the 2 EMAC HW Ethernet addresses. Be careful not to
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change the 1st page of the EEPROM! Unpopulated jumper J560 can get you
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out of trouble as it disables the strapping read from EEPROM.
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I2C iprobe
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=====================
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The i2c utilities work and have been tested on Rev B. of the 440GX. See
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README.ebony for more information about i2c probing with the 440.
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GETTING OUT OF I2C TROUBLE
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===========================
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(Direct quote from README.ebony)
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If you're like me ... you may have screwed up your bootstrap serial
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eeprom ... or worse, your SPD eeprom when experimenting with the
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i2c commands. If so, here are some ideas on how to get out of
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trouble:
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Serial bootstrap eeprom corruption:
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-----------------------------------
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Power down the board and set the following straps:
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J560 - closed
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This will select the default sys0 and sys1 settings (the serial
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eeproms are not used). Then power up the board and fix the serial
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eeprom using the imm command. Here are the values I currently
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use:
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=> imd 50 0 10
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0000: 85 7d 42 06 07 80 11 00 00 00 00 00 00 00 00 00 .}B.............
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Once you have the eeproms set correctly change the
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J560 straps as you desire.
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PPC440GX Ethernet EMACs
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=======================
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The XES XPedite1000 uses emac 2 & 3 and ignores emac 0 & 1. PHYs are connected
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only to emac 2 & 3. The HW Ethernet addresses are read from the i2c eeprom and
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placed in the bd info structure for enet2addr and enet3addr. The ethernet driver
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senses that enetaddr and enet1addr are 0's and does not use them.
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As of this writing gigabit ethernet and the TCPIP acceleration hardware is not
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supported.
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Flash Support
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=============
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As of this writing, there is support for the 1/2mb boot flash only. User flash
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is not yet supported.
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Regards,
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--Travis
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<travis.sawyer@sandburst.com>
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