307 lines
11 KiB
C
307 lines
11 KiB
C
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/******************************************************************************
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*
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* Author: Xilinx, Inc.
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*
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* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
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* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
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* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
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* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
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* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
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* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
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* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
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* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
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* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
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* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
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* FITNESS FOR A PARTICULAR PURPOSE.
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*
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*
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* Xilinx hardware products are not intended for use in life support
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* appliances, devices, or systems. Use in such applications is
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* expressly prohibited.
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*
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*
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* (c) Copyright 2002-2004 Xilinx Inc.
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* All rights reserved.
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*
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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******************************************************************************/
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/*****************************************************************************/
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/*
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*
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* @file xpacket_fifo_v1_00_b.h
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*
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* This component is a common component because it's primary purpose is to
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* prevent code duplication in drivers. A driver which must handle a packet
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* FIFO uses this component rather than directly manipulating a packet FIFO.
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*
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* A FIFO is a device which has dual port memory such that one user may be
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* inserting data into the FIFO while another is consuming data from the FIFO.
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* A packet FIFO is designed for use with packet protocols such as Ethernet and
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* ATM. It is typically only used with devices when DMA and/or Scatter Gather
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* is used. It differs from a nonpacket FIFO in that it does not provide any
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* interrupts for thresholds of the FIFO such that it is less useful without
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* DMA.
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*
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* @note
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*
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* This component has the capability to generate an interrupt when an error
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* condition occurs. It is the user's responsibility to provide the interrupt
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* processing to handle the interrupt. This component provides the ability to
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* determine if that interrupt is active, a deadlock condition, and the ability
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* to reset the FIFO to clear the condition. In this condition, the device which
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* is using the FIFO should also be reset to prevent other problems. This error
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* condition could occur as a normal part of operation if the size of the FIFO
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* is not setup correctly. See the hardware IP specification for more details.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.00b rpm 03/26/02 First release
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* </pre>
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*
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*****************************************************************************/
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#ifndef XPACKET_FIFO_H /* prevent circular inclusions */
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#define XPACKET_FIFO_H /* by using protection macros */
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/***************************** Include Files *********************************/
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#include "xbasic_types.h"
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#include "xstatus.h"
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/************************** Constant Definitions *****************************/
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/*
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* These constants specify the FIFO type and are mutually exclusive
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*/
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#define XPF_READ_FIFO_TYPE 0 /* a read FIFO */
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#define XPF_WRITE_FIFO_TYPE 1 /* a write FIFO */
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/*
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* These constants define the offsets to each of the registers from the
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* register base address, each of the constants are a number of bytes
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*/
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#define XPF_RESET_REG_OFFSET 0UL
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#define XPF_MODULE_INFO_REG_OFFSET 0UL
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#define XPF_COUNT_STATUS_REG_OFFSET 4UL
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/*
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* This constant is used with the Reset Register
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*/
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#define XPF_RESET_FIFO_MASK 0x0000000A
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/*
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* These constants are used with the Occupancy/Vacancy Count Register. This
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* register also contains FIFO status
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*/
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#define XPF_COUNT_MASK 0x0000FFFF
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#define XPF_DEADLOCK_MASK 0x20000000
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#define XPF_ALMOST_EMPTY_FULL_MASK 0x40000000
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#define XPF_EMPTY_FULL_MASK 0x80000000
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/**************************** Type Definitions *******************************/
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/*
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* The XPacketFifo driver instance data. The driver is required to allocate a
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* variable of this type for every packet FIFO in the device.
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*/
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typedef struct {
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u32 RegBaseAddress; /* Base address of registers */
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u32 IsReady; /* Device is initialized and ready */
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u32 DataBaseAddress; /* Base address of data for FIFOs */
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} XPacketFifoV100b;
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/***************** Macros (Inline Functions) Definitions *********************/
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/*****************************************************************************/
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/*
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*
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* Reset the specified packet FIFO. Resetting a FIFO will cause any data
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* contained in the FIFO to be lost.
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*
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* @param InstancePtr contains a pointer to the FIFO to operate on.
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*
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* @return
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*
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* None.
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*
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* @note
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*
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* Signature: void XPF_V100B_RESET(XPacketFifoV100b *InstancePtr)
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*
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******************************************************************************/
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#define XPF_V100B_RESET(InstancePtr) \
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XIo_Out32((InstancePtr)->RegBaseAddress + XPF_RESET_REG_OFFSET, XPF_RESET_FIFO_MASK);
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/*****************************************************************************/
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/*
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*
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* Get the occupancy count for a read packet FIFO and the vacancy count for a
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* write packet FIFO. These counts indicate the number of 32-bit words
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* contained (occupancy) in the FIFO or the number of 32-bit words available
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* to write (vacancy) in the FIFO.
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*
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* @param InstancePtr contains a pointer to the FIFO to operate on.
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*
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* @return
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*
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* The occupancy or vacancy count for the specified packet FIFO.
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*
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* @note
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*
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* Signature: u32 XPF_V100B_GET_COUNT(XPacketFifoV100b *InstancePtr)
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*
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******************************************************************************/
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#define XPF_V100B_GET_COUNT(InstancePtr) \
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(XIo_In32((InstancePtr)->RegBaseAddress + XPF_COUNT_STATUS_REG_OFFSET) & \
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XPF_COUNT_MASK)
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/*****************************************************************************/
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/*
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*
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* Determine if the specified packet FIFO is almost empty. Almost empty is
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* defined for a read FIFO when there is only one data word in the FIFO.
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*
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* @param InstancePtr contains a pointer to the FIFO to operate on.
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*
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* @return
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*
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* TRUE if the packet FIFO is almost empty, FALSE otherwise.
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*
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* @note
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*
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* Signature: u32 XPF_V100B_IS_ALMOST_EMPTY(XPacketFifoV100b *InstancePtr)
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*
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******************************************************************************/
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#define XPF_V100B_IS_ALMOST_EMPTY(InstancePtr) \
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(XIo_In32((InstancePtr)->RegBaseAddress + XPF_COUNT_STATUS_REG_OFFSET) & \
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XPF_ALMOST_EMPTY_FULL_MASK)
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/*****************************************************************************/
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/*
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*
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* Determine if the specified packet FIFO is almost full. Almost full is
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* defined for a write FIFO when there is only one available data word in the
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* FIFO.
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*
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* @param InstancePtr contains a pointer to the FIFO to operate on.
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*
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* @return
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*
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* TRUE if the packet FIFO is almost full, FALSE otherwise.
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*
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* @note
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*
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* Signature: u32 XPF_V100B_IS_ALMOST_FULL(XPacketFifoV100b *InstancePtr)
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*
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******************************************************************************/
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#define XPF_V100B_IS_ALMOST_FULL(InstancePtr) \
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(XIo_In32((InstancePtr)->RegBaseAddress + XPF_COUNT_STATUS_REG_OFFSET) & \
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XPF_ALMOST_EMPTY_FULL_MASK)
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/*****************************************************************************/
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/*
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*
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* Determine if the specified packet FIFO is empty. This applies only to a
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* read FIFO.
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*
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* @param InstancePtr contains a pointer to the FIFO to operate on.
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*
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* @return
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*
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* TRUE if the packet FIFO is empty, FALSE otherwise.
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*
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* @note
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*
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* Signature: u32 XPF_V100B_IS_EMPTY(XPacketFifoV100b *InstancePtr)
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*
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******************************************************************************/
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#define XPF_V100B_IS_EMPTY(InstancePtr) \
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(XIo_In32((InstancePtr)->RegBaseAddress + XPF_COUNT_STATUS_REG_OFFSET) & \
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XPF_EMPTY_FULL_MASK)
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/*****************************************************************************/
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/*
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*
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* Determine if the specified packet FIFO is full. This applies only to a
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* write FIFO.
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*
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* @param InstancePtr contains a pointer to the FIFO to operate on.
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*
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* @return
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*
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* TRUE if the packet FIFO is full, FALSE otherwise.
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*
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* @note
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*
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* Signature: u32 XPF_V100B_IS_FULL(XPacketFifoV100b *InstancePtr)
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*
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******************************************************************************/
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#define XPF_V100B_IS_FULL(InstancePtr) \
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(XIo_In32((InstancePtr)->RegBaseAddress + XPF_COUNT_STATUS_REG_OFFSET) & \
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XPF_EMPTY_FULL_MASK)
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/*****************************************************************************/
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/*
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*
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* Determine if the specified packet FIFO is deadlocked. This condition occurs
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* when the FIFO is full and empty at the same time and is caused by a packet
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* being written to the FIFO which exceeds the total data capacity of the FIFO.
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* It occurs because of the mark/restore features of the packet FIFO which allow
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* retransmission of a packet. The software should reset the FIFO and any devices
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* using the FIFO when this condition occurs.
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*
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* @param InstancePtr contains a pointer to the FIFO to operate on.
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*
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* @return
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*
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* TRUE if the packet FIFO is deadlocked, FALSE otherwise.
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*
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* @note
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*
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* This component has the capability to generate an interrupt when an error
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* condition occurs. It is the user's responsibility to provide the interrupt
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* processing to handle the interrupt. This function provides the ability to
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* determine if a deadlock condition, and the ability to reset the FIFO to
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* clear the condition.
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*
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* In this condition, the device which is using the FIFO should also be reset
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* to prevent other problems. This error condition could occur as a normal part
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* of operation if the size of the FIFO is not setup correctly.
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*
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* Signature: u32 XPF_V100B_IS_DEADLOCKED(XPacketFifoV100b *InstancePtr)
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*
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******************************************************************************/
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#define XPF_V100B_IS_DEADLOCKED(InstancePtr) \
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(XIo_In32((InstancePtr)->RegBaseAddress + XPF_COUNT_STATUS_REG_OFFSET) & \
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XPF_DEADLOCK_MASK)
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/************************** Function Prototypes ******************************/
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/* Standard functions */
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XStatus XPacketFifoV100b_Initialize(XPacketFifoV100b * InstancePtr,
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u32 RegBaseAddress, u32 DataBaseAddress);
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XStatus XPacketFifoV100b_SelfTest(XPacketFifoV100b * InstancePtr, u32 FifoType);
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/* Data functions */
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XStatus XPacketFifoV100b_Read(XPacketFifoV100b * InstancePtr,
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u8 * ReadBufferPtr, u32 ByteCount);
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XStatus XPacketFifoV100b_Write(XPacketFifoV100b * InstancePtr,
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u8 * WriteBufferPtr, u32 ByteCount);
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#endif /* end of protection macro */
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