367 lines
13 KiB
Plaintext
367 lines
13 KiB
Plaintext
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U-Boot for Nios-32
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Last Update: February 1, 2004
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====================================================================
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This file contains information regarding U-Boot and the Altera
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Nios CPU. For information regarding U-Boot and the Nios Development
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Kits see:
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* Cyclone Edition (DK-1C20), see doc/README.dk1c20
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* Stratix Edition (DK-1S10), see doc/README.dk1s10 (TODO)
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* Stratix Edition (DK-1S40), see doc/README.dk1s40 (TODO)
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* Stratix Edition (DK-20K200), see doc/README.dk20k200 (TODO)
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For informations regarding Nios Development Kit hardware overview
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and the NIOS CPU standard configuration of all known boards made by
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Altera see:
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* Development Kit (DK) hardware overview, see doc/README.nios_DK
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* NIOS CPU standard_32 at DK-1C20, see doc/README.dk1c20_std32
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* NIOS CPU standard_32 at DK-1S10, see doc/README.dk1s10_std32
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* NIOS CPU standard_32 at DK-1S40, see doc/README.dk1s40_std32
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* NIOS CPU standard_32 at DK-20K200, see doc/README.dk20k200_std32
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For those interested in contributing ... see HELP WANTED below.
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1. OVERVIEW
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------------
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U-Boot has been successfully tested on the Nios Cyclone development
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board using both the 'safe' and 'standard 32' configurations with
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Nios CPU revision 3.1 (CPU_ID = 0x3018). U-Boot can be used with
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or without the GERMS monitor. The initial version of U-Boot for the
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Cyclone development kit is about 60 Kbyte and will fit in a single
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sector of on-board FLASH. Only the Nios 32-bit CPU is supported.
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1.1 GERMS Monitor
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------------------
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If GERMS is just not enough, then U-Boot is a great antibiotic.
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You will be very pleased with its high degree of configurability
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and its rich feature set.
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A few of the most obvious limitations of GERMS are overcome by
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using U-Boot (See 'Brain Damage'). Most notably, you can use
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minicom or Hyperterminal (duh).
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1.2 Altera Source Code
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-----------------------
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The Nios port does NOT include ANY sources that Altera has the
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copyright. This was a conscious decision ... not an accident.
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The Altera license is not clear in terms of distributing Altera
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sources (when altera silicon is not involved). This isn't really
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a problem as little, if any, of the Altera source contains
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features that are not already available in U-Boot.
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1.3 Debugging via OCI
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---------------------
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The Nios port supports debugging with gdb and/or nios-console
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via the JTAG port. Stubs for debugging with gdb via the serial
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port are not currently implemented.
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2. CONFIGURATION OPTIONS/SETTINGS
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----------------------------------
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2.1 Nios-specific Options/Settings
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-----------------------------------
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All configuration options/settings that are specific to Nios begin
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with "CONFIG_NIOS_", "CFG_NIOS_", or "CFG_NIOS_CPU_".
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The configuration follows a two-stage process. In the first stage
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the NIOS CPU core will defined like defined in Alteras SOPC Builder.
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At this point we use the "CFG_NIOS_CPU_" defines exclusively. For
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more informations about all the definitions you have to setup see
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into current board configurations and doc/README.nios_CFG_NIOS_CPU.
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In second stage we bring the NIOS CPU configuration in relation to
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U-Boot configuration options/settings. The following is a list of
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currently defined Nios-specific options/parameters used inside of
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U-Boot. If any options are related to Standard-32 Nios SDK
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excalibur.h definitions, the related definition follows the
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description).
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CONFIG_NIOS -- defined for all Nios-32 boards.
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CFG_NIOS_CONSOLE -- the base address of the console UART or the JTAG
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stdio port. To enable a console via JTAG, define
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CONFIG_CONSOLE_JTAG and set CGF_NIOS_CONSOLE to the base address
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of the JTAG stdio port (normally OCI base + 0x00fa). Then
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run nios-console with the -w option.
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(standard-32: nasys_uart_0 resp. na_uart1_base).
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CFG_NIOS_FIXEDBAUD -- defined if the console UART PTF fixed_baud
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parameter is set to '1'.
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CFG_NIOS_MULT_HW -- use full hardware multiply (not yet implemented).
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CFG_NIOS_MULT_MSTEP -- use hardware assisted multiply using the
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MSTEP instruction (not yet implemented).
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CFG_NIOS_TMRBASE -- the base address of the timer used to support
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xxx_timer routines (e.g. set_timer(), get_timer(), etc.).
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(standard-32: nasys_timer_1 resp. na_lo_priority_timer2_base).
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CFG_NIOS_TMRIRQ -- the interrupt request (vector number) assigned to
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the timer. (standard-32: nasys_timer_1_irq resp.
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na_low_priority_timer2_irq).
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CFG_NIOS_TMRMS -- the period of the timer in milliseconds.
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CFG_NIOS_TMRCNT -- the preloadable counter value for the timer if it has
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no fixed period.
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CFG_NIOS_ASMIBASE -- the base address of the ASMI peripheral.
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(standard-32: na_asmi_base).
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CFG_NIOS_SPIBASE -- the base address of the SPI master (!) peripheral.
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(nasys_spi_0)
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CFG_NIOS_SPIBITS -- the amount of configured SPI data bits in PTF.
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This value can be 8 or 16 only! (PTF: databits)
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2.2 Differences in U-Boot Options/Settings
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-------------------------------------------
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Some 'standard' U-Boot options/settings are treated differently in
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the Nios port. These are described below.
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CFG_GBL_DATA_OFFSET -- in the Nios port, this is the offset of the
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global data structure in the Nios memory space. More simply,
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the address of global data.
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3. ASSEMBLY CODING
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-------------------
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In browsing the assembly source files, you may notice the absence
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of the 'magic macros' (e.g. MOVIA, MOVIP, ADDIP etc.). This is
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deliberate. The documentation for the magic macros is scant and
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it is hard to find ... it does not appear in the Nios programmer's
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manual, nor does it appear in the assembler manual. Regardless,
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the macros actually do very little to improve readability anyway.
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With this in mind, all assembler modules use only instructions that
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appear in the Nios programmer's manual OR are directly supported
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by the nios-elf toolchain. For example, the 'dec %rB' instruction
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is an alias for 'subi %rB,1' that is supported by the assembler
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but does not appear in the programmer's manual.
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4. BOOT PROCESS
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---------------
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4.1 Boot process over GERMS
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---------------------------
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When the NIOS CPU catch a reset signal it will begin to be running
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code from CFG_NIOS_CPU_RST_VECT. Normally at this place it will
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find the GERMS monitor. That's the case for the generic NIOS CPU
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configuration "standard_32". When the GERMS monitor starts running,
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it performs important system initializations and then looks for
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executable code in flash, using the following steps:
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1. Examining the two bytes at CFG_NIOS_CPU_FLASH_BASE + 0x04000C.
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2. Examining the button 0 on the PIO CFG_NIOS_CPU_BUTTON_PIO.
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3. If the button is not pressed and the two bytes contain 'N'
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and 'i', the monitor executes a CALL to location
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CFG_NIOS_CPU_FLASH_BASE + 0x040000.
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4. If the code is not executed in step 3 or the code returns,
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then prints an 8-digit version number to STDOUT and waits for
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user commands from STDIN.
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In normal case, for "standard_32", STDIN and STDOUT are the first
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serial port.
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4.2 Return to GERMS command line
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--------------------------------
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During the boot process, the GERMS monitor checks for the existence
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of application software in flash memory. If found, the processor
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immediately executes the code. To return program execution to the
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GERMS monitor (that is, avoid running code stored in flash memory):
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1. Hold down CFG_NIOS_CPU_BUTTON_PIO, button number 0.
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2. Press then release the CPU reset button.
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3. Release CFG_NIOS_CPU_BUTTON_PIO, button number 0.
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5. DEBUGGING WITH GDB
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---------------------
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Debug sessions using gdb are currently supported only via JTAG. The
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stubs for debugging via a serial port are not implemented. To enable
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the gdb JTAG stubs, simply reference _brkpt_hw_int and _brkpt_sw_int
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at vector table offsets 3 and 4, respectively. For an example, see
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board/altera/dk1c20/vectors.S.
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5.1 Vector Table Initialization and ROM Stubs
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---------------------------------------------
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If CONFIG_ROM_STUBS is defined, the debug breakpoint and single step
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entries in the vector table are restored to their initial values
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immediately _after_ initializing the vector table. Defining this macro
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is useful when ROM-based stubs are implemented.
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NOTE: The default GERMS monitor does NOT implement gdb stubs, nor does
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it initialize the vector table. Therefore, when debugging U-Boot, you
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should NOT set a software breakpoint prior to vector table initialization.
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5.2 Starting a Debug Session
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----------------------------
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If you're not familiar with gdb, you follow these step-by-step instructions.
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These instructions are NOT the only way to start a debug session, but they
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cover most of the individual functions to get you started.
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1. Start the JTAG gdb server. Open a Nios shell window and start
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the server. When the server is started you must provide the base
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address of the OCI core. For example, when using the Cyclone
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development kit (DK1C20):
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$ nios-gdb-server --ocibase=0x00920800 --tcpport=2342
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2. Start gdb. Open a Nios shell window, change to the top-level
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U-Boot directory and start gdb, specifying the u-boot elf file:
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$ nios-elf-gdb u-boot
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3. Update target settings. From the file menu, select
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"Target Settings ..." and select the following, then click 'Ok':
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Target: Remote/TCP
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Port : 2342 (same as in step 1)
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Display download dialog: checked
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All other check boxes: unchecked
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4. Connect to the target. Select menu: 'Run->Connect to target'.
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You should see a dialog box indicating the you successfully connected
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to the target.
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5. Download U-Boot. Select menu: 'Run->Download'.
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6. Open a gdb console window and set the source directory paths.
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Select menu: 'View->Console'. In the console window, enter the
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following commands, then close the console window:
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(gdb) directory common
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(gdb) directory cpu/nios
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(gdb) directory lib_nios
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(gdb) directory board/altera/dk1c20
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Note that the last command is for the DK1C20 board only. If you
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are using another board, specify that board's directory.
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7. Open the file board.c (using the file menu in the lower
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left hand corner). Scroll to the board_init() routine and set
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a breakpoint.
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8. Run U-Boot. Just click on the run icon, or select menu:
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'Run->Run'. U-Boot should start running, then break at your
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breakpoint.
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9. Have fun & start learning more about gdb.
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5.3 For advanced Users
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----------------------
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A few notes for those more familiar with gdb.
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-Serial port stubs are not implemented. Sorry, but it's just not
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worth _my_ effort. The JTAG stubs work great and are ridiculously
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simple to implement.
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-If you need to debug the early startup code (prior to the vector
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table initialization), use the nios-console debugger.
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- Connect, download & run -- there are some problems here. Connect
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download and run seperately to avoid trouble.
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6. BRAIN DAMAGE
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----------------
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This section describes some of the unfortunate and avoidable aspects
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of working with the Nios CPU ... and some things you can do to
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reduce your pain.
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6.1 GERMS doesn't work with Hyperterminal
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------------------------------------------
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GERMS doesn't do CR/LF mapping that is compatible with Hyperterminal
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(or minicom) -- geez. Regardless of you opion of Hyperterminal, this
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sad design decision is remedied by using U-Boot.
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6.2 cygwin Incompatibility
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---------------------------
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The version of cygwin distributed with the nios GNUPro toolchain is
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out-of-date and incompatible with the latest cygwin distributions.
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In addition, many of the standard utilities are very dated as well.
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If you try to download and build the lastest version of grep for
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example, you'll quickly realize that a native gcc is not available
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(the next topic) which leads to U-Boot build problems (following
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topic).
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The solution ... well, you can wait for Altera ... or build as
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set of tools for linux.
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6.3 No native gcc
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------------------
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I'm not sure how this one slipped through the cracks ... but it is
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a real pain. Basically, if you want to build anything for the native
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environment -- forget it! A native (cygwin) gcc is not distributed,
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and the old version of cygwin makes locating one challenging.
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The solution ... same as above. Just download the gcc source from
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Altera and build up a set of cross tools for your favorite linux
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distro. Anybody who wants to use an already precompiled NIOS cross
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toolchain can it found in the CDK4NIOS project hosted by Source
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Forge at http://cdk4nios.sourceforge.net.
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6.4 Can't build default U-Boot
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-------------------------------
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By default, when you build U-Boot you will be building some native
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tools along with the target elf, bin, and srec files. Without a
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native gcc, this (obviously) causes problems.
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For developers using the Altera cygwin tools you can remove the
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'tools' directory from SUBDIRS in the top-level Makefile. You will
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also have to edit common/Makefile:
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Replace:
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environment.o: environment.c ../tools/envcrc
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$(CC) $(AFLAGS) -Wa,--no-warn \
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-DENV_CRC=$(shell ../tools/envcrc) \
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-c -o $@ environment.c
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With:
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environment.o: environment.c
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$(CC) $(AFLAGS) -Wa,--no-warn \
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-DENV_CRC=0 \
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-c -o $@ environment.c
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BTW, thats a 'zero' ... not the letter 'O'. And not that the
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"../tools/envcrc" dependency is removed.
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7. HELP WANTED
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---------------
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There are plenty of areas where help is needed. Here's are some ideas
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for those interested in contributing:
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-CompactFlash. Port & test CF/FAT.
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-Bedbug. Develop bedbug for Nios ... or at least provide a disassemble
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command.
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-Add boot support for ucLinux (niosnommu).
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-Implement (don't copy Altera code) the __mulxx routines using the
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MSTEP and MUL instructions (e.g. CFG_NIOS_MULT_HW and CFG_NIOS_MULT_MSTEP).
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Regards,
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--Scott
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<smcnutt@psyent.com>
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--Stephan
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<linz@li-pro.net>
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