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This commit is contained in:
Olaf Rempel 2024-01-07 23:58:22 +01:00
parent f69754bccc
commit be8d26848e
675 changed files with 235084 additions and 15041 deletions
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1158
Makefile
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1
board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc.so/readme.txt
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This file is just to ensure that the directory is created.

1
board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc.so/readme.txt
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This file is just to ensure that the directory is created.

1
board/MAI/bios_emulator/scitech/lib/release/linux/gcc/glibc.so/readme.txt
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This file is just to ensure that the directory is created.

1
board/MAI/bios_emulator/scitech/lib/release/linux/gcc/libc.so/readme.txt
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This file is just to ensure that the directory is created.

2
board/MAI/bios_emulator/scitech/src/common/makefile
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@ -7,7 +7,7 @@
# DPMSLib library files. Requires Borland C++ 4.52 to build
# some components.
#
# $Date: 2002/10/02 15:35:20 $ $Author: hfrieden $
# $Date: 2008-12-15 11:39:22 $ $Author: wokes $
#
#############################################################################

BIN
board/MAI/bios_emulator/scitech/src/pm/os2/dossctl.obj
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4
board/MAI/bios_emulator/scitech/src/pm/tests/vftest.c
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@ -22,7 +22,7 @@
* ========================================================================
*
* Filename: $Workfile$
* Version: $Revision: 1.1 $
* Version: $Revision: 1.1.1.1 $
*
* Language: ANSI C
* Environment: any
@ -33,7 +33,7 @@
* VF_init()
* VF_exit()
*
* $Date: 2002/10/02 15:35:21 $ $Author: hfrieden $
* $Date: 2008-12-15 11:39:22 $ $Author: wokes $
*
****************************************************************************/

17
board/barco/barco.c
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@ -2,13 +2,22 @@
*
* Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
*
* $Source: /home/services/cvs/firmware/ppc/u-boot-1.1.2/board/barco/barco.c,v $
* $Revision: 1.4 $
* $Author: mleeman $
* $Date: 2005/03/02 16:40:20 $
* $Source: /home/cvsroot/NasX86/Others/bootldr/u-boot-1.1.4_mv-3.4.4/board/barco/barco.c,v $
* $Revision: 1.1.1.1 $
* $Author: wokes $
* $Date: 2008-12-15 11:39:23 $
*
* Last ChangeLog Entry
* $Log: barco.c,v $
* Revision 1.1.1.1 2008-12-15 11:39:23 wokes
* marvell 88f6281 u-boot
*
* Revision 1.1.1.1 2008/12/15 11:17:13 wokes
* marvell 88f6281 u-boot
*
* Revision 1.1.1.1 2008/12/15 11:05:18 wokes
* marvell 88f6281 u-boot
*
* Revision 1.4 2005/03/02 16:40:20 mleeman
* remove empty labels (3.4 complains)
*

17
board/barco/barco_svc.h
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@ -2,13 +2,22 @@
*
* Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
*
* $Source: /home/services/cvs/firmware/ppc/u-boot-1.1.2/board/barco/barco_svc.h,v $
* $Revision: 1.2 $
* $Author: mleeman $
* $Date: 2005/02/21 12:48:58 $
* $Source: /home/cvsroot/NasX86/Others/bootldr/u-boot-1.1.4_mv-3.4.4/board/barco/barco_svc.h,v $
* $Revision: 1.1.1.1 $
* $Author: wokes $
* $Date: 2008-12-15 11:39:23 $
*
* Last ChangeLog Entry
* $Log: barco_svc.h,v $
* Revision 1.1.1.1 2008-12-15 11:39:23 wokes
* marvell 88f6281 u-boot
*
* Revision 1.1.1.1 2008/12/15 11:17:13 wokes
* marvell 88f6281 u-boot
*
* Revision 1.1.1.1 2008/12/15 11:05:18 wokes
* marvell 88f6281 u-boot
*
* Revision 1.2 2005/02/21 12:48:58 mleeman
* update of copyright years (feedback wd)
*

17
board/barco/flash.c
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@ -2,13 +2,22 @@
*
* Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
*
* $Source: /home/services/cvs/firmware/ppc/u-boot-1.1.2/board/barco/flash.c,v $
* $Revision: 1.3 $
* $Author: mleeman $
* $Date: 2005/02/21 12:48:58 $
* $Source: /home/cvsroot/NasX86/Others/bootldr/u-boot-1.1.4_mv-3.4.4/board/barco/flash.c,v $
* $Revision: 1.1.1.1 $
* $Author: wokes $
* $Date: 2008-12-15 11:39:23 $
*
* Last ChangeLog Entry
* $Log: flash.c,v $
* Revision 1.1.1.1 2008-12-15 11:39:23 wokes
* marvell 88f6281 u-boot
*
* Revision 1.1.1.1 2008/12/15 11:17:13 wokes
* marvell 88f6281 u-boot
*
* Revision 1.1.1.1 2008/12/15 11:05:18 wokes
* marvell 88f6281 u-boot
*
* Revision 1.3 2005/02/21 12:48:58 mleeman
* update of copyright years (feedback wd)
*

17
board/barco/speed.h
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@ -2,13 +2,22 @@
*
* Unless otherwise specified, Copyright (C) 2004-2005 Barco Control Rooms
*
* $Source: /home/services/cvs/firmware/ppc/u-boot-1.1.2/board/barco/speed.h,v $
* $Revision: 1.2 $
* $Author: mleeman $
* $Date: 2005/02/21 12:48:58 $
* $Source: /home/cvsroot/NasX86/Others/bootldr/u-boot-1.1.4_mv-3.4.4/board/barco/speed.h,v $
* $Revision: 1.1.1.1 $
* $Author: wokes $
* $Date: 2008-12-15 11:39:23 $
*
* Last ChangeLog Entry
* $Log: speed.h,v $
* Revision 1.1.1.1 2008-12-15 11:39:23 wokes
* marvell 88f6281 u-boot
*
* Revision 1.1.1.1 2008/12/15 11:17:13 wokes
* marvell 88f6281 u-boot
*
* Revision 1.1.1.1 2008/12/15 11:05:18 wokes
* marvell 88f6281 u-boot
*
* Revision 1.2 2005/02/21 12:48:58 mleeman
* update of copyright years (feedback wd)
*

2
board/cray/L1/bootscript.hush
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@ -1,4 +1,4 @@
# $Header$
# $Header: /home/cvsroot/NasX86/Others/bootldr/u-boot-1.1.4_mv-3.4.4/board/cray/L1/bootscript.hush,v 1.1.1.1 2008-12-15 11:39:23 wokes Exp $
# hush bootscript for PPCBOOT on L1
# note: all #s are in hex, do _NOT_ prefix it with 0x

2
board/gth/ee_dev.h
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@ -1,5 +1,5 @@
/* By Thomas.Lange@Corelatus.com 001025
$Revision: 1.6 $
$Revision: 1.1.1.1 $
Definitions for EEPROM/VOLT METER DS2438
Copyright (C) 2000-2001 Corelatus AB */

2
board/jse/host_bridge.c
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@ -17,7 +17,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#ident "$Id:$"
#ident "$Id: host_bridge.c,v 1.1.1.1 2008-12-15 11:39:24 wokes Exp $"
# include <common.h>
# include <pci.h>

382
board/mv_feroceon/USP/ethSwitch/mv_switch.c Normal file
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@ -0,0 +1,382 @@
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
This software file (the "File") is owned and distributed by Marvell
International Ltd. and/or its affiliates ("Marvell") under the following
alternative licensing terms. Once you have made an election to distribute the
File under one of the following license alternatives, please (i) delete this
introductory statement regarding license alternatives, (ii) delete the two
license alternatives that you have not elected to use and (iii) preserve the
Marvell copyright notice above.
********************************************************************************
Marvell Commercial License Option
If you received this File from Marvell and you have entered into a commercial
license agreement (a "Commercial License") with Marvell, the File is licensed
to you under the terms of the applicable Commercial License.
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
********************************************************************************
Marvell BSD License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File under the following licensing terms.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Marvell nor the names of its contributors may be
used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#include "mvOs.h"
#include "mv_switch.h"
#include "eth-phy/mvEthPhy.h"
#include "mv_switchRegs.h"
#include "mvCtrlEnvLib.h"
static void switchVlanInit(MV_U32 ethPortNum,
MV_U32 switchCpuPort,
MV_U32 switchMaxPortsNum,
MV_U32 switchPortsOffset,
MV_U32 switchEnabledPortsMask);
/*******************************************************************************
* mvEthE6065_61PhyBasicInit -
*
* DESCRIPTION:
* Do a basic Init to the Phy , including reset
*
* INPUT:
* ethPortNum - Ethernet port number
*
* OUTPUT:
* None.
*
* RETURN: None
*
*******************************************************************************/
MV_VOID mvEthE6065_61SwitchBasicInit(MV_U32 ethPortNum)
{
switchVlanInit(ethPortNum,
MV_E6065_CPU_PORT,
MV_E6065_MAX_PORTS_NUM,
MV_E6065_PORTS_OFFSET,
MV_E6065_ENABLED_PORTS);
}
/*******************************************************************************
* mvEthE6063PhyBasicInit -
*
* DESCRIPTION:
* Do a basic Init to the Phy , including reset
*
* INPUT:
* ethPortNum - Ethernet port number
*
* OUTPUT:
* None.
*
* RETURN: None
*
*******************************************************************************/
MV_VOID mvEthE6063SwitchBasicInit(MV_U32 ethPortNum)
{
switchVlanInit(ethPortNum,
MV_E6063_CPU_PORT,
MV_E6063_MAX_PORTS_NUM,
MV_E6063_PORTS_OFFSET,
MV_E6063_ENABLED_PORTS);
}
/*******************************************************************************
* mvEthE6131PhyBasicInit -
*
* DESCRIPTION:
* Do a basic Init to the Phy , including reset
*
* INPUT:
* ethPortNum - Ethernet port number
*
* OUTPUT:
* None.
*
* RETURN: None
*
*******************************************************************************/
MV_VOID mvEthE6131SwitchBasicInit(MV_U32 ethPortNum)
{
MV_U16 reg;
/*Enable Phy power up*/
mvEthPhyRegWrite (0,0,0x9140);
mvEthPhyRegWrite (1,0,0x9140);
mvEthPhyRegWrite (2,0,0x9140);
/*Enable PPU*/
mvEthPhyRegWrite (0x1b,4,0x4080);
/*Enable Phy detection*/
mvEthPhyRegRead (0x13,0,&reg);
reg &= ~(1<<12);
mvEthPhyRegWrite (0x13,0,reg);
mvOsDelay(100);
mvEthPhyRegWrite (0x13,1,0x33);
switchVlanInit(ethPortNum,
MV_E6131_CPU_PORT,
MV_E6131_MAX_PORTS_NUM,
MV_E6131_PORTS_OFFSET,
MV_E6131_ENABLED_PORTS);
}
/*******************************************************************************
* mvEthE6161PhyBasicInit -
*
* DESCRIPTION:
* Do a basic Init to the Phy , including reset
*
* INPUT:
* ethPortNum - Ethernet port number
*
* OUTPUT:
* None.
*
* RETURN: None
*
*******************************************************************************/
MV_VOID mvEthE6161SwitchBasicInit(void)
{
MV_U32 prt;
MV_U16 reg;
volatile MV_U32 timeout;
/* The 6161/5 needs a delay */
mvOsDelay(100);
/* Init vlan */
switchVlanInit(0,
MV_E6161_CPU_PORT,
MV_E6161_MAX_PORTS_NUM,
MV_E6161_PORTS_OFFSET,
MV_E6161_ENABLED_PORTS);
/* Enable RGMII delay on Tx and Rx for CPU port */
mvEthPhyRegWrite (0x14,0x1a,0x81e7);
mvEthPhyRegRead (0x15,0x1a,&reg);
mvEthPhyRegWrite (0x15,0x1a,0x18);
mvEthPhyRegWrite (0x14,0x1a,0xc1e7);
for(prt=0; prt < MV_E6161_MAX_PORTS_NUM; prt++)
{
if (prt != MV_E6161_CPU_PORT)
{
/*Enable Phy power up*/
mvEthPhyRegWrite (MV_E6161_GLOBAL_2_REG_DEV_ADDR,
MV_E6161_SMI_PHY_DATA, 0x3360);
mvEthPhyRegWrite (MV_E6161_GLOBAL_2_REG_DEV_ADDR,
MV_E6161_SMI_PHY_COMMAND, (0x9410 | (prt << 5)));
/*Make sure SMIBusy bit cleared before another SMI operation can take place*/
timeout = E6161_PHY_TIMEOUT;
do
{
mvEthPhyRegRead(MV_E6161_GLOBAL_2_REG_DEV_ADDR,
MV_E6161_SMI_PHY_COMMAND,&reg);
if(timeout-- == 0)
{
mvOsPrintf("mvEthPhyRegRead: SMI busy timeout\n");
return;
}
}while (reg & E6161_PHY_SMI_BUSY_MASK);
mvEthPhyRegWrite (MV_E6161_GLOBAL_2_REG_DEV_ADDR,
MV_E6161_SMI_PHY_DATA,0x1140);
mvEthPhyRegWrite (MV_E6161_GLOBAL_2_REG_DEV_ADDR,
MV_E6161_SMI_PHY_COMMAND,(0x9400 | (prt << 5)));
/*Make sure SMIBusy bit cleared before another SMI operation can take place*/
timeout = E6161_PHY_TIMEOUT;
do
{
mvEthPhyRegRead(MV_E6161_GLOBAL_2_REG_DEV_ADDR,
MV_E6161_SMI_PHY_COMMAND,&reg);
if(timeout-- == 0)
{
mvOsPrintf("mvEthPhyRegRead: SMI busy timeout\n");
return;
}
}while (reg & E6161_PHY_SMI_BUSY_MASK);
}
/*Enable port*/
mvEthPhyRegWrite (MV_E6161_PORTS_OFFSET + prt, 4, 0x7f);
}
/*Force CPU port to RGMII FDX 1000Base*/
mvEthPhyRegWrite (MV_E6161_PORTS_OFFSET + MV_E6161_CPU_PORT, 1, 0x3e);
}
static void switchVlanInit(MV_U32 ethPortNum,
MV_U32 switchCpuPort,
MV_U32 switchMaxPortsNum,
MV_U32 switchPortsOffset,
MV_U32 switchEnabledPortsMask)
{
MV_U32 prt;
MV_U16 reg;
/* be sure all ports are disabled */
for(prt=0; prt < switchMaxPortsNum; prt++)
{
mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt),
MV_SWITCH_PORT_CONTROL_REG,&reg);
reg &= ~0x3;
mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt),
MV_SWITCH_PORT_CONTROL_REG,reg);
}
/* Set CPU port VID to 0x1 */
mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(switchCpuPort),
MV_SWITCH_PORT_VID_REG,&reg);
reg &= ~0xfff;
reg |= 0x1;
mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(switchCpuPort),
MV_SWITCH_PORT_VID_REG,reg);
/* Setting Port default priority for all ports to zero */
for(prt=0; prt < switchMaxPortsNum; prt++)
{
mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt),
MV_SWITCH_PORT_VID_REG,&reg);
reg &= ~0xc000;
mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt),
MV_SWITCH_PORT_VID_REG,reg);
}
/* Setting VID and VID map for all ports except CPU port */
for(prt=0; prt < switchMaxPortsNum; prt++)
{
/* only for enabled ports */
if ((1 << prt)& switchEnabledPortsMask)
{
/* skip CPU port */
if (prt== switchCpuPort) continue;
/*
* set Ports VLAN Mapping.
* port prt <--> MV_SWITCH_CPU_PORT VLAN #prt+1.
*/
mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt),
MV_SWITCH_PORT_VID_REG,&reg);
reg &= ~0x0fff;
reg |= (prt+1);
mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt),
MV_SWITCH_PORT_VID_REG,reg);
/* Set Vlan map table for all ports to send only to MV_SWITCH_CPU_PORT */
mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt),
MV_SWITCH_PORT_VMAP_REG,&reg);
reg &= ~((1 << switchMaxPortsNum) - 1);
reg |= (1 << switchCpuPort);
mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt),
MV_SWITCH_PORT_VMAP_REG,reg);
}
}
/* Set Vlan map table for MV_SWITCH_CPU_PORT to see all ports*/
mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(switchCpuPort),
MV_SWITCH_PORT_VMAP_REG,&reg);
reg &= ~((1 << switchMaxPortsNum) - 1);
reg |= switchEnabledPortsMask & ~(1 << switchCpuPort);
mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(switchCpuPort),
MV_SWITCH_PORT_VMAP_REG,reg);
/*enable only appropriate ports to forwarding mode - and disable the others*/
for(prt=0; prt < switchMaxPortsNum; prt++)
{
if ((1 << prt)& switchEnabledPortsMask)
{
mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt),
MV_SWITCH_PORT_CONTROL_REG,&reg);
reg |= 0x3;
mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt),
MV_SWITCH_PORT_CONTROL_REG,reg);
}
else
{
/* Disable port */
mvEthPhyRegRead (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt),
MV_SWITCH_PORT_CONTROL_REG,&reg);
reg &= ~0x3;
mvEthPhyRegWrite (mvBoardPhyAddrGet(ethPortNum)+ MV_SWITCH_PORT_OFFSET(prt),
MV_SWITCH_PORT_CONTROL_REG,reg);
}
}
return;
}

75
board/mv_feroceon/USP/ethSwitch/mv_switch.h Normal file
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@ -0,0 +1,75 @@
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
This software file (the "File") is owned and distributed by Marvell
International Ltd. and/or its affiliates ("Marvell") under the following
alternative licensing terms. Once you have made an election to distribute the
File under one of the following license alternatives, please (i) delete this
introductory statement regarding license alternatives, (ii) delete the two
license alternatives that you have not elected to use and (iii) preserve the
Marvell copyright notice above.
********************************************************************************
Marvell Commercial License Option
If you received this File from Marvell and you have entered into a commercial
license agreement (a "Commercial License") with Marvell, the File is licensed
to you under the terms of the applicable Commercial License.
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
********************************************************************************
Marvell BSD License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File under the following licensing terms.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Marvell nor the names of its contributors may be
used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#ifndef __INCETHSWITCHH
#define __INCETHSWITCHH
#include "mvTypes.h"
MV_VOID mvEthE6063SwitchBasicInit(MV_U32 ethPortNum);
MV_VOID mvEthE6065_61SwitchBasicInit(MV_U32 ethPortNum);
MV_VOID mvEthE6131SwitchBasicInit(MV_U32 ethPortNum);
MV_VOID mvEthE6161SwitchBasicInit(void);
#endif /* #ifndef __INCETHSWITCHH */

109
board/mv_feroceon/USP/ethSwitch/mv_switchRegs.h Normal file
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@ -0,0 +1,109 @@
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
This software file (the "File") is owned and distributed by Marvell
International Ltd. and/or its affiliates ("Marvell") under the following
alternative licensing terms. Once you have made an election to distribute the
File under one of the following license alternatives, please (i) delete this
introductory statement regarding license alternatives, (ii) delete the two
license alternatives that you have not elected to use and (iii) preserve the
Marvell copyright notice above.
********************************************************************************
Marvell Commercial License Option
If you received this File from Marvell and you have entered into a commercial
license agreement (a "Commercial License") with Marvell, the File is licensed
to you under the terms of the applicable Commercial License.
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
********************************************************************************
Marvell BSD License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File under the following licensing terms.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Marvell nor the names of its contributors may be
used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#ifndef __INCethswitchregsh
#define __INCethswitchregsh
#define MV_SWITCH_PORT_CONTROL_REG 0x4
#define MV_SWITCH_PORT_VMAP_REG 0x6
#define MV_SWITCH_PORT_VID_REG 0x7
#define MV_SWITCH_PORT_OFFSET(port) (switchPortsOffset+port)
/* E6063 related */
#define MV_E6063_CPU_PORT 5
#define MV_E6063_PORTS_OFFSET 0x8
#define MV_E6063_MAX_PORTS_NUM 7
#define MV_E6063_ENABLED_PORTS ((1 << 0)|(1 << 1)|(1 << 2)| \
(1 << 3)|(1 << 4)|(1 << 5))
/* E6065 related */
#define MV_E6065_CPU_PORT 5
#define MV_E6065_PORTS_OFFSET 0x8
#define MV_E6065_MAX_PORTS_NUM 6
#define MV_E6065_ENABLED_PORTS ((1 << 0)|(1 << 1)|(1 << 2)|(1 << 3)|(1 << 4)|(1 << 5))
/* E6063 related */
#define MV_E6131_CPU_PORT 0x3
#define MV_E6131_PORTS_OFFSET 0x10
#define MV_E6131_MAX_PORTS_NUM 8
#define MV_E6131_ENABLED_PORTS ((1 << 0)|(1 << 1)|(1 << 2)| \
(1 << 3)|(1 << 5)|(1 << 7))
/* E6161 related */
#define MV_E6161_CPU_PORT 0x5
#define MV_E6161_PORTS_OFFSET 0x10
#define MV_E6161_SMI_PHY_COMMAND 0x18
#define MV_E6161_SMI_PHY_DATA 0x19
#define MV_E6161_GLOBAL_2_REG_DEV_ADDR 0x1C
#define MV_E6161_MAX_PORTS_NUM 6
#define MV_E6161_ENABLED_PORTS ((1 << 0)|(1 << 1)|(1 << 2)|(1 << 3)|(1 << 4)|(1 << 5))
#define E6161_PHY_TIMEOUT 10000
#define E6161_PHY_SMI_BUSY_BIT 15 /* Busy */
#define E6161_PHY_SMI_BUSY_MASK (1 << ETH_PHY_SMI_BUSY_BIT)
#endif /* __INCethswitchregsh */

250
board/mv_feroceon/USP/jump.S Normal file
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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
#define MV_ASMLANGUAGE
#include "mvSysHwConfig.h"
#include "mvBoardEnvSpec.h"
#include "mvOsAsm.h"
#include "pci/mvPciRegs.h"
#include "pex/mvPexRegs.h"
#include "mvCtrlEnvSpec.h"
#include "mvCtrlEnvAsm.h"
#include "sys/mvCpuIfRegs.h"
jumpStart:
.section ".reset_vector_sect",#alloc, #execinstr
#if defined(MV_88F6082) || defined(MV_88F6183) || defined(DB_88F5181_OLD) || defined(DB_FPGA) || \
defined(MV88F6281) || defined(MV88F6192) || defined(MV88F6180) || defined(MV_88F6183L) || \
defined(MV88F6190)
#if defined(__BE)
/* disable I-Cache */
.word 0x100f11ee /* mrc 15, 0, r0, cr1, cr0, {0} */
.word 0x010ac0e3 /* bic r0, r0, #4096 ; 0x1000 */
.word 0x0700c0e3 /* bic r0, r0, #7 ; 0x7 */
.word 0x020080e3 /* orr r0, r0, #2 ; 0x2 */
.word 0x100f01ee /* mcr 15, 0, r0, cr1, cr0, {0} */
/* disable L2 prefetch */
.word 0x110f3fee /* mrc p15, 1, r0, c15, c1 */
.word 0x010480e3 /* orr r0, r0, #(1<<24) */
.word 0x110f2fee /* mcr p15, 1, r0, c15, c1 */
/* convert CPU to big endian */
.word 0x100f11ee /* mrc p15, 0, r0, c1, c0 */
.word 0x800080e3 /* orr r0, r0, #0x80 */
.word 0x100f01ee /* mcr p15, 0, r0, c1, c0 */
nop;nop;nop;nop;
nop;nop;nop;nop;
#endif
#endif
/* Check if we booted from DRAM. If we did someone already */
/* initialize the DRAM controller */
adr r4, jumpStart /* r4 <- current position of code */
ldr r5, =~0xff
and r4, r4, r5
ldr r5, __start /* r5 <- linker results for _start */
ldr r2, _jumpStart /* r2 <- linker results reset vector */
sub r8, r2, r5 /* r8 <- (reset vector address - start address) */
sub r8, r4, r8 /* r8 <- absolute address to jump to */
/* r8 <- (current code address - */
ldr sp, =0
ldr lr, =0
ldr r5, =CFG_RESET_ADDRESS /* test if we run from flash or RAM */
cmp r4, r5 /* don't reloc during debug */
beq romBoot
mov r5, #1
ldr r4, =dramBoot
str r5, [r4] /* We started executing from DRAM */
romBoot:
#if defined(MV78200)
/* Setting the PEX header device ID for MV78200 */
MV_DV_REG_READ_ASM(r6, r1, PEX_CFG_DIRECT_ACCESS(0,PEX_DEVICE_AND_VENDOR_ID))
ldr r1, =MV_78200_DEV_ID
ldr r2, =0xffff
and r6, r6, r2
orr r6, r6, r1, LSL #PXDAVI_DEV_ID_OFFS
MV_DV_REG_WRITE_ASM(r6, r1, PEX_CFG_DIRECT_ACCESS(0,PEX_DEVICE_AND_VENDOR_ID))
#endif
#if defined(MV_88F1181)
/* set gpp out en */
ldr r2, = 0xf33
MV_DV_REG_WRITE_ASM(r1, r1, 0x10104)
/* turn on debug led to 2 */
ldr r2, = 0x8
MV_DV_REG_WRITE_ASM(r1, r1, 0x10100)
ldr pc, = 0xfff90000
#else
#if defined(DB_FPGA)
b device_cont
#endif /* DB_FPGA */
/* Read device ID */
MV_DV_CTRL_MODEL_GET_ASM(r6, r1);
ldr r1, =0x5281
cmp r6, r1
beq device_5281
/* TC90 acts as Orion 2 C0 */
ldr r1, =0x1281
cmp r6, r1
beq device_5281_C0
/* 6183 & 6183L */
ldr r1, =0x6183
cmp r6, r1
bne device_cont
#if defined(MV_88F6183L)
/* Setting the PEX header device ID for 6183L */
MV_DV_REG_READ_ASM(r6, r1, PEX_CFG_DIRECT_ACCESS(0,PEX_DEVICE_AND_VENDOR_ID))
ldr r1, =MV_6183L_DEV_ID
ldr r2, =0xffff
and r6, r6, r2
orr r6, r6, r1, LSL #PXDAVI_DEV_ID_OFFS
MV_DV_REG_WRITE_ASM(r6, r1, PEX_CFG_DIRECT_ACCESS(0,PEX_DEVICE_AND_VENDOR_ID))
#endif /* MV_88F6183L */
/* Read device revision */
MV_DV_CTRL_REV_GET_ASM(r6, r1);
cmp r6, #0x3 /* 6183 == B0 */
bne device_cont
#if !defined(MV78XX0)
MV_DV_REG_READ_ASM (r6, r1, CPU_FTDLL_CONFIG_REG)
ldr r1, =0x10000
orr r6, r6, r1
MV_DV_REG_WRITE_ASM (r6, r1, CPU_FTDLL_CONFIG_REG)
#endif
b device_cont
device_5281:
/* Read device revision */
MV_DV_CTRL_REV_GET_ASM(r6, r1);
cmp r6, #0x0 /* Orion 2 == A0 */
beq device_5281_A0
cmp r6, #0x1 /* Orion 2 == B0 */
beq device_5281_B0
cmp r6, #0x2 /* Orion 2 == C0 */
beq device_5281_C0
cmp r6, #0x4 /* Orion 2 == d0 */
beq device_5281_D0
cmp r6, #0x5 /* Orion 2 == d1 */
beq device_5281_D1
cmp r6, #0x6 /* Orion 2 == d2 */
beq device_5281_D2
b device_cont
device_5281_D0:
device_5281_D1:
device_5281_D2:
#if !defined(MV78XX0)
MV_DV_REG_READ_ASM (r6, r1, CPU_FTDLL_CONFIG_REG)
ldr r1, =0xFFFF8080
and r6, r6, r1
ldr r1, =0x1902
orr r6, r6, r1
MV_DV_REG_WRITE_ASM (r6, r1, CPU_FTDLL_CONFIG_REG)
#endif
b device_cont
device_5281_C0:
#if !defined(MV78XX0)
MV_DV_REG_READ_ASM (r6, r1, CPU_FTDLL_CONFIG_REG)
ldr r1, =0xFFFF8080
and r6, r6, r1
ldr r1, =0x8308
orr r6, r6, r1
MV_DV_REG_WRITE_ASM (r6, r1, CPU_FTDLL_CONFIG_REG)
#endif
b device_cont
device_5281_B0:
#if !defined(MV78XX0)
MV_DV_REG_READ_ASM (r6, r1, CPU_FTDLL_CONFIG_REG)
ldr r1, =0xFFFF8080
and r6, r6, r1
ldr r1, =0x821b
orr r6, r6, r1
MV_DV_REG_WRITE_ASM (r6, r1, CPU_FTDLL_CONFIG_REG)
#endif
b device_cont
device_5281_A0:
device_cont:
#if defined(MV88F6190)
/* Setting the PEX header device ID for 6190 */
MV_DV_REG_READ_ASM(r6, r1, PEX_CFG_DIRECT_ACCESS(0,PEX_DEVICE_AND_VENDOR_ID))
ldr r1, =MV_6190_DEV_ID
ldr r2, =0xffff
and r6, r6, r2
orr r6, r6, r1, LSL #PXDAVI_DEV_ID_OFFS
MV_DV_REG_WRITE_ASM(r6, r1, PEX_CFG_DIRECT_ACCESS(0,PEX_DEVICE_AND_VENDOR_ID))
#endif /* MV_88F6190 */
mov lr, r8
mov pc, lr
#endif
__start:
.word _start
.globl dramBoot
dramBoot:
.word 0
_jumpStart:
.word .reset_vector_sect
.section ".dummy",#alloc, #execinstr
.long 0xffffffff
.long 0xffffffff
.long 0xffffffff
.long 0xffffffff

550
board/mv_feroceon/USP/mv_egiga.c Normal file
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@ -0,0 +1,550 @@
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
#include <common.h>
#include <command.h>
#include <net.h>
#include <malloc.h>
#if defined (MV_INCLUDE_GIG_ETH)
#include "sys/mvSysGbe.h"
#include "mvOs.h"
#include "mvSysHwConfig.h"
#include "eth/mvEth.h"
#include "eth/gbe/mvEthGbe.h"
#include "eth-phy/mvEthPhy.h"
#include "ethswitch/mvSwitch.h"
#include "mvBoardEnvLib.h"
/* #define MV_DEBUG */
#ifdef MV_DEBUG
#define DB(x) x
#else
#define DB(x)
#endif
/******************************************************
* driver internal definitions -- *
******************************************************/
/* use only tx-queue0 and rx-queue0 */
#define EGIGA_DEF_TXQ 0
#define EGIGA_DEF_RXQ 0
/* rx buffer size */
#define ETH_HLEN 14
#define WRAP (2 + ETH_HLEN + 4 + 32) /* 2(HW hdr) 14(MAC hdr) 4(CRC) 32(extra for cache prefetch)*/
#define MTU 1500
#define RX_BUFFER_SIZE (MTU + WRAP)
/* rings length */
#define EGIGA_TXQ_LEN 20
#define EGIGA_RXQ_LEN 20
typedef struct _egigaPriv
{
int port;
MV_VOID *halPriv;
MV_U32 rxqCount;
MV_U32 txqCount;
MV_BOOL devInit;
} egigaPriv;
/******************************************************
* functions prototype -- *
******************************************************/
static int mvEgigaLoad( int port, char *name, char *enet_addr );
static int mvEgigaInit( struct eth_device *dev, bd_t *p );
static int mvEgigaHalt( struct eth_device *dev );
static int mvEgigaTx( struct eth_device *dev, volatile MV_VOID *packet, int len );
static int mvEgigaRx( struct eth_device *dev );
static MV_PKT_INFO* mvEgigaRxFill(MV_VOID);
/***********************************************************
* mv_eth_initialize -- *
* main driver initialization. loading the interfaces. *
***********************************************************/
int mv_eth_initialize( bd_t *bis )
{
int port;
MV_8 *enet_addr;
MV_8 name[NAMESIZE+1];
MV_8 enetvar[9];
MV_8 ethPortNum = mvCtrlEthMaxPortGet();
MV_U32 ctrlId = mvCtrlModelGet();
mvEthInit();
/* load interface(s) */
for( port = BOARD_ETH_START_PORT_NUM; port < ethPortNum; port++ )
{
if (MV_FALSE == mvCtrlPwrClckGet(ETH_GIG_UNIT_ID, port)) continue;
/* interface name */
sprintf( name, "egiga%d", port );
/* interface MAC addr extract */
sprintf( enetvar, port ? "eth%daddr" : "ethaddr", port );
enet_addr = getenv( enetvar );
if ( (MV_78100_DEV_ID == ctrlId) || (MV_78200_DEV_ID == ctrlId) ||
(MV_6281_DEV_ID == ctrlId) || (MV_6192_DEV_ID == ctrlId) ||
(MV_6190_DEV_ID == ctrlId) || (MV_6180_DEV_ID == ctrlId))
mvEthPortPowerUp(port);
MV_REG_WRITE(ETH_TX_QUEUE_COMMAND1_REG(port), 0x8);
mvEgigaLoad( port, name, enet_addr );
}
#ifdef RD_MV78XX0_AMC
/* Light on RDY led */
mvEthPhyRegWrite(0, 0xb, 0x19, 0xc00);
#endif
return 0;
}
/***********************************************************
* mvEgigaLoad -- *
* load a network interface into uboot network core. *
* initialize sw structures e.g. private, rings, etc. *
***********************************************************/
static int mvEgigaLoad( int port, char *name, char *enet_addr )
{
struct eth_device *dev = NULL;
egigaPriv *priv = NULL;
ETH_PORT_CTRL dummy_port_handle;
DB( printf( "%s: %s load - ", __FUNCTION__, name ) );
dev = malloc( sizeof(struct eth_device) );
priv = malloc( sizeof(egigaPriv) );
if( !dev ) {
DB( printf( "%s: %s falied to alloc eth_device (error)\n", __FUNCTION__, name ) );
goto error;
}
if( !priv ) {
DB( printf( "%s: %s falied to alloc egiga_priv (error)\n", __FUNCTION__, name ) );
goto error;
}
memset( priv, 0, sizeof(egigaPriv) );
/* init device methods */
memcpy( dev->name, name, NAMESIZE );
mvMacStrToHex(enet_addr, (MV_8 *)(dev->enetaddr));
/* set MAC addres even if port was not used yet. */
dummy_port_handle.portNo = port;
mvEthMacAddrSet( &dummy_port_handle, dev->enetaddr, EGIGA_DEF_RXQ);
dev->init = (void *)mvEgigaInit;
dev->halt = (void *)mvEgigaHalt;
dev->send = (void *)mvEgigaTx;
dev->recv = (void *)mvEgigaRx;
dev->priv = priv;
dev->iobase = 0;
priv->port = port;
/* register the interface */
eth_register(dev);
DB( printf( "%s: %s load ok\n", __FUNCTION__, name ) );
return 0;
error:
printf( "%s: %s load failed\n", __FUNCTION__, name );
if( priv ) free( dev->priv );
if( dev ) free( dev );
return -1;
}
static MV_PKT_INFO* mvEgigaRxFill(MV_VOID)
{
MV_BUF_INFO *pBufInfo;
MV_PKT_INFO *pPktInfo;
MV_U8 *buf = (MV_U8 *)memalign( 32, RX_BUFFER_SIZE ); /* align on 32B */
if( !buf ) {
DB(printf("failed to alloc buffer\n"));
return NULL;
}
if( ((MV_U32)buf) & 0xf )
printf( "un-align rx buffer %x\n", (MV_U32)buf );
pPktInfo = malloc(sizeof(MV_PKT_INFO));
if (pPktInfo == NULL) {
printf("Error: cannot allocate memory for pktInfo\n");
free(buf);
return NULL;
}
pBufInfo = malloc(sizeof(MV_BUF_INFO));
if (pBufInfo == NULL) {
printf("Error: cannot allocate memory for bufInfo\n");
free(buf);
free(pPktInfo);
return NULL;
}
pBufInfo->bufPhysAddr = mvOsIoVirtToPhy(NULL, buf);
pBufInfo->bufVirtPtr = buf;
pBufInfo->bufSize = RX_BUFFER_SIZE;
pBufInfo->dataSize = 0;
pPktInfo->osInfo = (MV_ULONG)buf;
pPktInfo->pFrags = pBufInfo;
pPktInfo->pktSize = RX_BUFFER_SIZE; /* how much to invalidate */
pPktInfo->numFrags = 1;
pPktInfo->status = 0;
pPktInfo->srcIdx = -1;
return pPktInfo;
}
unsigned int egiga_init=0;
static int mvEgigaInit( struct eth_device *dev, bd_t *p )
{
egigaPriv *priv = dev->priv;
MV_ETH_PORT_INIT halInitStruct;
MV_PKT_INFO *pktInfo;
MV_STATUS status;
int i;
DB( printf( "%s: %s init - ", __FUNCTION__, dev->name ) );
/* egiga not ready */
DB( printf ("mvBoardPhyAddrGet()=0x%x , priv->port =0x%x\n",mvBoardPhyAddrGet(priv->port),priv->port));
/* If speed is not auto then link is force */
if (BOARD_MAC_SPEED_AUTO == mvBoardMacSpeedGet(priv->port))
{
/* Check Link status on phy */
if( mvEthPhyCheckLink( mvBoardPhyAddrGet(priv->port) ) == MV_FALSE ) {
printf( "%s no link\n", dev->name );
return 0;
}
else DB( printf( "link up\n" ) );
}
egiga_init = 1;
/* init the hal -- create internal port control structure and descriptor rings, */
/* open address decode windows, disable rx and tx operations. mask interrupts. */
halInitStruct.maxRxPktSize = RX_BUFFER_SIZE;
halInitStruct.rxDefQ = EGIGA_DEF_RXQ;
halInitStruct.txDescrNum[0] = EGIGA_TXQ_LEN;
halInitStruct.rxDescrNum[0] = EGIGA_RXQ_LEN;
halInitStruct.osHandle = NULL;
priv->halPriv = mvEthPortInit( priv->port, &halInitStruct );
if( !priv->halPriv ) {
DB( printf( "falied to init eth port (error)\n" ) );
goto error;
}
/* set new addr in hw */
if( mvEthMacAddrSet( priv->halPriv, dev->enetaddr, EGIGA_DEF_RXQ) != MV_OK ) {
printf("%s: ethSetMacAddr failed\n", dev->name );
goto error;
}
priv->devInit = MV_TRUE;
/* fill rx ring with buffers */
for( i=0; i<EGIGA_RXQ_LEN; i++ ) {
pktInfo = mvEgigaRxFill();
if (pktInfo == NULL)
goto error;
/* give the buffer to hal */
status = mvEthPortRxDone( priv->halPriv, EGIGA_DEF_RXQ, pktInfo );
if( status == MV_OK ) {
priv->rxqCount++;
}
else if( status == MV_FULL ) {
/* the ring is full */
priv->rxqCount++;
DB( printf( "ring full\n" ) );
break;
}
else {
printf( "error\n" );
goto error;
}
}
#ifdef MV_DEBUG
ethPortQueues(priv->port, EGIGA_DEF_RXQ, EGIGA_DEF_TXQ, 1);
printf("%s : after calling ethPortQueues\n",__FUNCTION__);
#endif
/* start the hal - rx/tx activity */
/* Check if link is up for 2 Sec */
for (i = 1; i < 100 ; i ++)
{
status = mvEthPortEnable( priv->halPriv );
if (status == MV_OK)
break;
mvOsDelay(20);
}
if( status != MV_OK ) {
printf( "%s: %s mvEthPortEnable failed (error)\n", __FUNCTION__, dev->name );
goto error;
}
#ifdef MV_DEBUG
ethRegs(priv->port);
ethPortRegs(priv->port);
ethPortStatus(priv->port);
ethPortQueues(priv->port, EGIGA_DEF_RXQ, -1/*EGIGA_DEF_TXQ*/, 0);
#endif
DB( printf( "%s: %s complete ok\n", __FUNCTION__, dev->name ) );
return 1;
error:
if( priv->devInit )
mvEgigaHalt( dev );
printf( "%s: %s failed\n", __FUNCTION__, dev->name );
return 0;
}
static int mvEgigaHalt( struct eth_device *dev )
{
egigaPriv *priv = dev->priv;
MV_PKT_INFO *pktInfo;
DB( printf( "%s: %s halt - ", __FUNCTION__, dev->name ) );
if( priv->devInit == MV_TRUE ) {
/* stop the port activity, mask all interrupts */
if( mvEthPortDisable( priv->halPriv ) != MV_OK )
printf( "mvEthPortDisable failed (error)\n" );
/* free the buffs in the rx ring */
while( (pktInfo = mvEthPortForceRx( priv->halPriv, EGIGA_DEF_RXQ )) != NULL ) {
priv->rxqCount--;
if( pktInfo->osInfo )
free( (void *)pktInfo->osInfo );
else
printf( "mvEthPortForceRx failed (error)\n" );
if( pktInfo->pFrags )
free( (void *)pktInfo->pFrags );
else
printf( "mvEthPortForceRx failed (error)\n" );
free( (void *)pktInfo );
}
/* Clear Cause registers (must come before mvEthPortFinish) */
MV_REG_WRITE(ETH_INTR_CAUSE_REG(((ETH_PORT_CTRL*)(priv->halPriv))->portNo),0);
MV_REG_WRITE(ETH_INTR_CAUSE_EXT_REG(((ETH_PORT_CTRL*)(priv->halPriv))->portNo),0);
mvEthPortFinish( priv->halPriv );
priv->devInit = MV_FALSE;
}
egiga_init = 0;
DB( printf( "%s: %s complete\n", __FUNCTION__, dev->name ) );
return 0;
}
static int mvEgigaTx( struct eth_device *dev, volatile void *buf, int len )
{
egigaPriv *priv = dev->priv;
MV_BUF_INFO bufInfo;
MV_PKT_INFO pktInfo;
MV_PKT_INFO *pPktInfo;
MV_STATUS status;
DB( printf( "mvEgigaTx start\n" ) );
/* if no link exist */
if(!egiga_init) return 0;
pktInfo.osInfo = (MV_ULONG)0x44CAFE44;
pktInfo.pktSize = len;
pktInfo.pFrags = &bufInfo;
pktInfo.status = 0;
pktInfo.numFrags = 1;
bufInfo.bufVirtPtr = (MV_U8*)buf;
bufInfo.bufPhysAddr = mvOsIoVirtToPhy(NULL, buf);
bufInfo.dataSize = len;
/* send the packet */
status = mvEthPortTx( priv->halPriv, EGIGA_DEF_TXQ, &pktInfo );
if( status != MV_OK ) {
if( status == MV_NO_RESOURCE )
DB( printf( "ring is full (error)\n" ) );
else if( status == MV_ERROR )
printf( "error\n" );
else
printf( "unrecognize status (error) ethPortSend\n" );
goto error;
}
else DB( printf( "ok\n" ) );
priv->txqCount++;
/* release the transmitted packet(s) */
while( 1 ) {
DB( printf( "%s: %s tx-done - ", __FUNCTION__, dev->name ) );
/* get a packet */
pPktInfo = mvEthPortTxDone( priv->halPriv, EGIGA_DEF_TXQ);
if( pPktInfo != NULL ) {
priv->txqCount--;
/* validate skb */
if( (pPktInfo != &pktInfo) || (pPktInfo->osInfo != 0x44CAFE44 ) ) {
printf( "error\n" );
goto error;
}
/* handle tx error */
if( pPktInfo->status & (ETH_ERROR_SUMMARY_BIT) ) {
printf( "bad status (error)\n" );
goto error;
}
DB( printf( "ok\n" ) );
break;
}
else
DB(printf( "NULL pPktInfo\n" ));
}
DB( printf( "%s: %s complete ok\n", __FUNCTION__, dev->name ) );
return 0;
error:
printf( "%s: %s failed\n", __FUNCTION__, dev->name );
return 1;
}
static int mvEgigaRx( struct eth_device *dev )
{
egigaPriv* priv = dev->priv;
MV_PKT_INFO *pktInfo;
MV_STATUS status;
/* if no link exist */
if(!egiga_init) return 0;
while( 1 ) {
/* get rx packet from hal */
pktInfo = mvEthPortRx( priv->halPriv, EGIGA_DEF_RXQ);
if( pktInfo != NULL ) {
/*DB( printf( "good rx\n" ) );*/
priv->rxqCount--;
/* check rx error status */
if( pktInfo->status & (ETH_ERROR_SUMMARY_MASK) ) {
MV_U32 err = pktInfo->status & ETH_RX_ERROR_CODE_MASK;
/*DB( printf( "bad rx status %08x, ", (MV_U32)pktInfo->cmdSts ) );*/
if( err == ETH_RX_RESOURCE_ERROR )
DB( printf( "(resource error)" ) );
else if( err == ETH_RX_MAX_FRAME_LEN_ERROR )
DB( printf( "(max frame length error)" ) );
else if( err == ETH_RX_OVERRUN_ERROR )
DB( printf( "(overrun error)" ) );
else if( err == ETH_RX_CRC_ERROR )
DB( printf( "(crc error)" ) );
else {
DB( printf( "(unknown error)" ) );
goto error;
}
DB( printf( "\n" ) );
}
else {
DB( printf( "%s: %s calling NetRecieve ", __FUNCTION__, dev->name) );
DB( printf( "%s: calling NetRecieve pkInfo = 0x%x\n", __FUNCTION__, pktInfo) );
DB( printf( "%s: calling NetRecieve osInfo = 0x%x\n", __FUNCTION__, pktInfo->osInfo) );
DB( printf( "%s: calling NetRecieve pktSize = 0x%x\n", __FUNCTION__, pktInfo->pFrags->dataSize) );
/* good rx - push the packet up (skip on two first empty bytes) */
NetReceive( ((MV_U8 *)pktInfo->osInfo) + 2, (int)pktInfo->pFrags->dataSize);
}
DB( printf( "%s: %s refill rx buffer - ", __FUNCTION__, dev->name) );
/* give the buffer back to hal (re-init the buffer address) */
pktInfo->pktSize = RX_BUFFER_SIZE; /* how much to invalidate */
status = mvEthPortRxDone( priv->halPriv, EGIGA_DEF_RXQ, pktInfo );
if( status == MV_OK ) {
priv->rxqCount++;
}
else if( status == MV_FULL ) {
/* this buffer made the ring full */
priv->rxqCount++;
DB( printf( "ring full\n" ) );
break;
}
else {
printf( "error\n" );
goto error;
}
} else {
/* no more rx packets ready */
/* DB( printf( "no more work\n" ) ); */
break;
}
}
/*DB( printf( "%s: %s complete ok\n", __FUNCTION__, dev->name ) );*/
return 0;
error:
DB( printf( "%s: %s failed\n", __FUNCTION__, dev->name ) );
return 1;
}
#endif /* #if defined (MV_INCLUDE_GIG_ETH) */

189
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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
#include <common.h>
#include <command.h>
#include <config.h>
#include <image.h>
#include <asm/byteorder.h>
#include <ide.h>
#include <ata.h>
#include "xor/mvXor.h"
#if ((CONFIG_COMMANDS & CFG_CMD_IDE ) && (CONFIG_COMMANDS & CFG_CMD_EXT2))
#define DOS_PART_MAGIC_OFFSET 0x1fe
#define PARTITION_CRC_OFF 0x0
#ifdef CONFIG_ISO_PARTITION
/* Make the buffers bigger if ISO partition support is enabled -- CD-ROMS
have 2048 byte blocks */
#define DEFAULT_SECTOR_SIZE 2048
#else
#define DEFAULT_SECTOR_SIZE 512
#endif
#define MAX_BOOT_PART 2
extern block_dev_desc_t * ide_get_dev(int dev);
static char tmp_string[100];
static char tmp_string1[100];
int do_bootext2 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int dev,part,active_part= -1 ;
ulong addr;
volatile disk_partition_t info[2];
volatile char *env,*env2;
block_dev_desc_t *dev_desc;
ulong boot_part[MAX_BOOT_PART];
char *ep;
if (argc != 5)
{
printf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
dev = simple_strtoul(argv[1], &ep, 16);
if (*ep) {
if (*ep != ':')
{
printf ("Usage:\n%s\n", cmdtp->usage);
return(1);
}
for (part=0 ; part < MAX_BOOT_PART-1 ; part++)
{
ep++;
boot_part[part] = (ulong)simple_strtoul(ep, &ep, 16);
if (*ep != ',') {
printf ("Usage:\n%s\n", cmdtp->usage);
return(1);
}
}
boot_part[part] = (ulong)simple_strtoul(++ep, NULL, 16);
}
else
{
puts ("\n** Invalid boot device, use `dev:boot_part1,boot_part2' **\n");
return(1);
}
addr = simple_strtoul(argv[2], NULL, 16);
dev_desc = (dev >= CFG_IDE_MAXDEVICE) ? NULL : ide_get_dev(dev);
if (dev_desc == NULL)
{
printf("Non valid dev number %x\n",dev);
return 1;
}
/* Initialize IDE */
sprintf(tmp_string,"ide reset");
run_command(tmp_string,0);
/* Search for Active partition in partition #1 and partition #2*/
for (part = 0; part < MAX_BOOT_PART ;part++ )
{
if (get_partition_info (dev_desc,
boot_part[part],
(disk_partition_t*)&info[part]))
{
continue;
}
if (info[part].boot_ind )
{
active_part = part;
break;
}
}
/* If no active partition then return */
if (active_part == -1)
{
printf("No active partition on %d and %d\n",
boot_part[0],boot_part[1]);
return 1;
}
/* Load /boot/uImage from active_part to addr */
sprintf(tmp_string,"ext2load ide %x:%x %x %s", dev, boot_part[active_part], addr,argv[3]);
printf("%s\n",tmp_string);
run_command(tmp_string,0);
sprintf(tmp_string,"root=%s%d ro",argv[4],boot_part[active_part]);
setenv("bootargs_root",tmp_string);
env = getenv("bootargs");
env2 = getenv("bootargs_root");
/* Save bootargs for secondary boot option if boot from active partition will fail */
sprintf(tmp_string1,"%s",env);
sprintf(tmp_string,"%s %s",env,env2);
setenv("bootargs",tmp_string);
sprintf(tmp_string,"bootm %x", addr);
printf("%s\n",tmp_string);
run_command(tmp_string,0);
/* If we get here then first boot fail */
active_part = (active_part + 1)%MAX_BOOT_PART;
sprintf(tmp_string,"ext2load ide %x:%x %x %s", dev, boot_part[active_part], addr,argv[3]);
printf("%s\n",tmp_string);
run_command(tmp_string,0);
sprintf(tmp_string,"root=%s%d ro",argv[4],boot_part[active_part]);
setenv("bootargs_root",tmp_string);
env2 = getenv("bootargs_root");
sprintf(tmp_string,"%s %s %s",tmp_string1,env2, "boot_failure");
setenv("bootargs",tmp_string);
sprintf(tmp_string,"bootm %x", addr);
printf("Starting secondary boot...\n");
printf("%s\n",tmp_string);
run_command(tmp_string,0);
printf("Secondary boot fail...\n");
return 1;
}
U_BOOT_CMD(
bootext2, 5, 0, do_bootext2,
"bootext2 dev:boot_part1,boot_part2 addr boot_image linux_dev_name \n",
"dev:boot_part1,boot_part2 addr boot_image linux_dev_name\n"
"- boot boot_image from active ext2 partition\n"
);
#endif /* #if (CONFIG_COMMANDS & CFG_CMD_EXT2 & CFG_CMD_IDE) */

1684
board/mv_feroceon/USP/mv_flash.c Normal file
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2962
board/mv_feroceon/USP/mv_fs.c Normal file
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184
board/mv_feroceon/USP/mv_fs.h Normal file
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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
/********************************************************************************
* FileSys.h - Flash file system header
*
* DESCRIPTION:
* File system API for the flash unit integrated within the devices.
* DEPENDENCIES:
* None.
*
*******************************************************************************/
#ifndef __INCmvFSh
#define __INCmvFSh
#ifdef __cplusplus
extern "C" {
#endif
/* defines */
/* 10 Blocks are dedicated for the FAT, the first one includes the FAT
signature which is 32 Bytes, each file entry is 32 Bytes long , each block
has a header 8 bytes long (in the FAT block the other 24 are not used) =>
FS_MAX_NUM_OF_ENTRIES = 150 */
#define FS_FILE_HANDLER unsigned int
#define FS_MAX_NUM_OF_FAT_BLOCKS 10
#define FS_MAX_NUM_OF_ENTRIES 150
#define FS_FAT_SIGNATURE_SIZE 15
#define FS_SIGNATURE_OFFSET 5
#define FS_FAT_HEADER_SIZE 32
#define FS_FAT_FILE_ENTRY_SIZE 32
#define FS_FILE_SYSTEM_INITIALIZED 0x24136764
#define FS_FILE_NAME_OFFSET 5
#define FS_FILE_NAME_LENGTH 16
#define FS_FILE_EXT_OFFSET (FS_FILE_NAME_OFFSET+ \
FS_FILE_NAME_LENGTH)
#define FS_FILE_EXT_LENGTH 3
#define FS_BLOCK_SIZE 512
#define FS_BLOCK_HEADER_SIZE 8
#define FS_BLOCK_OFFSET_MASK 0xfffffe00
#define FS_BLOCK_OFFSET (0xffffffff - FS_BLOCK_OFFSET_MASK)
#define FS_ERSAING_COUNTER_FLAG_OFFSET (FS_SIGNATURE_OFFSET+ \
FS_FAT_SIGNATURE_SIZE)
#define FS_BLOCK_STATUS_FLAG_OFFSET 4
#define FS_BLOCK_OFFSET_FLAG_OFFSET 5
#define FS_BLOCK_OFFSET_OFFSET 6
#define FS_NO_FREE_BLOCKS 0xffffffff
#define FS_FREE_BLOCK 0xff
#define FS_BLOCK_IN_UPDATE 0x7f
#define FS_FAT_BLOCK 0x3f
#define FS_BLOCK_IN_USE 0x1f
#define FS_BLOCK_USED_FOR_ERASING_COUNTER 0x01
#define FS_FREE_DIRTY_BLOCK 0x00
#define FS_FULL_BLOCK 0x0F
#define FS_ENTRY_STATUS_FLAG_OFFSET 4
#define FS_NO_FREE_ENTRIES 0xffffffff
#define FS_FREE_ENTRY 0xff
#define FS_ENTRY_IN_UPDATE 0x7f
#define FS_ENTRY_IN_USE 0x1f
#define FS_FREE_DIRTY_ENTRY 0x00
#define FS_FILE_NOT_FOUND 0xffffffff
#define FS_FILE_IS_NOT_CLOSED 0x1
#define FS_FILE_DELETED 0x2
#define FS_FILE_EXIST 0x3
#define FS_ENABLE_ERASING_COUNTER 0X0000ffff
#define FS_NO_ERASING_COUNTER 0Xffffffff
#define FS_NO_VALID_FAT_STRING 0xffffffff
#define FS_OFFSET_OUT_OF_RANGE 0xfffffff0
#define FS_FLASH_MEMORY_NOT_PRESENT 0xffffffff
#define FS_SYSTEM_ALREADY_INITIALIZED 0xfffffffc
#define FS_VALID_FILE_SYS_IN_LOWER_OFFSET 0xfffffff0
#define FS_FILE_OPEN_ERROR 0xffffffff
#define FS_FILE_CLOSED 0x1
#define FS_FILE_CLOSE_ERROR 0xffffffff
#define FS_FILE_READ_ERROR 0xffffffff
/* Cache size = 8 Kb */
#define FS_NUMBER_OF_BLOCKS_FOR_CACHE 16
/* Operation mode defined in the call to mvFSInit */
#define FS_ENABLE_CACHE 1
#define FS_NO_CACHE 0
/* Defines for the seek operation */
/* Beginning of file */
#define FS_SEEK_SET 0
/* End of file */
#define FS_SEEK_END -1
/* Current position of file pointer */
#define FS_SEEK_CUR 1
/* File entry on the system's dynamic mvMemory */
typedef struct _fileTableEntry
{
char mode[4];
unsigned int pointerToFAT;
unsigned int filePointer;
unsigned int blockPointer; /* For read optimization */
unsigned int EOFpointer;
unsigned int statusFlag;
} FS_FILE_TABLE_ENTRY;
/* File entry on the FLASH mvMemory (FAT) - 32 Bytes long */
typedef struct _fileEntry
{
unsigned int nextBlockAddr;
unsigned int reserved1;
unsigned int reserved2;
char statusFlag;
char fileName[16];
char fileExt[3];
} FS_FILE_ENTRY;
/* 8 Bytes long */
typedef struct _blockHeader
{
unsigned int nextBlockAddr;
char statusFlag;
char offsetFlag;
unsigned short offset;
} FS_BLOCK_HEADER;
/* Cache properties defines */
typedef struct _fileCacheBlock
{
unsigned int fileHandler;
unsigned int currentBlockAddress;
unsigned int usageCounter;
unsigned int timeStamp;
char data[512];
} FS_FILE_CACHE_BLOCK;
/* Functions */
unsigned int mvFSFormat(unsigned int offset,unsigned int mode);
unsigned int mvFSInit(unsigned int mode);
FS_FILE_HANDLER mvFSOpen(char * fileName,char *mode);
unsigned int mvFSClose(FS_FILE_HANDLER fileHandler);
unsigned int mvFSDelete(char * fileName);
unsigned int mvFSFileFind(char * fileName);
unsigned int mvFSFileSize(FS_FILE_HANDLER fileHandler);
unsigned int mvFSWrite(FS_FILE_HANDLER fileHandler,
unsigned int numberOfBytes,char * block);
unsigned int mvFSRead(FS_FILE_HANDLER fileHandler,
unsigned int numberOfBytes,char * block);
unsigned int mvFSSeek(FS_FILE_HANDLER fileHandler,int offset,int origin);
unsigned int mvFSRewind(FS_FILE_HANDLER fileHandler);
unsigned int mvFSReadErasingCounter(unsigned int sectorNumber);
unsigned int mvFSNumOfHandles(char * fileName);
unsigned int mvFSSearchForSignature(void);
unsigned int mvFSGetEOFoffset(char * fileName);
unsigned int mvFSGetFreeEntry(void);
unsigned int mvFSGetFreeBlock(void);
unsigned int mvFSGetFreeBlockForWrite(void);
unsigned int mvFSWriteFileNameToFATentry(unsigned int entryOffset,
char * fileName);
unsigned int mvFSReadFileNameFromFATentry(unsigned int entryOffset,
char * fileName);
unsigned int mvFSGetFreeSize(void);
unsigned int mvFSFlushCache(void);
#ifdef __cplusplus
}
#endif
#endif /* __INCmvFSh */

171
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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
#include <common.h>
#include <mpc8xx.h>
#include <malloc.h>
#include <config.h>
#include "twsi/mvTwsi.h"
#if CONFIG_COMMANDS & CFG_CMD_I2C
#define MAX_I2C_RETRYS 10
#define I2C_DELAY 300 /* Should be at least the # of MHz of Tclk */
#undef DEBUG_I2C
//#define DEBUG_I2C
#ifdef DEBUG_I2C
#define DP(x) x
#else
#define DP(x)
#endif
/* Assuming that there is only one master on the bus (us) */
void
i2c_init(MV_U8 chanNum, int speed, int slaveaddr)
{
MV_TWSI_ADDR slave;
slave.type = ADDR7_BIT;
slave.address = slaveaddr;
mvTwsiInit(chanNum, speed, CFG_TCLK, &slave, 0);
}
/*
* Read interface:
* dev_addr:I2C chip address, range 0..127
* offset: Memory (register) address within the chip
* alen: Number of bytes to use for addr (typically 1, 2 for larger
* memories, 0 for register type devices with only one
* register)
* data: Where to read the data
* len: How many bytes to read/write
*
* Returns: 0 on success, not 0 on failure
*/
int
i2c_read(MV_U8 chanNum, MV_U8 dev_addr, unsigned int offset, int alen, MV_U8* data, int len)
{
MV_TWSI_SLAVE twsiSlave;
unsigned int i2cFreq = CFG_I2C_SPEED;
DP(puts("i2c_read\n"));
twsiSlave.slaveAddr.type = ADDR7_BIT;
twsiSlave.slaveAddr.address = dev_addr;
if(alen != 0){
twsiSlave.validOffset = MV_TRUE;
twsiSlave.offset = offset;
if(alen == 2)
{
twsiSlave.moreThen256 = MV_TRUE;
}
else
{
twsiSlave.moreThen256 = MV_FALSE;
}
}
i2c_init(chanNum, i2cFreq,0); /* set the i2c frequency */
return mvTwsiRead (chanNum, &twsiSlave, data, len);
}
/*
* Write interface:
* dev_addr:I2C chip address, range 0..127
* offset: Memory (register) address within the chip
* alen: Number of bytes to use for addr (typically 1, 2 for larger
* memories, 0 for register type devices with only one
* register)
* data: Where to write the data
* len: How many bytes to read/write
*
* Returns: 0 on success, not 0 on failure
*/
uchar
i2c_write(MV_U8 chanNum, uchar dev_addr, unsigned int offset, int alen, uchar* data, int len)
{
MV_TWSI_SLAVE twsiSlave;
unsigned int i2cFreq = CFG_I2C_SPEED;
DP(puts("i2c_write\n"));
twsiSlave.slaveAddr.type = ADDR7_BIT;
twsiSlave.slaveAddr.address = dev_addr;
if(alen != 0){
twsiSlave.validOffset = MV_TRUE;
twsiSlave.offset = offset;
if(alen == 2)
{
twsiSlave.moreThen256 = MV_TRUE;
}
else
{
twsiSlave.moreThen256 = MV_FALSE;
}
}
i2c_init(chanNum, i2cFreq,0); /* set the i2c frequency */
return mvTwsiWrite (chanNum, &twsiSlave, data, len);
}
/* function to determine if an I2C device is present */
/* chip = device address of chip to check for */
/* */
/* returns 0 = sucessful, the device exists */
/* anything other than zero is failure, no device */
int i2c_probe (MV_U8 chanNum, uchar chip)
{
/* We are just looking for an <ACK> back. */
/* To see if the device/chip is there */
MV_TWSI_ADDR eepromAddress;
unsigned int status = 0;
unsigned int i2cFreq = CFG_I2C_SPEED;
DP(puts("i2c_probe\n"));
i2c_init(chanNum, i2cFreq,0); /* set the i2c frequency */
status = mvTwsiStartBitSet(chanNum);
if (status) {
DP(printf("Transaction start failed: 0x%02x\n", status));
mvTwsiStopBitSet(chanNum);
return (int)status;
}
eepromAddress.type = ADDR7_BIT;
eepromAddress.address = chip;
status = mvTwsiAddrSet(chanNum, &eepromAddress, MV_TWSI_WRITE); /* send the slave address */
if (status) {
DP(printf("Failed to set slave address: 0x%02x\n", status));
mvTwsiStopBitSet(chanNum);
return (int)status;
}
DP(printf("address %#x returned %#x\n",chip,MV_REG_READ(TWSI_STATUS_BAUDE_RATE_REG(chanNum))));
/* issue a stop bit */
mvTwsiStopBitSet(chanNum);
DP(printf("*** successful completion \n"));
return 0; /* successful completion */
}
#endif

1500
board/mv_feroceon/USP/mv_ide.c Normal file
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board/mv_feroceon/USP/mv_loadnet.c Normal file
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/*
* (C) Copyright 2001
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
/* #define DEBUG */
#include <common.h>
#include <command.h>
#include <net.h>
#include "mvSysHwConfig.h"
#if defined(MV_INCLUDE_MONT_EXT) && defined (MV_INCLUDE_MONT_LOAD_NET)
#if CONFIG_COMMANDS & CFG_CMD_BSP
#include "mvTypes.h"
#include "idma/mvIdma.h"
extern void d_i_cache_clean(unsigned int Address, unsigned int byteCount);
extern unsigned int VIRTUAL_TO_PHY(unsigned int address);
/* defines relevant for the protocol between the loadnet and the fileloader.*/
#define ENTRY_ADDR_OFFSET 0x2c - ETHER_HDR_SIZE - IP_HDR_SIZE
#define PKT_HEADER_SIZE 0x38 - ETHER_HDR_SIZE - IP_HDR_SIZE
#define LAST_PACKET_FLAG 0xffffffff
#define NL_HASHES_PER_LINE 65
/* indication for loadnet reached EOF */
static MV_BOOL loadnet_done;
/* the real load address */
static MV_U32 loadnet_addr_gl;
/* the files Size that was receied by loadnet. */
static MV_U32 fileSize;
/* in case we received an srec file, the srec program Entry. */
static MV_U32 programAdressEntry;
/* for print banner */
static MV_U32 NetloadBlock;
/* This function will be called from the NetReceive (net.c) whenever we will receive
* a UDP packet with our IP address.
* This function know how to process the packets received from the Marvell file
* Loader utility.
* input - pointer to the packet buffer after stripping the IP header.
* (other input aren't relevant for us in this function)
* output - update the global parameters, see above.
*/
static void
mv_private_loadnet_handler(uchar * pkt, unsigned dest, unsigned src, unsigned len)
{
MV_U32 entryAddress,byteCount,sourceAddress,destAddress;
MV_U32 packetEnd;
/* print progress.*/
NetloadBlock++;
putc ('#');
if ((NetloadBlock % (NL_HASHES_PER_LINE)) == 0) {
puts ("\n");
}
/* in case the file Loader transfer Srec to Bin it will send us the
entry address of each packet data. */
/* fixed for MIPS alignment was: entryAddress = (*(MV_U32 *)(pkt + ENTRY_ADDR_OFFSET)); */
entryAddress = 0;
#ifdef CONFIG_MV_LE
entryAddress |= *(unsigned char *)(pkt + ENTRY_ADDR_OFFSET + 0) << 24;
entryAddress |= *(unsigned char *)(pkt + ENTRY_ADDR_OFFSET + 1) << 16;
entryAddress |= *(unsigned char *)(pkt + ENTRY_ADDR_OFFSET + 2) << 8;
entryAddress |= *(unsigned char *)(pkt + ENTRY_ADDR_OFFSET + 3) << 0;
#else
{
int i;
for(i = 0; i < 2; i++ ){
entryAddress |= (*(unsigned short *)(pkt + ENTRY_ADDR_OFFSET + i*2)) << ((1-i)*16);}
}
#endif
/* last packet of a received file is marked. */
if(entryAddress == LAST_PACKET_FLAG){
loadnet_done = 1;
return;}
/* the byte count of the packet data */
#ifdef CONFIG_MV_LE
byteCount = 0;
byteCount |= *(unsigned char *)(pkt + ENTRY_ADDR_OFFSET +6) << 8;
byteCount |= *(unsigned char *)(pkt + ENTRY_ADDR_OFFSET +7);
#else
byteCount = (*(short *)(pkt + ENTRY_ADDR_OFFSET +6)) ;
#endif
packetEnd = entryAddress + byteCount;
/* should be set only in the first time */
if(programAdressEntry == 0x0){
programAdressEntry = entryAddress;
debug("programAdressEntry = %x\n",programAdressEntry);}
if(loadnet_addr_gl == 0x0){
loadnet_addr_gl = entryAddress;
debug("loadnet_addr_gl = %x\n",loadnet_addr_gl);}
destAddress = (MV_U32)(entryAddress - programAdressEntry +
loadnet_addr_gl);
sourceAddress = (MV_U32)(pkt + PKT_HEADER_SIZE);
debug(" Transfering from Source %x to Dest %x %x bytes\n",\
sourceAddress,destAddress,byteCount);
memcpy((MV_U32*)destAddress,(MV_U32*)sourceAddress,byteCount);
fileSize = packetEnd - programAdressEntry;
return;
}
/* load a file through the network interface, using UDP protocol only!!
* ( this function is basically the client for Marvell fileLoader utility. )
* this function doesn't transmit any thing, only receive!!
* input - the address you want the file to be loaded to.
* if set to 0, the file will be loaded to the address given by the file
* loader according to the srec entry address.
* output - the address that the file was loaded to.
* return - the file size received from the file loader.
*/
int load_net(MV_U32 *loadnet_addr){
DECLARE_GLOBAL_DATA_PTR;
bd_t *bd = gd->bd;
/* delay for MIPS LE stuck issue - probably unstable board. ??? */
printf("\n");
eth_halt();
/* initilize the ethernet port */
if(eth_init(bd) < 0)
return(-1);
/* set the Network parameters */
memcpy (NetOurEther, bd->bi_enetaddr, 6);
NetCopyIP(&NetOurIP, &bd->bi_ip_addr);
NetOurGatewayIP = getenv_IPaddr ("gatewayip");
NetOurSubnetMask= getenv_IPaddr ("netmask");
NetServerIP = getenv_IPaddr ("serverip");
/* set the Rx handler */
NetSetHandler (mv_private_loadnet_handler);
/* initialize global parameters. */
programAdressEntry = 0;
loadnet_done = 0;
fileSize = 0;
loadnet_addr_gl = *loadnet_addr;
NetloadBlock = 0;
printf("Load File - Send your file when ready...\n");
/* main loop */
for (;;) {
/* Check the ethernet for a new packet. The ethernet
* receive routine will process it. */
eth_rx();
/* Abort if ctrl-c was pressed. */
if (ctrlc()) {
eth_halt();
printf("\nAbort\n");
return (-1);
}
/* if load net detected EOF*/
if(loadnet_done == 1) break;
}
/* close the ethernet port */
eth_halt();
*loadnet_addr = loadnet_addr_gl;
return fileSize;
}
int
loadnet_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int size;
MV_U32 tmp = 0;
if(!enaMonExt()){
printf("This command can be used only if enaMonExt is set!\n");
return 0;}
size = load_net(&tmp);
printf("\nFile loaded successfully...\n");
printf("Entry Address: 0x%x\n",tmp);
printf("File size: %d bytes.\n",size);
return 1;
}
U_BOOT_CMD(
ln, 1, 1, loadnet_cmd,
"ln - Load S-Record executable file through the network interface. \n",
"\t \n"
"\tLoad S-Record executable file via thr first avilable ethernet port.\n"
"\t(This command can be used only if enaMonExt is set!)\n"
);
#endif
#endif /* #if defined(MV_INCLUDE_MONT_EXT) */

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/*
* (C) Copyright 2001
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
/*
* Dink_command.c - driver for special Marvell coammnds taken from Dink.
*/
#include <config.h>
#include <common.h>
#include <command.h>
#include "mvSysHwConfig.h"
#if defined(MV_INCLUDE_MONT_EXT)
#include "mvTypes.h"
#include "mvCtrlEnvLib.h"
#include "mvCpuIf.h"
#include "cpu/mvCpu.h"
#include "mv_fs.h"
#if defined(MV_INCLUDE_MONT_MMU)
extern void pageTableInit(void);
#endif
#if defined(MV_INCLUDE_MONT_MPU)
extern void MPU_Init(void);
#endif
#if defined(MV_INCLUDE_MONT_MMU)
/***********************************************************************************/
/* hook function that is called after CPU detection and Serial init and before */
/* initializing of the DRAM. */
/***********************************************************************************/
int PTexist(void)
{
char *env;
#ifdef CFG_MV_PT
env = getenv("enaPT");
#ifdef CONFIG_MV_LE
/* if LE page table disable is the default. ( MIPS - unstable, PPC need to change the page settings) */
if( ( (strcmp(env,"yes") == 0) || (strcmp(env,"Yes") == 0) ) ){
#else
/* if BE page table enable is the default. */
if(!env || ( (strcmp(env,"yes") == 0) || (strcmp(env,"Yes") == 0) ) ){
#endif
return 1;
}
#endif
return 0;
}
#endif
/***********************************************************************************/
/* hook function that is called after rellocating to the DRAM, Flash Init, PCI init*/
/* and malloc init are done, and before Gig port init. */
/***********************************************************************************/
#if defined(MV78200)
extern MV_VOID mvDramIfCpuWinCopy(MV_VOID);
#endif
void mon_extension_after_relloc(void)
{
#if defined(MV_INCLUDE_MONT_FFS)
unsigned int status;
#endif
#if defined(MV78XX0) && defined(MV78200)
char *env;
if (whoAmI() == MASTER_CPU)
{
/* default no MP */
env = getenv("enaMP");
if(env && ( (strcmp(env,"yes") == 0) || (strcmp(env,"Yes") == 0) ) )
{
if (IS_CPU1_ENABLED)
{
/* Copy CPU 0 address map to CPU 1 */
mvAhbToMbusCpuWinCopy();
/* Copy CPU 0 DRAM address map to CPU 1 */
mvDramIfCpuWinCopy();
/* kick of the second CPU!! */
MV_REG_BIT_RESET(CPU_CTRL_STAT_REG(1), BIT3);
//sleep(2000);
setenv("enaMP","yes");
}
}
else
#endif
{
setenv("enaMP","no");
}
#if defined(MV78XX0) && defined(MV78200)
}
#endif
#if defined(MV_INCLUDE_MONT_MMU)
if ((mvOsCpuPartGet() == CPU_PART_ARM926) ||
(mvOsCpuPartGet() == CPU_PART_MRVL131))
{
/* Page Table */
if(PTexist() )
{
pageTableInit();
/* set the stack to be cachable */
__asm__ __volatile__ ( " orr sp, sp, #0x80000000 " : );
setenv("enaPT","yes");
}
else
setenv("enaPT","no");
}
#endif /* MV_INCLUDE_MONT_MMU */
#ifndef MV_TINY_IMAGE
#if defined(MV_INCLUDE_MONT_MPU)
else if (mvOsCpuPartGet() == CPU_PART_ARM946)
{
char *env;
env = getenv("enaMPU");
if ((!env)||( (strcmp(env,"yes") == 0) || (strcmp(env,"Yes") == 0) ))
{
setenv("enaMPU","yes");
MPU_Init();
}
}
#endif /* MV_INCLUDE_MONT_MPU */
#if CONFIG_COMMANDS & CFG_CMD_BSP
#if defined(MV_INCLUDE_MONT_FFS)
if (whoAmI() == MASTER_CPU)
{
status = mvFSInit(FS_NO_CACHE);
if(!(status == FS_NO_VALID_FAT_STRING || status == FS_OFFSET_OUT_OF_RANGE))
{
printf("File system present and initialized on the main Flash Memory\n");
}
}
else
{
printf("No File system on the main Flash Memory\n");
}
#endif /* MV_INCLUDE_MONT_FFS */
#endif
#endif
return;
}
#endif /* #if defined(MV_INCLUDE_MONT_EXT) */

36
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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
#ifndef __INCmvMONEXTh
#define __INCmvMONEXTh
#ifdef __cplusplus
extern "C" {
#endif
void mon_extension_before_relloc(void);
void mon_extension_after_relloc(void);
#ifdef __cplusplus
}
#endif
#endif /* __INCmvMONEXTh */

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/*
* (C) Copyright 2005 2N TELEKOMUNIKACE, Ladislav Michl
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
#include <nand.h>
#include <mvTypes.h>
#include "mvBoardEnvLib.h"
/*
* hardware specific access to control-lines
*/
#define MASK_CLE 0x01
#define MASK_ALE 0x02
static void mv_nand_hwcontrol(struct mtd_info *mtd, int cmd)
{
struct nand_chip *this = mtd->priv;
ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
/* TODO add auto detect for nand width */
MV_U32 shift = 0;
if (shift == MV_ERROR)
{
printf("No NAND detection\n");
shift = 0;
}
IO_ADDR_W &= ~((MASK_ALE|MASK_CLE) << shift);
switch (cmd) {
case NAND_CTL_SETCLE: IO_ADDR_W |= (MASK_CLE << shift); break;
case NAND_CTL_SETALE: IO_ADDR_W |= (MASK_ALE << shift); break;
}
this->IO_ADDR_W = (void *) IO_ADDR_W;
}
int board_nand_init(struct nand_chip *nand)
{
#if defined(MV_LARGE_PAGE)
nand->options = NAND_SAMSUNG_LP_OPTIONS;
#endif
nand->eccmode = NAND_ECC_SOFT;
nand->hwcontrol = mv_nand_hwcontrol;
nand->chip_delay = 1000;
return 0;
}
#endif

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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
/* Code for setting up pagetables or the protection unit,
* and enabling the cache. */
#include <config.h>
#include <common.h>
#include <asm/types.h>
#include <command.h>
#include "mvSysHwConfig.h"
#if defined(MV_INCLUDE_MONT_EXT) && defined (MV_INCLUDE_MONT_MMU)
#include "mvCpuIf.h"
#include "cpu/mvCpu.h"
int mpuMap(void);
/* This file refers to the A.R.M.--The ARM Architecture Reference Manual */
enum access
{
NO_ACCESS,
NO_USR_W,
SVC_RW,
ALL_ACCESS
};
enum entrytype
{
INVALID,
PAGE,
SECTION
};
#define U_BIT 16
#define C_BIT 8
#define B_BIT 4
#define WRITE_BACK (C_BIT|B_BIT)
#define WRITE_THROUGH (C_BIT)
#define L1Entry(type,addr,dom,ucb,acc) \
( (type == SECTION) ? ( ((addr) & 0xfff00000) | \
((acc) << 10) | ((dom) << 5) | \
(ucb) | (type) ) : \
(type == PAGE) ? ( ((addr) &0xfffffc00) | \
((dom) << 5) | \
((ucb) & U_BIT) | (type) ) : \
0)
#define L1EntryAddr(type, entry) \
( (type == SECTION) ? ((entry) & 0xfff00000): \
(type == PAGE) ? ((entry) &0xfffffc00):0)
#define L1EntryAcc(type, entry) \
(((entry) & 0xc00) >> 10)
#define L1EntryUcb(type, entry) \
((entry) & 0x1c)
#define L1EntryType(type, entry) \
((entry) & 0x3)
static void detectPageTable(void)
{
int i;
unsigned int *p = (unsigned int *)CFG_PT_BASE;
unsigned int entry;
unsigned int ucb;
unsigned int acc;
unsigned int nextEntry;
char* envCacheMode = getenv("cacheMode");
unsigned int startVirAddr = 0;
unsigned int startPhyAddr = 0;
if(envCacheMode && (strcmp(envCacheMode,"write-through") == 0))
{
printf("Cache Mode - write-through\n");
}
else /*"write-back"*/
{
printf("Cache Mode - write-back\n");
}
printf("page table:\n");
for (i = 0; i < 4096; i++)
{
entry = *p;
nextEntry = *(++p);
ucb = L1EntryUcb(SECTION, entry);
acc = L1EntryAcc(SECTION, entry);
if ( (ucb != L1EntryUcb(SECTION, nextEntry))||
(acc != L1EntryAcc(SECTION, nextEntry))||
(L1EntryAddr(SECTION, entry) > L1EntryAddr(SECTION, nextEntry)) ||
((L1EntryAddr(SECTION, entry) + _1M) < L1EntryAddr(SECTION, nextEntry)))
{
printf("Section (0x%08x - 0x%08x) =>",startPhyAddr, ((i << 20)| 0xfffff));
printf(" (0x%08x - 0x%08x)",startVirAddr, (L1EntryAddr(SECTION, entry)| 0xfffff));
if (ucb & C_BIT)
printf(" Cachable/Bufferable");
else
printf(" Non-Cachable/Bufferable");
switch(acc){
case(NO_ACCESS):
printf("\tNO_ACCESS");
break;
case(NO_USR_W):
printf("\tNO_USR_W");
break;
case(SVC_RW):
printf("\tSVC_RW");
break;
case(ALL_ACCESS):
printf("\tALL_ACCESS");
break;
default:
printf("\tALL_ACCESS");
break;
}
printf("\n");
startVirAddr = L1EntryAddr(SECTION, nextEntry);
startPhyAddr = ((i+1) << 20);
}
}
}
static unsigned int createPageTable(void)
{
int i;
unsigned int *p = 0;
unsigned int entry;
char* envCacheMode = getenv("cacheMode");
unsigned int cacheMode;
#if defined(MV78XX0)
if (whoAmI() == MASTER_CPU)
p = (unsigned int *)CFG_PT_BASE;
else
p = (unsigned int *)CFG_PT_BASE_SLAVE_CPU;
#else
p = (unsigned int *)CFG_PT_BASE;
#endif
if(envCacheMode && (strcmp(envCacheMode,"write-through") == 0))
{
setenv("cacheMode","write-through");
cacheMode = WRITE_THROUGH;
}
else /*"write-back"*/
{
setenv("cacheMode","write-back");
cacheMode = WRITE_BACK;
}
/* first region 0 MB - 0x10000000(256MB) none cacheable/bufferable */
entry = L1Entry(SECTION, 0, 0, U_BIT, ALL_ACCESS);
for (i = 0; i < 256; i++)
{
*p++ = (entry | (i << 20));
}
/* second region 0x10000000 (256MB) - 0x80000000 (2GB) cacheable/bufferable */
entry = L1Entry(SECTION, 0, 0, U_BIT|cacheMode, ALL_ACCESS);
for (; i < 2048 ; i++)
{
*p++ = (entry | (i << 20));
}
/* 3rd region 0x80000000 (2GB) - 0x90000000 cacheable/ bufferable to 0x0*/
entry = L1Entry(SECTION, 0, 0, U_BIT|cacheMode, ALL_ACCESS);
for (; i < 2304; i++)
{
*p++ = (entry | ((i - 2048) << 20));
}
/* 4rd region 0x90000000 - 0xa0000000 not cacheable/not bufferable */
entry = L1Entry(SECTION, 0, 0, U_BIT, ALL_ACCESS);
for (; i < 2560; i++)
{
*p++ = (entry | (i << 20));
}
/* 5th region 0xa0000000 - 0xb0000000 cacheable/bufferable to 0x90000000 */
entry = L1Entry(SECTION, 0, 0, U_BIT|cacheMode, ALL_ACCESS);
for (; i < 2816; i++)
{
*p++ = (entry | ((i - 256) << 20));
}
/* 6th region 0xb0000000 - 0xe0000000 cacheable/bufferable */
entry = L1Entry(SECTION, 0, 0, U_BIT|cacheMode, ALL_ACCESS);
for (; i < 3584; i++)
{
*p++ = (entry | (i << 20));
}
/* 7th region 0xe0000000 - 0xf0000000 cacheable/bufferable to 0xf0000000 */
entry = L1Entry(SECTION, 0, 0, U_BIT|cacheMode, ALL_ACCESS);
for (; i < 3840; i++)
{
*p++ = (entry | ((i+256) << 20));
}
/* 8th region 0xf0000000 - 0xffffffff none cacheable/bufferable */
entry = L1Entry(SECTION, 0, 0, U_BIT, ALL_ACCESS);
for (; i < 4096; i++)
{
*p++ = (entry | (i << 20));
}
#if defined(MV78XX0)
if (whoAmI() == MASTER_CPU)
return CFG_PT_BASE;
else
return CFG_PT_BASE_SLAVE_CPU;
#else
return CFG_PT_BASE;
#endif
}
extern int PTexist(void);
int cpumap_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
printf("CPU Memory mapping :\n");
if ((mvOsCpuPartGet() == CPU_PART_ARM926) ||
(mvOsCpuPartGet() == CPU_PART_MRVL131))
{
if(enaMonExt())
{
if(PTexist())
{
detectPageTable();
}
else
printf("No page table. \n");
}
else
printf("No page table. \n");
}
#ifndef MV_TINY_IMAGE
#if defined(MV_INCLUDE_MONT_EXT) && defined (MV_INCLUDE_MONT_MPU)
else if (mvOsCpuPartGet() == CPU_PART_ARM946)
{
mpuMap();
}
#endif
#endif
return 1;
}
U_BOOT_CMD(
cpumap, 1, 1, cpumap_cmd,
"cpumap - Display CPU memory mapping settings.\n",
" \n"
"\tdisplay CPU memory mapping settings.\n"
);
/* These are all the bits currently defined for the control register */
/* A.R.M. 7.4.2 */
#define MMU_V 0x2000
#define MMU_I 0x1000
#define MMU_Z 0x0800
#define MMU_F 0x0400
#define MMU_R 0x0200
#define MMU_S 0x0100
#define MMU_B 0x0080
#define MMU_RES 0x50078 /* reserved bits should be 1 */
#define MMU_C 0x0004
#define MMU_A 0x0002
#define MMU_M 0x0001
/*
* The functions below take arguments to specify which "caches" the
* action is to be directed at. For the I-cache, pass "MMU_I". For
* the D-cache, "MMU_C". For both, pass "MMU_ID". For combined ID-Cache
* processors, use "MMU_C"
*/
#define MMU_ID (MMU_I + MMU_C)
/*
* Inline functions for MMU functions
*/
/* Set the page tables base register: register 2 (A.R.M. 7.4.3) */
inline void mmuSetPageTabBase(unsigned int pagetab)
{
__asm__ __volatile__(
"mcr p15, 0, %0, c2, c0\n"
:
: "r" (pagetab));
}
/* Set the domain access-control register: register 3 (A.R.M. 7.4.4) */
inline void mmuSetDomainAccessControl(unsigned long flags)
{
__asm__ __volatile__(
"mcr p15, 0, %0, c3, c0\n"
:
: "r" (flags));
}
/* Flush the cache(s).
*/
inline void mmuInvCache(unsigned caches)
{
unsigned long dummy = 0;
switch (caches)
{
case MMU_C:
__asm__ __volatile__(
"mcr p15, 0, %0, c7, c6, 0\n"
:
: "r" (dummy));
break;
case MMU_I:
__asm__ __volatile__(
"mcr p15, 0, %0, c7, c5, 0\n"
:
: "r" (dummy));
break;
case MMU_ID:
__asm__ __volatile__(
"mcr p15, 0, %0, c7, c7, 0\n"
:
: "r" (dummy));
break;
}
}
/* Flush the TLB(s)
*/
inline void mmuFlushTLB( unsigned tlbs)
{
unsigned long dummy = 0;
/* flush TLB(s): write to register 8, with flags (A.R.M. 7.4.9) */
switch (tlbs)
{
case MMU_C:
__asm__ __volatile__(
"mcr p15, 0, %0, c8, c6, 0\n"
:
: "r" (dummy));
break;
case MMU_I:
__asm__ __volatile__(
"mcr p15, 0, %0, c8, c5, 0\n"
:
: "r" (dummy));
break;
case MMU_ID:
__asm__ __volatile__(
"mcr p15, 0, %0, c8, c7, 0\n"
:
: "r" (dummy));
break;
}
}
/* Enable the cache/MMU/TLB etc.
*/
inline void cpuCfgEnable(unsigned long flags, MV_BOOL enable)
{
unsigned long tmp;
if (enable == MV_TRUE)
{
asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (tmp));
tmp |= flags;
asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (tmp));
}
else
{
asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (tmp));
tmp &= ~flags;
asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (tmp));
}
}
/* Disable the I/D cache.
*/
inline void disableIDCache(void)
{
unsigned long tmp;
asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (tmp));
tmp &= ~MMU_ID;
asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (tmp));
/* invalidate I/D-cache */
tmp = 0;
asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (tmp));
}
/* return 0 in case cache is absent */
inline unsigned long getDCacheAssociativity(void)
{
unsigned long tmp, dassoc, mul;
/* Read cache type information */
/* Bit[11:0] - I cache size */
/* Bit[23:12] - D cache size */
/* Bit 24 - if '1' Seperate I-cache and D-cache */
/* bit[28:24] - ctype */
asm ("mrc p15, 0, %0, c0, c0, 1":"=r" (tmp));
/* D cache data only */
/* Bit[1:0] - cache line length */
/* Bit2 - M */
/* Bit[5:3] - cache associativity */
/* Bit[9:6] - cache size */
tmp = (tmp >> 12) & 0xfff;
/* Detect cache associativity - the formulae are teken from ARM DDI reference manual */
mul = 2 + ((tmp >> 2) & 1);
dassoc = ((tmp >> 3) & 0x7);
if ((dassoc == 0) && (mul == 2))
dassoc = 1;
else
{
if ((dassoc == 0) && (mul == 3))
dassoc = 0;
else
dassoc = mul << (dassoc - 1);
}
return dassoc;
}
inline unsigned long getDCacheSize(void)
{
unsigned long tmp, dsize, mul;
/* Read cache type information */
/* Bit[11:0] - I cache size */
/* Bit[23:12] - D cache size */
/* Bit 24 - if '1' Seperate I-cache and D-cache */
/* bit[28:24] - ctype */
asm ("mrc p15, 0, %0, c0, c0, 1":"=r" (tmp));
/* D cache data only */
/* Bit[1:0] - cache line length */
/* Bit2 - M */
/* Bit[5:3] - cache associativity */
/* Bit[9:6] - cache size */
tmp = (tmp >> 12) & 0xfff;
/* Detect cache size - the formulae are teken from ARM DDI reference manual */
mul = 2 + ((tmp >> 2) & 1);
dsize = ((tmp >> 6) & 0xf);
dsize = mul << (dsize + 8);
return dsize;
}
inline unsigned long getDCacheLine(void)
{
unsigned long tmp, dline;
/* Read cache type information */
/* Bit[11:0] - I cache size */
/* Bit[23:12] - D cache size */
/* Bit 24 - if '1' Seperate I-cache and D-cache */
/* bit[28:24] - ctype */
asm ("mrc p15, 0, %0, c0, c0, 1":"=r" (tmp));
/* D cache data only */
/* Bit[1:0] - cache line length */
/* Bit2 - M */
/* Bit[5:3] - cache associativity */
/* Bit[9:6] - cache size */
tmp = (tmp >> 12) & 0xfff;
/* Detect cache line - the formulae are teken from ARM DDI reference manual */
dline = 1 << ((tmp & 0x3) + 3);
return dline;
}
extern ulong _dcache_index_max;
extern ulong _dcache_index_inc;
extern ulong _dcache_set_max;
extern ulong _dcache_set_index;
void pageTableInit(void)
{
unsigned long dsize, dassoc, dline, log2Assoc, tmp;
printf("D-Cache type information\n");
/* Detect cache size */
dsize = getDCacheSize();
/* Detect cache number of way */
dassoc = getDCacheAssociativity();
/* Detect cache number of way */
dline = getDCacheLine();
/* Detected cache absent */
if (dassoc == 0)
{
printf("DCache absent!\n");
return;
}
else
{
printf("DCache size: %dKB\n",dsize/1024);
printf("DCache associativity: %d way\n",dassoc);
printf("DCache line length: %dB\n",dline);
}
/* Calc num of digits for assoc representation */
log2Assoc = 0;
tmp = dassoc - 1;
do
{
log2Assoc++;
tmp = tmp >> 1;
}while (tmp > 0);
printf("Intializing Page Table...");
/* The num of assoc is set in the ip address from bit 31 backward */
if (dassoc == 1)
{
_dcache_index_max = 0;
_dcache_index_inc = 0;
}
else
{
_dcache_index_max = ~ ((1 << (31 - log2Assoc + 1)) - 1);
_dcache_index_inc = (1 << (31 - log2Assoc + 1));
}
_dcache_set_max = (dsize/dassoc) - dline;
_dcache_set_index = dline;
disableIDCache();
/* Disable D cache and MMU. */
cpuCfgEnable(MMU_C+MMU_M, MV_FALSE);
/* set up the page table, domain control registers */
mmuSetPageTabBase(createPageTable());
mmuSetDomainAccessControl(3);
/* flush caches and TLBs */
mmuInvCache(MMU_ID);
mmuFlushTLB(MMU_ID);
/* write to control register :-
* I-cache on, 32-bit data and program space,
* write-buffer on, D-cache on, MMU on
*/
cpuCfgEnable(MMU_I+MMU_RES+MMU_C+MMU_M, MV_TRUE);
printf("Done \n");
return ;
}
#endif /* defined(MV_INCLUDE_MONT_EXT) */

837
board/mv_feroceon/USP/mv_pci.c Normal file
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@ -0,0 +1,837 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
/* PCI.c - PCI functions */
#include <common.h>
#include <config.h>
#include <command.h>
#if (CONFIG_COMMANDS & CFG_CMD_PCI)
#include <pci.h>
#include "pci-if/mvPciIf.h"
#include "mvCpuIf.h"
#include "pci-if/pci_util/mvPciUtils.h"
#ifdef DEBUG
#define DB(x) x
#else
#define DB(x)
#endif /* DEBUG */
/* global definetion */
#define REG_NUM_MASK (0x3F << 2)
/* global indicate wether we are in the scan process */
unsigned int bus_scan = 0;
#if CONFIG_COMMANDS & CFG_CMD_BSP
/******************************************************************************
* Category - PCI0
* Functionality- Scans PCI0 for devices and prints relevant information
* Need modifications (Yes/No) - No
*****************************************************************************/
MV_BOOL scanPci(MV_U32 host)
{
MV_U32 index,numOfElements=4*8,barIndex;
MV_PCI_DEVICE pciDevices[4*8]; //3 slots and us,Max 8 functions per slot
memset (&pciDevices,0,12*sizeof(MV_PCI_DEVICE));
if (mvPciScan(host, pciDevices , &numOfElements) != MV_OK )
{
printf("scanPci:mvPciScan failed for host %d \n",host);
return MV_FALSE;
}
for(index = 0; index < numOfElements ; index++)
{
printf("\nBus: %x Device: %x Func: %x Vendor ID: %x Device ID: %x\n",
pciDevices[index].busNumber,
pciDevices[index].deviceNum,
pciDevices[index].function,
pciDevices[index].venID,
pciDevices[index].deviceID);
printf("-------------------------------------------------------------------\n");
printf("Class: %s\n",pciDevices[index].type);
/* check if we are bridge*/
if ((pciDevices[index].baseClassCode == PCI_BRIDGE_CLASS)&&
(pciDevices[index].subClassCode == P2P_BRIDGE_SUB_CLASS_CODE))
{
printf("Primary Bus:0x%x \tSecondary Bus:0x%x \tSubordinate Bus:0x%x\n",
pciDevices[index].p2pPrimBusNum,
pciDevices[index].p2pSecBusNum,
pciDevices[index].p2pSubBusNum);
printf("IO Base:0x%x \t\tIO Limit:0x%x",pciDevices[index].p2pIObase,
pciDevices[index].p2pIOLimit);
(pciDevices[index].bIO32)? (printf(" (32Bit IO)\n")):
(printf(" (16Bit IO)\n"));
printf("Memory Base:0x%x \tMemory Limit:0x%x\n",pciDevices[index].p2pMemBase,
pciDevices[index].p2pMemLimit);
printf("Pref Memory Base:0x%x \tPref Memory Limit:0x%x",
pciDevices[index].p2pPrefMemBase,
pciDevices[index].p2pPrefMemLimit);
(pciDevices[index].bPrefMem64)? (printf(" (64Bit PrefMem)\n")):
(printf(" (32Bit PrefMem)\n"));
if (pciDevices[index].bPrefMem64)
{
printf("Pref Base Upper 32bit:0x%x \tPref Limit Base Upper32 bit:0x%x\n",
pciDevices[index].p2pPrefBaseUpper32Bits,
pciDevices[index].p2pPrefLimitUpper32Bits);
}
}
for (barIndex = 0 ; barIndex < pciDevices[index].barsNum ; barIndex++)
{
if (pciDevices[index].pciBar[barIndex].barType == PCI_64BIT_BAR)
{
printf("PCI_BAR%d (%s-%s) base: %x%08x%s",barIndex,
(pciDevices[index].pciBar[barIndex].barMapping == PCI_MEMORY_BAR)?"Mem":"I/O",
"64bit",
pciDevices[index].pciBar[barIndex].barBaseHigh,
pciDevices[index].pciBar[barIndex].barBaseLow,
(pciDevices[index].pciBar[barIndex].barBaseLow == 0)?"\t\t":"\t");
}
else if (pciDevices[index].pciBar[barIndex].barType == PCI_32BIT_BAR)
{
printf("PCI_BAR%d (%s-%s) base: %x%s",barIndex,
(pciDevices[index].pciBar[barIndex].barMapping == PCI_MEMORY_BAR)?"Mem":"I/O",
"32bit",
pciDevices[index].pciBar[barIndex].barBaseLow,
(pciDevices[index].pciBar[barIndex].barBaseLow == 0)?"\t\t\t":"\t\t");
}
if(pciDevices[index].pciBar[barIndex].barSizeHigh != 0)
printf("size: %d%08d bytes\n",pciDevices[index].pciBar[barIndex].barSizeHigh,
pciDevices[index].pciBar[barIndex].barSizeLow);
else
printf("size: %d bytes\n", pciDevices[index].pciBar[barIndex].barSizeLow);
}
}
return MV_TRUE;
}
int sp_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
MV_U32 host = 0;
if (argc > 1) {
host = simple_strtoul (argv[1], NULL, 10);
}
if(host >= mvCtrlPciIfMaxIfGet()){
printf("PCI %d doesn't exist\n",host);
return 1;
}
if( scanPci(host) == MV_FALSE)
printf("PCI %d Scan - FAILED!!.\n",host);
return 1;
}
U_BOOT_CMD(
sp, 2, 1, sp_cmd,
"sp - Scan PCI bus.\n",
" [0/1] \n"
"\tScan and detecect all devices on mvPCI bus 0/1 \n"
"\t(This command can be used only if enaMonExt is set!)\n"
);
int me_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
MV_U32 host = 0;
if (argc > 1)
{
host = simple_strtoul (argv[1], NULL, 10);
}
if(host >= mvCtrlPciIfMaxIfGet())
{
printf("Master %d doesn't exist\n",host);
return 1;
}
if(mvPciIfMasterEnable(host,MV_TRUE) == MV_OK)
printf("PCI %d Master enabled.\n",host);
else
printf("PCI %d Master enabled -FAILED!!\n",host);
return 1;
}
U_BOOT_CMD(
me, 2, 1, me_cmd,
"me - PCI master enable\n",
" [0/1] \n"
"\tEnable the MV device as Master on PCI 0/1. \n"
);
int se_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
MV_U32 host=0,dev = 0,bus=0;
if(argc != 4)
{
printf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
host = simple_strtoul (argv[1], NULL, 10);
bus = simple_strtoul (argv[2], NULL, 16);
dev = simple_strtoul (argv[3], NULL, 16);
if(host >= mvCtrlPciIfMaxIfGet())
{
printf("PCI %d doesn't exist\n",host);
return 1;
}
if(mvPciIfSlaveEnable(host,bus,dev,MV_TRUE) == MV_OK )
printf("PCI %d Bus %d Slave 0x%x enabled.\n",host,bus,dev);
else
printf("PCI %d Bus %d Slave 0x%x enabled - FAILED!!.\n",host,bus,dev);
return 1;
}
U_BOOT_CMD(
se, 4, 1, se_cmd,
"se - PCI Slave enable\n",
" [0/1] bus dev \n"
"\tEnable the PCI device as Slave on PCI 0/1. \n"
);
/******************************************************************************
* Functionality- The commands changes the pci remap register and displays the
* address to be used in order to access PCI 0.
*****************************************************************************/
int mapPci_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
MV_ADDR_WIN pciWin;
MV_TARGET target=0;
MV_U32 host=0,effectiveBaseAddress=0;
pciWin.baseLow=0;
pciWin.baseHigh=0;
if (argc > 1) {
host = simple_strtoul(argv[1], NULL, 10);
}
if(argc > 2) {
pciWin.baseLow = simple_strtoul(argv[2], NULL, 16);
}
if(host >= mvCtrlPciIfMaxIfGet()){
printf("PCI %d doesn't exist\n",host);
return 1;
}
target = PCI0_MEM0 + (2 * host);
printf("mapping pci %x to address 0x%x\n",host,pciWin.baseLow);
#if defined(MV_INCLUDE_PEX) || defined(MV_INCLUDE_PCI)
effectiveBaseAddress = mvCpuIfPciIfRemap(target,&pciWin);
#endif
if ( effectiveBaseAddress == 0xffffffff)
{
printf("Error remapping\n");
return 1;
}
printf("PCI %x Access base address : %x\n",host,effectiveBaseAddress);
return 1;
}
U_BOOT_CMD(
mp, 3, 1, mapPci_cmd,
"mp - map PCI BAR\n",
" [0/1] address \n"
"\tChange the remap of PCI 0/1 window 0 to address 'addrress'.\n"
"\tIt also displays the new access address, since the remap is not always\n"
"\tthe same as requested. \n"
);
#endif
MV_U32 mv_mem_ctrl_dev(MV_U32 pciIf, MV_U32 bus,MV_U32 dev)
{
MV_U32 ven, class;
ven = mvPciIfConfigRead(pciIf,bus,dev,0,PCI_VENDOR_ID) & 0xffff;
class = (mvPciIfConfigRead(pciIf,bus,dev,0,PCI_REVISION_ID) >> 16 ) & 0xffff;
/* if we got any other Marvell PCI cards ignore it. */
if(((ven == 0x11ab) && (class == PCI_CLASS_MEMORY_OTHER))||
((ven == 0x11ab) && (class == PCI_CLASS_BRIDGE_HOST)))
{
return 1;
}
return 0;
}
static int mv_read_config_dword(struct pci_controller *hose,
pci_dev_t dev,
int offset, u32* value)
{
MV_U32 bus,func,regOff,dev_no;
char *env;
bus = PCI_BUS(dev);
dev_no = PCI_DEV(dev);
func = (MV_U32)PCI_FUNC(dev);
regOff = (MV_U32)offset & REG_NUM_MASK;
/* We will scan only ourselves and the PCI slots that exist on the
board, because we may have a case that we have one slot that has
a Cardbus connector, and because CardBus answers all IDsels we want
to scan only this slot and ourseleves.
*/
#if defined(MV_INCLUDE_PCI)
env = getenv("pciMode");
if ((PCI_IF_TYPE_CONVEN_PCIX == mvPciIfTypeGet((MV_U32)hose->cfg_addr)) &&
((strcmp(env,"host") == 0) || (strcmp(env,"Host") == 0)))
{
if ( !mvBoardIsOurPciSlot(bus, dev_no) &&
(mvBoardIdGet() != DB_88F5181_DDR1_MNG) &&
(DB_88F5181_DDR1_PRPMC != mvBoardIdGet()) &&
(DB_88F5181_DDR1_PEXPCI != mvBoardIdGet()))
{
*value = 0xffffffff;
return 0;
}
}
#endif /* defined(MV_INCLUDE_PCI) */
if( bus_scan == 1 )
{
env = getenv("disaMvPnp");
if(env && ( (strcmp(env,"yes") == 0) || (strcmp(env,"Yes") == 0) ) )
{
if( mv_mem_ctrl_dev((MV_U32)hose->cfg_addr, bus, dev_no) )
{
*value = 0xffffffff;
return 0;
}
}
}
DB(printf("mv_read_config_dword hose->cfg_addr %x\n",hose->cfg_addr);)
DB(printf("mv_read_config_dword bus %x\n",bus);)
DB(printf("mv_read_config_dword dev_no %x\n",dev_no);)
DB(printf("mv_read_config_dword func %x\n",func);)
DB(printf("mv_read_config_dword regOff %x\n",regOff);)
*value = (u32) mvPciIfConfigRead((MV_U32)hose->cfg_addr,bus,dev_no,func,regOff);
DB(printf("mv_read_config_dword value %x\n",*value);)
return 0;
}
static int mv_write_config_dword(struct pci_controller *hose,
pci_dev_t dev,
int offset, u32 value)
{
MV_U32 bus,func,regOff,dev_no;
bus = PCI_BUS(dev);
dev_no = PCI_DEV(dev);
func = (MV_U32)PCI_FUNC(dev);
regOff = offset & REG_NUM_MASK;
mvPciIfConfigWrite((MV_U32)hose->cfg_addr,bus,dev_no,func,regOff,value);
return 0;
}
static void mv_setup_ide(struct pci_controller *hose,
pci_dev_t dev, struct pci_config_table *entry)
{
static const int ide_bar[]={8,4,8,4,16,1024};
u32 bar_response, bar_value;
int bar;
for (bar=0; bar<6; bar++)
{
/*ronen different function for 3rd bank.*/
unsigned int offset = (bar < 2)? bar*8: 0x100 + (bar-2)*8;
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + offset, 0x0);
pci_read_config_dword(dev, PCI_BASE_ADDRESS_0 + offset, &bar_response);
pciauto_region_allocate(bar_response & PCI_BASE_ADDRESS_SPACE_IO ?
hose->pci_io : hose->pci_mem, ide_bar[bar], &bar_value);
pci_write_config_dword(dev, PCI_BASE_ADDRESS_0 + bar*4, bar_value);
}
}
static void mv_setup_host(struct pci_controller *hose,
pci_dev_t dev, struct pci_config_table *entry)
{
//skip our host
DB(printf("skipping :bus=%x dev=%x fun=%x\n",
(unsigned int)PCI_BUS(dev),
(unsigned int)PCI_DEV(dev),
(unsigned int)PCI_FUNC(dev)));
return;
}
static void mv_pci_bus_mode_display(MV_U32 host)
{
if (PCI_IF_TYPE_PEX == mvPciIfTypeGet(host))
{
#if defined(MV_INCLUDE_PEX)
MV_PEX_MODE pexMode;
if (mvPexModeGet(mvPciRealIfNumGet(host),&pexMode) != MV_OK)
{
printf("mv_pci_bus_mode_display: mvPexModeGet failed\n");
}
switch (pexMode.pexType)
{
case MV_PEX_ROOT_COMPLEX:
printf("PCI %d: PCI Express Root Complex Interface\n",host);
break;
case MV_PEX_END_POINT:
printf("PCI %d: PCI Express End Point Interface\n",host);
break;
}
if (!(pexMode.pexLinkUp))
{
printf("PEX interface detected no Link.\n");
}
else
{
if (MV_PEX_WITDH_X1 == pexMode.pexWidth)
{
printf("PEX interface detected Link X1\n");
}
else
{
printf("PEX interface detected Link X4\n");
}
}
return ;
#endif /* MV_INCLUDE_PEX */
}
if (PCI_IF_TYPE_CONVEN_PCIX == mvPciIfTypeGet(host))
{
#if defined(MV_INCLUDE_PCI)
MV_PCI_MODE pciMode;
if (mvPciModeGet(mvPciRealIfNumGet(host),&pciMode) != MV_OK)
{
printf("mv_pci_bus_mode_display: mvPciIfModeGet failed\n");
}
switch (pciMode.pciType)
{
case MV_PCI_CONV:
printf("PCI %d: Conventional PCI",host);
break;
case MV_PCIX:
printf("PCI %d: PCI-X",host);
break;
default:
printf("PCI %d: Unknown",host);
return;
break;
}
printf(", speed = %d\n",pciMode.pciSpeed);
#endif /* #if defined(MV_INCLUDE_PCI) */
}
}
struct pci_config_table mv_config_table[] = {
{ PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE,
PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, mv_setup_ide},
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, mv_setup_host}, //PCI host
{}
};
/* Defines for more modularity of the pci_init_board function */
struct pci_controller pci_hose[8];
#if (MV_PCI_IF_MAX_IF == 2)
#define PCI_IF_MEM(pciIf) ((pciIf==0)?PCI_IF0_MEM0:PCI_IF1_MEM0)
#define PCI_IF_REMAPED_MEM_BASE(pciIf) ((pciIf==0)?PCI_IF0_REMAPED_MEM_BASE:PCI_IF1_REMAPED_MEM_BASE)
#define PCI_IF_MEM_BASE(pciIf) ((pciIf==0)?PCI_IF0_MEM0_BASE:PCI_IF1_MEM0_BASE)
#define PCI_IF_MEM_SIZE(pciIf) ((pciIf==0)?PCI_IF0_MEM0_SIZE:PCI_IF1_MEM0_SIZE)
#define PCI_IF_IO_BASE(pciIf) ((pciIf==0)?PCI_IF0_IO_BASE:PCI_IF1_IO_BASE)
#define PCI_IF_IO_SIZE(pciIf) ((pciIf==0)?PCI_IF0_IO_SIZE:PCI_IF1_IO_SIZE)
#else
#define PCI_IF_MEM(pciIf) (PCI_IF0_MEM0)
#define PCI_IF_REMAPED_MEM_BASE(pciIf) (PCI_IF0_REMAPED_MEM_BASE)
#define PCI_IF_MEM_BASE(pciIf) (PCI_IF0_MEM0_BASE)
#define PCI_IF_MEM_SIZE(pciIf) (PCI_IF0_MEM0_SIZE)
#define PCI_IF_IO_BASE(pciIf) (PCI_IF0_IO_BASE)
#define PCI_IF_IO_SIZE(pciIf) (PCI_IF0_IO_SIZE)
#endif
/* because of CIV tem needs we are gonna do a remap to PCI memory */
#define PCI_IF0_REMAPED_MEM_BASE 0x40000000
#define PCI_IF1_REMAPED_MEM_BASE 0x40000000
void
pci_init_board(void)
{
MV_U32 pciIfNum = mvCtrlPciIfMaxIfGet();
MV_U32 pciIf=0;
MV_U32 regVal=0;
MV_ADDR_WIN rempWin;
char *env;
int first_busno=0;
int status;
MV_CPU_DEC_WIN cpuAddrDecWin;
PCI_IF_MODE pciIfMode = PCI_IF_MODE_HOST;
env = getenv("disaMvPnp");
if(env && ( (strcmp(env,"yes") == 0) || (strcmp(env,"Yes") == 0) ) )
printf("Warning: skip configuration of Marvell devices!!!\n");
#if defined(MV_INCLUDE_PEX) && defined(MV78XX0)
/* Power down the none lanes 0.1, 0.2, and 0.3 if PEX0 is X4 */
if ( !(PCI0_IS_QUAD_X1) )
{
for (pciIf = 1; pciIf < 4; pciIf++)
mvCtrlPwrClckSet(PEX_UNIT_ID, mvPciRealIfNumGet(pciIf),MV_FALSE);
}
/* Power down the none lanes 1.1, 1.2, and 1.3 if PEX1 is X4 */
if ( !(PCI1_IS_QUAD_X1) )
{
for (pciIf = 5; pciIf < 8; pciIf++)
mvCtrlPwrClckSet(PEX_UNIT_ID, mvPciRealIfNumGet(pciIf),MV_FALSE);
}
#endif
for (pciIf = 0; pciIf < pciIfNum; pciIf++)
{
pci_hose[pciIf].config_table = mv_config_table;
if (PCI_IF_TYPE_PEX == mvPciIfTypeGet(pciIf))
{
if (MV_FALSE == mvCtrlPwrClckGet(PEX_UNIT_ID, mvPciRealIfNumGet(pciIf)))
{
continue;
}
}
#if defined(MV_INCLUDE_PCI)
else
{
if (MV_FALSE == mvCtrlPwrClckGet(PCI_UNIT_ID, mvPciRealIfNumGet(pciIf)))
{
continue;
}
}
#endif
/* device or host ? */
if (PCI_IF_TYPE_PEX == mvPciIfTypeGet(pciIf))
{
#if defined(MV_INCLUDE_PEX)
#if !defined(MV_88F6183) && !defined(MV_88F6183L) && !defined(MV_88F6082) && !defined(MV88F6281) && \
!defined(MV88F6192) && !defined(MV88F6180) && !defined(MV88F6190)
MV_PEX_MODE pexMode;
if (mvPexModeGet(mvPciRealIfNumGet(pciIf),&pexMode) != MV_OK)
{
printf("pci_init_board: mvPexModeGet failed\n");
}
if (MV_PEX_ROOT_COMPLEX == pexMode.pexType)
pciIfMode = PCI_IF_MODE_HOST;
else
pciIfMode = PCI_IF_MODE_DEVICE;
#else
/* Set pex mode incase S@R not exist */
env = getenv("pexMode");
if( env && ( ((strcmp(env,"EP") == 0) || (strcmp(env,"ep") == 0) )))
{
pciIfMode = PCI_IF_MODE_DEVICE;
}
else
{
pciIfMode = PCI_IF_MODE_HOST;
}
#endif
#endif
}
else /* PCI */
{
#if defined(MV_INCLUDE_PCI)
char *env;
env = getenv("pciMode");
if((!env) || (strcmp(env,"host") == 0) || (strcmp(env,"Host") == 0) )
{
pciIfMode = PCI_IF_MODE_HOST;
}
else
{
pciIfMode = PCI_IF_MODE_DEVICE;
}
#endif
}
if ((status = mvPciIfInit(pciIf, pciIfMode)) == MV_ERROR)
{
printf("pci_init_board:Error calling mvPciIfInit for pciIf %d\n",pciIf);
}
else
{
if (status == MV_OK)
mv_pci_bus_mode_display(pciIf);
else
{
/* Interface with no link */
printf("PEX %d: interface detected no Link.\n", pciIf);
return;
}
}
if (PCI_IF_TYPE_CONVEN_PCIX == mvPciIfTypeGet(pciIf))
{
#if defined(MV_INCLUDE_PCI)
if(enaMonExt())
{
/* WA for first PCI interface */
/* mvPciWaFix(mvPciRealIfNumGet(pciIf)); */
}
#endif /* MV_INCLUDE_PCI */
if (pciIfMode == PCI_IF_MODE_DEVICE)
{
mvPciIfLocalDevNumSet(pciIf, 0x1f);
}
}
#if defined(DB_PRPMC)
mvPciIfLocalDevNumSet(pciIf, 0x1f);
#endif
/* start Uboot PCI scan */
if (pciIf == 0)
pci_hose[pciIf].first_busno = 0;
else
pci_hose[pciIf].first_busno = pci_hose[pciIf-1].last_busno + 1;
/* start Uboot PCI scan */
pci_hose[pciIf].current_busno = pci_hose[pciIf].first_busno;
pci_hose[pciIf].last_busno = 0xff;
if (mvPciIfLocalBusNumSet(pciIf,pci_hose[pciIf].first_busno) != MV_OK)
{
printf("pci_init_board:Error calling mvPciIfLocalBusNumSet for pciIf %d\n",pciIf);
}
/* If no link on the interface it will not be scan */
if (status == MV_NO_SUCH)
{
pci_hose[pciIf].last_busno =pci_hose[pciIf].first_busno;
continue;
}
#ifdef PCI_DIS_INTERFACE
/* The disable interface will not be scan */
if (pciIf == PCI_DIS_INTERFACE)
{
printf("***Interface is disable***\n");
pci_hose[pciIf].last_busno =pci_hose[pciIf].first_busno;
continue;
}
#endif
if (MV_OK != mvCpuIfTargetWinGet(PCI_MEM(pciIf, 0), &cpuAddrDecWin))
{
mvOsPrintf("%s: ERR. mvCpuIfTargetWinGet failed\n", __FUNCTION__);
return ;
}
rempWin.baseLow = ((cpuAddrDecWin.addrWin.baseLow & 0x0fffffff) | PCI_IF_REMAPED_MEM_BASE(pciIf));
rempWin.baseHigh = 0;
/* perform a remap for the PEX0 interface*/
if (0xffffffff == mvCpuIfPciIfRemap(PCI_MEM(pciIf, 0),&rempWin))
{
printf("%s:mvCpuIfPciIfRemap failed\n",__FUNCTION__);
return;
}
/* PCI memory space */
pci_set_region(pci_hose[pciIf].regions + 0,
rempWin.baseLow, /* bus address */
cpuAddrDecWin.addrWin.baseLow,
cpuAddrDecWin.addrWin.size,
PCI_REGION_MEM);
if (MV_OK != mvCpuIfTargetWinGet(PCI_IO(pciIf), &cpuAddrDecWin))
{
/* No I/O space */
pci_hose[pciIf].region_count = 1;
}
else
{
/* PCI I/O space */
pci_set_region(pci_hose[pciIf].regions + 1,
cpuAddrDecWin.addrWin.baseLow,
cpuAddrDecWin.addrWin.baseLow,
cpuAddrDecWin.addrWin.size,
PCI_REGION_IO);
pci_hose[pciIf].region_count = 2;
}
pci_set_ops(&pci_hose[pciIf],
pci_hose_read_config_byte_via_dword,
pci_hose_read_config_word_via_dword,
mv_read_config_dword,
pci_hose_write_config_byte_via_dword,
pci_hose_write_config_word_via_dword,
mv_write_config_dword);
pci_hose[pciIf].cfg_addr = (unsigned int*) pciIf;
pci_hose[pciIf].config_table[1].bus = mvPciIfLocalBusNumGet(pciIf);
pci_hose[pciIf].config_table[1].dev = mvPciIfLocalDevNumGet(pciIf);
pci_register_hose(&pci_hose[pciIf]);
if (pciIfMode == PCI_IF_MODE_HOST)
{
MV_U32 pciData=0,baseClassCode=0,subClassCode;
bus_scan = 1;
pci_hose[pciIf].last_busno = pci_hose_scan(&pci_hose[pciIf]);
bus_scan = 0;
pciData = mvPciIfConfigRead(pciIf,pci_hose[pciIf].first_busno,1,0, PCI_CLASS_CODE_AND_REVISION_ID);
baseClassCode = (pciData & PCCRIR_BASE_CLASS_MASK) >> PCCRIR_BASE_CLASS_OFFS;
subClassCode = (pciData & PCCRIR_SUB_CLASS_MASK) >> PCCRIR_SUB_CLASS_OFFS;
if ((baseClassCode == PCI_BRIDGE_CLASS) &&
(subClassCode == P2P_BRIDGE_SUB_CLASS_CODE))
{
/* In rthe bridge : We want to open its memory and
IO to the maximum ! after the u-boot Scan */
/* first the IO */
pciData = mvPciIfConfigRead(pciIf,pci_hose[pciIf].first_busno,1,0,P2P_IO_BASE_LIMIT_SEC_STATUS);
/* keep the secondary status */
pciData &= PIBLSS_SEC_STATUS_MASK;
/* set to the maximum - 0 - 0xffff */
pciData |= 0xff00;
mvPciIfConfigWrite(pciIf,pci_hose[pciIf].first_busno,1,0,P2P_IO_BASE_LIMIT_SEC_STATUS,pciData);
/* the the Memory */
pciData = mvPciIfConfigRead(pciIf,pci_hose[pciIf].first_busno,1,0,P2P_MEM_BASE_LIMIT);
/* set to the maximum - PCI_IF_REMAPED_MEM_BASE(pciIf) - 0xf000000 */
pciData = 0xEFF00000 | (PCI_IF_REMAPED_MEM_BASE(pciIf) >> 16);
mvPciIfConfigWrite(pciIf,pci_hose[pciIf].first_busno,1,0,P2P_MEM_BASE_LIMIT,pciData);
}
}
else /* PCI_IF_MODE_HOST */
{
pci_hose[pciIf].last_busno = pci_hose[pciIf].first_busno;
}
first_busno = pci_hose[pciIf].last_busno + 1;
}
#ifdef DB_FPGA
MV_REG_BIT_RESET(PCI_BASE_ADDR_ENABLE_REG(0), BIT10);
#endif
}
#endif /* CONFIG_PCI */

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board/mv_feroceon/USP/mv_protectionUnit.c Normal file
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94
board/mv_feroceon/USP/mv_rtc.c Normal file
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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
/* #define RTC_DEBUG */
#include <common.h>
#include <command.h>
#include <rtc.h>
#ifdef MV_INCLUDE_RTC
#include "rtc/integ_rtc/mvRtc.h"
#elif defined(CONFIG_RTC_DS1338_DS1339)
#include "rtc/ext_rtc/mvDS133x.h"
#endif
#if (CONFIG_COMMANDS & CFG_CMD_DATE)
/* since this rtc dosen't support century we will use 20 as default */
#define CENTURY 20
void rtc_get( struct rtc_time *tmp )
{
MV_RTC_TIME time;
#ifdef MV_INCLUDE_RTC
mvRtcTimeGet(&time);
#elif defined(CONFIG_RTC_DS1338_DS1339)
mvRtcDS133xTimeGet(&time);
#endif
tmp->tm_year = (CENTURY * 100) + time.year;
tmp->tm_mon = time.month;
tmp->tm_mday = time.date;
tmp->tm_wday = time.day;
tmp->tm_hour = time.hours;
tmp->tm_min = time.minutes;
tmp->tm_sec = time.seconds;
tmp->tm_yday = 0;
tmp->tm_isdst= 0;
#ifdef RTC_DEBUG
printf( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec );
#endif
}
void rtc_set( struct rtc_time *tmp )
{
MV_RTC_TIME time;
#ifdef RTC_DEBUG
printf( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
#endif
time.month = tmp->tm_mon;
time.date = tmp->tm_mday;
time.day = tmp->tm_wday;
time.hours = tmp->tm_hour;
time.minutes = tmp->tm_min;
time.seconds = tmp->tm_sec;
if((tmp->tm_year/100) != CENTURY)
printf("Warning: century isn't supported to be set(always %d) \n",CENTURY);
time.year = tmp->tm_year%100;
#ifdef MV_INCLUDE_RTC
mvRtcTimeSet(&time);
#elif defined(CONFIG_RTC_DS1338_DS1339)
mvRtcDS133xTimeSet(&time);
#endif
}
void rtc_reset (void)
{
/* No need for init in any of the devices */
/* The OSC enable bit in the DS1338 is clear at the first date set */
}
#endif /* CFG_CMD_DATE */

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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
/*
* serial.c - serial support.
*/
#include <common.h>
#include <command.h>
#include "uart/mvUart.h"
#if defined(MV78XX0)
extern unsigned int whoAmI(void);
#endif
extern void print_mvBanner(void);
extern void print_dev_id(void);
int serial_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
#if defined(MV78XX0)
if (whoAmI() == MASTER_CPU)
#endif
{
int clock_divisor = (CFG_TCLK / 16)/gd->baudrate;
#ifdef QNAPNAS
int clock_divisor2 = (CFG_TCLK / 16) / 19200;
#endif /* QNAPNAS */
#ifdef CFG_INIT_CHAN1
mvUartInit(0, clock_divisor, mvUartBase(0));
#endif
#ifdef CFG_INIT_CHAN2
/* Richard Chen 20090105, Initiate PIC */
# ifdef QNAPNAS
mvUartInit(1, clock_divisor2, mvUartBase(1));
# else
mvUartInit(1, clock_divisor, mvUartBase(1));
# endif /* QNAPNAS */
#endif
}
/* print banner */
print_mvBanner();
print_dev_id();
return (0);
}
void
serial_putc(const char c)
{
#if defined(CONFIG_MV_SMP) || (defined(MV78XX0) && defined(MV78200))
if (c == '\n')
mvUartPutc((whoAmI())%2, '\r');
mvUartPutc((whoAmI())%2, c);
#else
if (c == '\n')
mvUartPutc(CFG_DUART_CHAN, '\r');
mvUartPutc(CFG_DUART_CHAN, c);
#endif
}
int
serial_getc(void)
{
#if defined(CONFIG_MV_SMP) || (defined(MV78XX0) && defined(MV78200))
return mvUartGetc((whoAmI())%2);
#else
return mvUartGetc(CFG_DUART_CHAN);
#endif
}
int
serial_tstc(void)
{
#if defined(CONFIG_MV_SMP) || (defined(MV78XX0) && defined(MV78200))
return mvUartTstc((whoAmI())%2);
#else
return mvUartTstc(CFG_DUART_CHAN);
#endif
}
void
serial_setbrg (void)
{
DECLARE_GLOBAL_DATA_PTR;
int clock_divisor = (CFG_TCLK / 16)/gd->baudrate;
#ifdef CFG_INIT_CHAN1
mvUartInit(0, clock_divisor, mvUartBase(0));
#endif
#ifdef CFG_INIT_CHAN2
mvUartInit(1, clock_divisor, mvUartBase(1));
#endif
}
void
serial_puts (const char *s)
{
while (*s) {
serial_putc (*s++);
}
}
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
void
kgdb_serial_init(void)
{
}
void
putDebugChar (int c)
{
serial_putc (c);
}
void
putDebugStr (const char *str)
{
serial_puts (str);
}
int
getDebugChar (void)
{
return serial_getc();
}
void
kgdb_interruptible (int yes)
{
return;
}
#endif /* CFG_CMD_KGDB */

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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
#include <config.h>
#include <common.h>
#include <command.h>
#include "mvOs.h"
#include "mvCommon.h"
#include "mvDebug.h"
#include "mvBoardEnvSpec.h"
#include "mvUsb.h"
#include "mvUsbDevApi.h"
#include "disk.h"
#include "mouse.h"
#define USB_DISK_DEFAULT_SIZE 2048
extern MV_U32 mvUsbGetCapRegAddr(int devNo);
typedef struct
{
_usb_device_handle handle;
MV_BOOL isMouse;
int gppNo;
} MV_USB_DEVICE;
MV_BOOL mvUsbIsFirst = MV_TRUE;
MV_USB_DEVICE mvUsbDevice[MV_BOARD_MAX_USB_IF];
USB_IMPORT_FUNCS usbImportFuncs =
{
printf,
mvOsSPrintf,
mvOsIoUncachedMalloc,
mvOsIoUncachedFree,
mvOsMalloc,
mvOsFree,
memset,
memcpy,
mvOsCacheFlush,
mvOsCacheInvalidate,
mvOsIoVirtToPhy,
NULL,
NULL,
mvUsbGetCapRegAddr,
NULL
};
static void print_args(int argc, char** argv)
{
int i;
for(i=0; i<argc; i++)
{
mvOsPrintf("argv[%d]=%s, ", i, argv[i]);
}
mvOsPrintf("\n");
}
static void mvUsbDevsInit(void)
{
int dev;
for(dev=0; dev<mvCtrlUsbMaxGet(); dev++)
{
mvUsbDevice[dev].handle = NULL;
mvUsbDevice[dev].gppNo = -1;
mvUsbDevice[dev].isMouse = MV_FALSE;
mvUsbInit(dev, MV_FALSE);
#ifdef MV_USB_VOLTAGE_FIX
mvUsbDevice[dev].gppNo = mvUsbGppInit(dev);
#endif /* MV_USB_VOLTAGE_FIX */
}
/* First of all. */
_usb_device_set_bsp_funcs(&usbImportFuncs);
}
static void mvUsbPolling(void)
{
int dev, counter = 0;
mvOsPrintf("Start USB ISR polling:");
for(dev=0; dev<mvCtrlUsbMaxGet(); dev++)
{
mvOsPrintf(" dev-%d - handle=%p\n", dev, mvUsbDevice[dev].handle);
}
mvOsPrintf("\n");
while (TRUE)
{
counter++;
for(dev=0; dev<mvCtrlUsbMaxGet(); dev++)
{
if(mvUsbDevice[dev].handle == NULL)
continue;
#ifdef MV_USB_VOLTAGE_FIX
/* Polling VBUS */
if(mvUsbDevice[dev].gppNo != -1)
mvUsbBackVoltageUpdate(dev, mvUsbDevice[dev].gppNo);
#endif /* MV_USB_VOLTAGE_FIX */
/* Polling USB interrupts */
_usb_dci_vusb20_isr(mvUsbDevice[dev].handle);
if(mvUsbDevice[dev].isMouse)
{
if (counter >= 1000000)
{ /* Body */
usbMousePeriodicResume(mvUsbDevice[dev].handle);
}
} /* Endbody */
}
if( (counter & 0xFFFFF) == 0)
mvOsPrintf(".");
if (ctrlc())
{
puts ("\nAbort\n");
return;
}
} /* Endwhile */
}
static void mvUsbUnload(int dev)
{
if(mvUsbDevice[dev].handle == NULL)
{
mvOsPrintf("USB-%d Device is not loaded\n", dev);
return;
}
mvOsPrintf("Unload USB=%d Device: handle=%p\n",
dev, mvUsbDevice[dev].handle);
if(mvUsbDevice[dev].isMouse)
{
usbMouseUnload(mvUsbDevice[dev].handle);
}
else
{
usbDiskUnload(mvUsbDevice[dev].handle);
}
mvUsbDevice[dev].handle = NULL;
mvUsbDevice[dev].gppNo = -1;
mvUsbDevice[dev].isMouse = MV_FALSE;
}
static void mvUsbDisk(int dev, int diskSize)
{
if(mvUsbDevice[dev].handle != NULL)
{
mvOsPrintf("USB-%d device already in use\n", dev);
return;
}
if(diskSize == 0)
diskSize = USB_DISK_DEFAULT_SIZE;
mvOsPrintf("Load USB-%d Disk example: disk size is %d Kbytes\n",
dev, diskSize);
mvUsbDevice[dev].handle = usbDiskLoad(dev, diskSize);
if(mvUsbDevice[dev].handle == NULL)
{
mvOsPrintf("usbDiskLoad-%d FAILED\n", dev);
return;
}
mvUsbPolling();
}
static void mvUsbMouse(int dev)
{
if(mvUsbDevice[dev].handle != NULL)
{
mvOsPrintf("USB-%d device is already in use\n", dev);
return;
}
mvOsPrintf("Load USB-%d Mouse example\n", dev);
mvUsbDevice[dev].handle = usbMouseLoad(dev);
if(mvUsbDevice[dev].handle == NULL)
{
mvOsPrintf("usbMouseLoad-%d FAILED\n", dev);
return;
}
mvUsbDevice[dev].isMouse = MV_TRUE;
mvUsbPolling();
}
int mvUsbCmdMain(int argc, char *argv[])
{
_usb_device_handle handle = NULL;
int i, mode, dev;
if(mvUsbIsFirst == MV_TRUE)
{
mvUsbDevsInit();
mvUsbIsFirst = MV_FALSE;
}
if(argc <= 1)
{
mvOsPrintf("usbTest: not enough parameters\n");
return 2;
}
print_args(argc, argv);
if(memcmp(argv[1], "flags", strlen(argv[1])) == 0)
{
mvOsPrintf("USB old debug flags = 0x%x\n", _usb_debug_get_flags());
if(argc > 2)
{
mode = strtol(argv[2], NULL, 16);
_usb_debug_set_flags(mode);
mvOsPrintf("USB new debug flags = 0x%x\n", _usb_debug_get_flags());
}
return 0;
}
if(memcmp(argv[1], "poll", strlen(argv[1])) == 0)
{
mvUsbPolling();
return 0;
}
dev = 0;
if(argc > 2)
dev = strtol(argv[2], NULL, 10);
handle = mvUsbDevice[dev].handle;
if(handle == NULL)
{
mvOsPrintf("USB Device core is not initialized\n");
return 3;
}
if(memcmp(argv[1], "show", strlen(argv[1])) == 0)
{
mode = 0;
if(argc > 3)
mode = strtol(argv[3], NULL, 16);
if( MV_BIT_CHECK(mode, 0) )
_usb_regs(handle);
if( MV_BIT_CHECK(mode, 1) )
_usb_status(handle);
if( MV_BIT_CHECK(mode, 2) )
_usb_stats(handle);
if( MV_BIT_CHECK(mode, 3) )
_usb_debug_print_trace_log();
for(i=0; i<_usb_device_get_max_endpoint(handle); i++)
{
if( MV_BIT_CHECK(mode, (8+i)) )
{
_usb_ep_status(handle, i, ARC_USB_RECV);
_usb_ep_status(handle, i, ARC_USB_SEND);
}
}
return 0;
}
if(memcmp(argv[1], "test", strlen(argv[1])) == 0)
{
/* Set Test mode */
mode = 0;
if(argc > 3)
mode = strtol(argv[3], NULL, 10);
mvOsPrintf("USB test: set test mode %d\n", mode);
_usb_dci_vusb20_set_test_mode(handle, (mode & 0x7) << 8);
return 0;
}
mvOsPrintf("USB test: Unexpected command %s\n", argv[1]);
return 3;
}
int mvUsbDevMain(int argc, char *argv[])
{
int dev, diskSize = 0;
if(mvUsbIsFirst == MV_TRUE)
{
mvUsbDevsInit();
mvUsbIsFirst = MV_FALSE;
}
dev = strtol(argv[1], NULL, 10);
if(memcmp(argv[2], "disk", strlen(argv[2])) == 0)
{
if(argc > 3)
diskSize = strtol(argv[3], NULL, 10);
mvUsbDisk(dev, diskSize);
return 0;
}
if(memcmp(argv[2], "mouse", strlen(argv[2])) == 0)
{
mvUsbMouse(dev);
return 0;
}
if( memcmp(argv[2], "unload", strlen(argv[2])) == 0)
{
mvUsbUnload(dev);
return 0;
}
mvOsPrintf("usbDev unknown command\n");
return 1;
}
int mvUsbCmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
if( (argc == 0) || (argc == 1) )
{
mvOsPrintf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
return mvUsbCmdMain(argc, argv);
}
int mvUsbDev(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
if(argc < 2)
{
mvOsPrintf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
return mvUsbDevMain(argc, argv);
}
U_BOOT_CMD(
usbCmd, 4, 1, mvUsbCmd,
"usbCmd - USB Device sub-system\n",
"\n"
"\t usbCmd flags [mask] - Get/Set debug flags\n"
"\t usbCmd poll - Polling IRQs for all USB devices for never\n"
"\t usbCmd show <devId> [mask] - Print out USB device information\n"
"\t usbCmd test <devId> [mode] - Set USB device to test mode\n"
);
U_BOOT_CMD(
usbDev, 5, 0, mvUsbDev,
"usbDev - Load/Unload USB Devices\n",
"\t usbDev <devId> disk [kBytes] - Load USB Disk device\n"
"\t usbDev <devId> mouse - Load USB Mouse device\n"
"\t usbDev <devId> unload - Unload USB device\n"
);

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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
#include <config.h>
#include <common.h>
#include <command.h>
#include "mvOs.h"
#include "mvDebug.h"
#include "mvBoardEnvSpec.h"
#include "mvCtrlEnvLib.h"
#include "mvUsbHostApi.h"
extern USB_HOST_STATE_STRUCT_PTR usb_host_state_struct_ptr;
extern void _usb_hci_vusb20_isr(void);
extern void hidMouseMain(void);
static void print_args(int argc, char** argv)
{
int i;
for(i=0; i<argc; i++)
{
mvOsPrintf("argv[%d]=%s, ", i, argv[i]);
}
mvOsPrintf("\n");
}
int mvUsbHostMain(int argc, char *argv[])
{
int i, mode;
unsigned char error;
USB_STATUS status;
_usb_host_handle host_handle;
if(argc <= 1)
{
mvOsPrintf("usbTest: not enough parameters\n");
return 2;
}
print_args(argc, argv);
ARC_INIT_DEBUG_TRACE();
ARC_START_DEBUG_TRACE(ARC_DEBUG_FLAG_STALL
| ARC_DEBUG_FLAG_ERROR
| ARC_DEBUG_FLAG_RESET
| ARC_DEBUG_FLAG_ISR
| ARC_DEBUG_FLAG_SETUP
| ARC_DEBUG_FLAG_RX | ARC_DEBUG_FLAG_TX
| ARC_DEBUG_FLAG_ADDR);
if( (usb_host_state_struct_ptr == NULL) &&
(memcmp(argv[1], "load", strlen(argv[1])) == 0) )
{
MV_REG_WRITE(MV_USB_CORE_MODE_REG, 0x3);
status = _usb_host_init(0, 1024, &host_handle);
if (status != USB_OK)
{
printf("\nUSB Host Initialization failed. STATUS: %x", status);
} /* Endif */
mvOsPrintf("USB HOST core is initialized\n");
return 0;
}
if( (usb_host_state_struct_ptr != NULL) &&
(memcmp(argv[1], "show", strlen(argv[1])) == 0))
{
mode = 0;
if(argc > 2)
mode = strtol(argv[2], NULL, 16);
if( MV_BIT_CHECK(mode, 3) )
ARC_PRINT_DEBUG_TRACE();
return 0;
}
if( (usb_host_state_struct_ptr != NULL) &&
(memcmp(argv[1], "poll", strlen(argv[1])) == 0))
{
i = 0;
while(TRUE)
{
if( (i & 0xFFFFF) == 0)
{
mvOsPrintf(".");
}
_usb_hci_vusb20_isr();
i++;
if (ctrlc())
{
puts ("\nAbort\n");
return 0;
}
}
mvOsPrintf("\n");
return 0;
}
if( (usb_host_state_struct_ptr == NULL) &&
(memcmp(argv[1], "mouse", strlen(argv[1])) == 0))
{
mvOsPrintf("Start hidmouse driver\n");
MV_REG_WRITE(MV_USB_CORE_MODE_REG, 0x3);
hidMouseMain();
return 0;
}
mvOsPrintf("USB test: Unexpected command %s\n", argv[1]);
return 3;
}
int mvUsbHost(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
if( (argc == 0) || (argc == 1) )
{
mvOsPrintf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
mvUsbHostMain(argc, argv);
return 1;
}
U_BOOT_CMD(
usbHost, 5, 0, mvUsbHost,
"usbHost - USB Host specific commands\n",
"\t usbHost mouse <1 | 0> - Load/Unload USB HID mouse driver\n"
"\t usbHost show [mask] - Print out all USB information\n"
);

253
board/mv_feroceon/USP/nBootloader.c Normal file
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/*
* (C) Copyright 2006
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <nand.h>
#include "cntmr/mvCntmr.h"
#include "uart/mvUart.h"
#include "nBootstrap.h"
#include <asm/io.h>
#define CFG_NAND_READ_DELAY \
{ volatile int dummy; int i; for (i=0; i<10000; i++) dummy = i; }
typedef void (*VOIDFUNCPTR) (void); /* ptr to function returning void */
extern void board_nand_init(struct nand_chip *nand);
extern void mv_nand_hwcontrol(struct mtd_info *mtdinfo, int cmd);
static void mv_nand_write_byte(struct mtd_info *mtd, u_char byte);
static u_char mv_nand_read_byte(struct mtd_info *mtd);
static int nand_is_bad_block(struct mtd_info *mtd, int block)
{
struct nand_chip *this = mtd->priv;
int page_addr = block * CFG_NAND_PAGE_COUNT;
/* Begin command latch cycle */
this->hwcontrol(mtd, NAND_CTL_SETCLE);
#ifdef MV_LARGE_PAGE
this->write_byte(mtd, NAND_CMD_READ0);
#else
this->write_byte(mtd, NAND_CMD_READOOB);
#endif
/* Set ALE and clear CLE to start address cycle */
this->hwcontrol(mtd, NAND_CTL_CLRCLE);
this->hwcontrol(mtd, NAND_CTL_SETALE);
#ifdef MV_LARGE_PAGE
/* Column address */
this->write_byte(mtd, CFG_NAND_BAD_BLOCK_POS); /* A[7:0] */
this->write_byte(mtd, 8); /* A[11:8] */
/* Row address */
this->write_byte(mtd, (uchar)(page_addr & 0xff)); /* A[19:12] */
this->write_byte(mtd, (uchar)((page_addr >> 8) & 0xff)); /* A[27:20] */
this->write_byte(mtd, (uchar)((page_addr >> 16) & 0x03)); /* A[29:28] */
#else
/* Column address */
this->write_byte(mtd, CFG_NAND_BAD_BLOCK_POS); /* A[7:0] */
/* Row address */
this->write_byte(mtd, (uchar)(page_addr & 0xff)); /* A[16:9] */
this->write_byte(mtd, (uchar)((page_addr >> 8) & 0xff)); /* A[24:17] */
#endif
/* Latch in address */
this->hwcontrol(mtd, NAND_CTL_CLRALE);
#ifdef MV_LARGE_PAGE
/* Set command latch cycle */
this->hwcontrol(mtd, NAND_CTL_SETCLE);
this->write_byte(mtd, NAND_CMD_READSTART);
/* Clear CLE to latch command cycle */
this->hwcontrol(mtd, NAND_CTL_CLRCLE);
#endif
/*
* Wait a while for the data to be ready
*/
if (this->dev_ready)
this->dev_ready(mtd);
else
CFG_NAND_READ_DELAY;
/*
* Read on byte
*/
if (this->read_byte(mtd) != 0xff)
return 1;
return 0;
}
static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
{
struct nand_chip *this = mtd->priv;
int page_addr = page + block * CFG_NAND_PAGE_COUNT;
int i;
/* Begin command latch cycle */
this->hwcontrol(mtd, NAND_CTL_SETCLE);
this->write_byte(mtd, NAND_CMD_READ0);
/* Set ALE and clear CLE to start address cycle */
this->hwcontrol(mtd, NAND_CTL_CLRCLE);
this->hwcontrol(mtd, NAND_CTL_SETALE);
#ifdef MV_LARGE_PAGE
/* Column address */
this->write_byte(mtd, 0); /* A[7:0] */
this->write_byte(mtd, 0); /* A[11:8] */
/* Row address */
this->write_byte(mtd, (uchar)(page_addr & 0xff)); /* A[19:12] */
this->write_byte(mtd, (uchar)((page_addr >> 8) & 0xff)); /* A[27:20] */
this->write_byte(mtd, (uchar)((page_addr >> 16) & 0x03)); /* A[29:28] */
#else
/* Column address */
this->write_byte(mtd, 0); /* A[7:0] */
/* Row address */
this->write_byte(mtd, (uchar)(page_addr & 0xff)); /* A[16:9] */
this->write_byte(mtd, (uchar)((page_addr >> 8) & 0xff)); /* A[24:17] */
#endif
/* Latch in address */
this->hwcontrol(mtd, NAND_CTL_CLRALE);
#ifdef MV_LARGE_PAGE
/* End command latch cycle */
this->hwcontrol(mtd, NAND_CTL_SETCLE);
this->write_byte(mtd, NAND_CMD_READSTART);
/* Set clear CLE to start address cycle */
this->hwcontrol(mtd, NAND_CTL_CLRCLE);
#endif
/*
* Wait a while for the data to be ready
*/
if (this->dev_ready)
this->dev_ready(mtd);
else
CFG_NAND_READ_DELAY;
/*
* Read page into buffer
*/
for (i=0; i<CFG_NAND_PAGE_SIZE; i++)
*dst++ = this->read_byte(mtd);
return 0;
}
static int nand_load(struct mtd_info *mtd, int offs, int uboot_size, uchar *dst)
{
int block;
int blockcopy_count;
int page;
/*
* offs has to be aligned to a block address!
*/
block = offs / CFG_NAND_BLOCK_SIZE;
blockcopy_count = 0;
while (blockcopy_count < (uboot_size / CFG_NAND_BLOCK_SIZE)) {
if (!nand_is_bad_block(mtd, block)) {
/*
* Skip bad blocks
*/
for (page = 0; page < CFG_NAND_PAGE_COUNT; page++) {
nand_read_page(mtd, block, page, dst);
dst += CFG_NAND_PAGE_SIZE;
}
blockcopy_count++;
}
block++;
/* End of NAND device */
if (block >= NUM_BLOCKS)
return -1;
}
return 0;
}
void nand_boot(void)
{
ulong mem_size;
struct nand_chip nand_chip;
nand_info_t nand_info;
int ret;
/*
* DRAM was init in nBootstrap.S so we have access to memory
*/
mem_size = 0x08000000;
/*
* Init board specific nand support
*/
nand_info.priv = &nand_chip;
nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CFG_NAND_BASE;
nand_chip.dev_ready = NULL; /* preset to NULL */
board_nand_init(&nand_chip);
/* Add write and read byte functions */
nand_chip.write_byte = mv_nand_write_byte;
nand_chip.read_byte = mv_nand_read_byte;
/*
* Load U-Boot image from NAND into RAM
*/
ret = nand_load(&nand_info, CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE,
(uchar *)CFG_NAND_U_BOOT_DST);
if (ret != 0)
/* Error reading NAND */
while(1);
/*
* Jump to U-Boot image
*/
#if defined(MV_LARGE_PAGE)
VOIDFUNCPTR ubootStart = (VOIDFUNCPTR)(CFG_NAND_U_BOOT_START + 0x90000);
#else
VOIDFUNCPTR ubootStart = (VOIDFUNCPTR)(CFG_NAND_U_BOOT_START + 0x90000);
#endif
(*ubootStart)();
}
/**
* mv_nand_read_byte - [DEFAULT] read one byte to the chip
* @mtd: MTD device structure
* @byte: pointer to data byte to write
*
* Default read function for 8it buswith
*/
static u_char mv_nand_read_byte(struct mtd_info *mtd)
{
struct nand_chip *this = mtd->priv;
return readb(this->IO_ADDR_R);
}
/**
* nand_write_byte - [DEFAULT] write one byte to the chip
* @mtd: MTD device structure
* @byte: pointer to data byte to write
*
* Default write function for 8it buswith
*/
static void mv_nand_write_byte(struct mtd_info *mtd, u_char byte)
{
struct nand_chip *this = mtd->priv;
writeb(byte, this->IO_ADDR_W);
}

574
board/mv_feroceon/USP/sdio/mmc.c Normal file
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/*
* (C) Copyright 2003
* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <common.h>
#include "mustang_sdiodef.h"
#include <mmc.h>
#include <asm/errno.h>
#include <part.h>
#include "mvOs.h"
#ifdef CONFIG_MMC
#define DELAY 50
//#define debug printf
extern int
fat_register_device(block_dev_desc_t *dev_desc, int part_no);
static block_dev_desc_t mmc_dev;
block_dev_desc_t * mmc_get_dev(int dev)
{
return ((block_dev_desc_t *)&mmc_dev);
}
/*
* FIXME needs to read cid and csd info to determine block size
* and other parameters
*/
static uchar mmc_buf[MMC_BLOCK_SIZE];
static mmc_csd_t mmc_csd;
static int mmc_ready = 0;
static int rca ;
static uchar *
/****************************************************/
mmc_cmd(ulong cmd, ulong arg, ushort xfermode, ushort resptype, ushort waittype)
/****************************************************/
{
static ulong resp[4];
int count ;
ushort done ;
int err = 0 ;
debug("mmc_cmd %x, arg: %x,xfer: %x,resp: %x, wait : %x\n", cmd, arg, xfermode, resptype, waittype);
//clear status
SDIO_REG_WRITE16(SDIO_ERR_INTR_EN, SDIO_REG_READ16(SDIO_ERR_INTR_STATUS));
SDIO_REG_WRITE16(SDIO_NOR_INTR_EN, SDIO_REG_READ16(SDIO_NOR_INTR_STATUS));
//disable interrupts
SDIO_REG_WRITE16(SDIO_NOR_INTR_EN, 0);
SDIO_REG_WRITE16(SDIO_ERR_INTR_EN, 0);
udelay(2000);
/* count = 10000 ;
while((SDIO_REG_READ16(SDIO_PRESENT_STATE0) & CARD_BUSY)) {
udelay(DELAY);
if (--count <= 0 ) {
// card busy, can't sent cmd
printf("card too busy \n");
return 0;
}
}
*/
SDIO_REG_WRITE16(SDIO_ARG_LOW, (ushort)(arg&0xffff) );
SDIO_REG_WRITE16(SDIO_ARG_HI, (ushort)(arg>>16) );
SDIO_REG_WRITE16(SDIO_XFER_MODE, xfermode);
if( (cmd == MMC_CMD_READ_BLOCK) || (cmd == 25) )
{
SDIO_REG_WRITE16(SDIO_CMD, ((cmd << 8) | resptype | 0x3c ) );
debug("cmd reg : %x\n", SDIO_REG_READ16( SDIO_CMD )) ;
}
else
{
SDIO_REG_WRITE16(SDIO_CMD, ((cmd << 8) | resptype ) );
}
done = SDIO_REG_READ16(SDIO_NOR_INTR_STATUS) & waittype;
count = 10000 ;
while( done!=waittype)
{
// udelay(DELAY);
udelay(2000);
done = SDIO_REG_READ16(SDIO_NOR_INTR_STATUS) & waittype;
/* if( SDIO_REG_READ16(SDIO_NOR_INTR_STATUS) & 0x8000 )
{
printf("Error! cmd : %d, err : %x\n", cmd, SDIO_REG_READ16(SDIO_ERR_INTR_STATUS) ) ;
return 0 ; // error happen
}
if( --count <= 0 )
{
debug("cmd timeout, status : %x\n", SDIO_REG_READ16(SDIO_NOR_INTR_STATUS));
debug("xfer mode : %x\n", SDIO_REG_READ16(SDIO_XFER_MODE));
err = 1 ;
break;
//return 0 ;
}
*/
}
// write clear the status
SDIO_REG_WRITE16(SDIO_NOR_INTR_STATUS, waittype);
//SDIO_REG_WRITE16(SDIO_NOR_INTR_EN, SDIO_REG_READ16(SDIO_NOR_INTR_STATUS));
switch (resptype & 0x3) {
case SDIO_CMD_RSP_48:
case SDIO_CMD_RSP_48BUSY:
resp[0] = ( SDIO_REG_READ16(SDIO_RSP0) << (16+6)) |
(SDIO_REG_READ16(SDIO_RSP1) << 6) |
((SDIO_REG_READ16(SDIO_RSP2))& 0x3f) ;
break;
case SDIO_CMD_RSP_136:
resp[0] = ( SDIO_REG_READ16(SDIO_RSP5) << (16+14)) |
(SDIO_REG_READ16(SDIO_RSP6) << 14) |
((SDIO_REG_READ16(SDIO_RSP7))& 0x3fff) ;
resp[1] = ( SDIO_REG_READ16(SDIO_RSP3) << (16+14)) |
(SDIO_REG_READ16(SDIO_RSP4) << 14) |
((SDIO_REG_READ16(SDIO_RSP5)>> 2 )& 0x3fff) ;
resp[2] = ( SDIO_REG_READ16(SDIO_RSP1) << (16+14)) |
(SDIO_REG_READ16(SDIO_RSP2) << 14) |
((SDIO_REG_READ16(SDIO_RSP3)>> 2 )& 0x3fff) ;
resp[3] = (SDIO_REG_READ16(SDIO_RSP0) << 14) |
((SDIO_REG_READ16(SDIO_RSP1)>> 2 )& 0x3fff) ;
break;
default:
return 0;
}
#ifdef MMC_DEBUG
int i;
printf("MMC resp :");
for (i=0; i<4; ++i ) {
printf(" %08x", resp[i]);
}
printf("\n");
#endif
if( err )
return 0 ;
else
return (uchar*)resp;
}
int
/****************************************************/
mmc_block_read(uchar *dst, ulong src, ulong len)
/****************************************************/
{
uchar *resp;
//ushort argh, argl;
//ulong status;
if (len == 0) {
return 0;
}
debug("mmc_block_rd dst %lx src %lx len %d\n", (ulong)dst, src, len);
//mmc_cmd(ulong cmd, ulong arg, ushort xfermode, ushort resptype, ushort waittype);
/* set block len */
resp = mmc_cmd(MMC_CMD_SET_BLOCKLEN, len, 0, SDIO_CMD_RSP_48, SDIO_NOR_CMD_DONE );
// prepare for dma transfer
//SDIO_REG_WRITE16(SDIO_SYS_ADDR_LOW,((ulong)(dst)>>16)&0xffff);
SDIO_REG_WRITE16(SDIO_SYS_ADDR_LOW,((ulong)(dst))&0xffff);
//SDIO_REG_WRITE16(SDIO_SYS_ADDR_HI,((ulong)(dst))&0xffff);
SDIO_REG_WRITE16(SDIO_SYS_ADDR_HI,(0x8000 | ((ulong)(dst)>>16)&0xffff));
SDIO_REG_WRITE16(SDIO_BLK_SIZE,len);
SDIO_REG_WRITE16(SDIO_BLK_COUNT,1);
/* send read command */
resp = mmc_cmd(MMC_CMD_READ_BLOCK, src, 0x10 , // 0x12,
SDIO_CMD_RSP_48, SDIO_NOR_DMA_INI);
return 0;
}
int
/****************************************************/
mmc_block_write(ulong dst, uchar *src, int len)
/****************************************************/
{
//uchar *resp;
//ushort argh, argl;
//ulong status;
return -1 ;
#if 0
if (len == 0) {
return 0;
}
debug("mmc_block_wr dst %lx src %lx len %d\n", dst, (ulong)src, len);
argh = len >> 16;
argl = len & 0xffff;
/* set block len */
resp = mmc_cmd(MMC_CMD_SET_BLOCKLEN, argh, argl, MMC_CMDAT_R1);
/* send write command */
argh = dst >> 16;
argl = dst & 0xffff;
MMC_STRPCL = MMC_STRPCL_STOP_CLK;
MMC_NOB = 1;
MMC_BLKLEN = len;
resp = mmc_cmd(MMC_CMD_WRITE_BLOCK, argh, argl,
MMC_CMDAT_R1|MMC_CMDAT_WRITE|MMC_CMDAT_BLOCK|MMC_CMDAT_DATA_EN);
MMC_I_MASK = ~MMC_I_MASK_TXFIFO_WR_REQ;
while (len) {
if (MMC_I_REG & MMC_I_REG_TXFIFO_WR_REQ) {
int i, bytes = min(32,len);
for (i=0; i<bytes; i++) {
MMC_TXFIFO = *src++;
}
if (bytes < 32) {
MMC_PRTBUF = MMC_PRTBUF_BUF_PART_FULL;
}
len -= bytes;
}
status = MMC_STAT;
if (status & MMC_STAT_ERRORS) {
printf("MMC_STAT error %lx\n", status);
return -1;
}
}
MMC_I_MASK = ~MMC_I_MASK_DATA_TRAN_DONE;
while (!(MMC_I_REG & MMC_I_REG_DATA_TRAN_DONE));
MMC_I_MASK = ~MMC_I_MASK_PRG_DONE;
while (!(MMC_I_REG & MMC_I_REG_PRG_DONE));
status = MMC_STAT;
if (status & MMC_STAT_ERRORS) {
printf("MMC_STAT error %lx\n", status);
return -1;
}
return 0;
#endif
}
int
/****************************************************/
mmc_read(ulong src, uchar *dst, int size)
/****************************************************/
{
ulong end, part_start, part_end, part_len, aligned_start, aligned_end;
ulong mmc_block_size, mmc_block_address;
if (size == 0) {
return 0;
}
if (!mmc_ready) {
printf("Please initial the MMC first\n");
return -1;
}
mmc_block_size = MMC_BLOCK_SIZE;
mmc_block_address = ~(mmc_block_size - 1);
src -= CFG_MMC_BASE;
end = src + size;
part_start = ~mmc_block_address & src;
part_end = ~mmc_block_address & end;
aligned_start = mmc_block_address & src;
aligned_end = mmc_block_address & end;
/* all block aligned accesses */
debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
if (part_start) {
part_len = mmc_block_size - part_start;
debug("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < 0) {
return -1;
}
memcpy(dst, mmc_buf+part_start, part_len);
dst += part_len;
src += part_len;
}
debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
for (; src < aligned_end; aligned_start +=mmc_block_size/4, src += mmc_block_size/4, dst += mmc_block_size/4) {
debug("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
//if ((mmc_block_read((uchar *)(dst), src, mmc_block_size)) < 0) {
if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size/4)) < 0) {
// if ((mmc_block_read((uchar*)0x2000000, aligned_start, mmc_block_size)) < 0) {
printf("mmc block read error\n");
return -1;
}
//printf("mem copy from %x to %x, size %d\n", (ulong)mmc_buf, (ulong)dst, mmc_block_size );
memcpy(dst, mmc_buf, mmc_block_size/4);
}
debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
if (part_end && src < end) {
debug("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0) {
return -1;
}
memcpy(dst, mmc_buf, part_end);
}
return 0;
}
int
/****************************************************/
mmc_write(uchar *src, ulong dst, int size)
/****************************************************/
{
ulong end, part_start, part_end, part_len, aligned_start, aligned_end;
ulong mmc_block_size, mmc_block_address;
if (size == 0) {
return 0;
}
if (!mmc_ready) {
printf("Please initial the MMC first\n");
return -1;
}
mmc_block_size = MMC_BLOCK_SIZE;
mmc_block_address = ~(mmc_block_size - 1);
dst -= CFG_MMC_BASE;
end = dst + size;
part_start = ~mmc_block_address & dst;
part_end = ~mmc_block_address & end;
aligned_start = mmc_block_address & dst;
aligned_end = mmc_block_address & end;
/* all block aligned accesses */
debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
if (part_start) {
part_len = mmc_block_size - part_start;
debug("ps src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
(ulong)src, dst, end, part_start, part_end, aligned_start, aligned_end);
if ((mmc_block_read(mmc_buf, aligned_start, mmc_block_size)) < 0) {
return -1;
}
memcpy(mmc_buf+part_start, src, part_len);
if ((mmc_block_write(aligned_start, mmc_buf, mmc_block_size)) < 0) {
return -1;
}
dst += part_len;
src += part_len;
}
debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
for (; dst < aligned_end; src += mmc_block_size, dst += mmc_block_size) {
debug("al src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
if ((mmc_block_write(dst, (uchar *)src, mmc_block_size)) < 0) {
return -1;
}
}
debug("src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
if (part_end && dst < end) {
debug("pe src %lx dst %lx end %lx pstart %lx pend %lx astart %lx aend %lx\n",
src, (ulong)dst, end, part_start, part_end, aligned_start, aligned_end);
if ((mmc_block_read(mmc_buf, aligned_end, mmc_block_size)) < 0) {
return -1;
}
memcpy(mmc_buf, src, part_end);
if ((mmc_block_write(aligned_end, mmc_buf, mmc_block_size)) < 0) {
return -1;
}
}
return 0;
}
ulong
/****************************************************/
mmc_bread(int dev_num, ulong blknr, ulong blkcnt, ulong *dst)
/****************************************************/
{
int mmc_block_size = MMC_BLOCK_SIZE;
ulong src = blknr * mmc_block_size + CFG_MMC_BASE;
mmc_read(src, (uchar *)dst, blkcnt*mmc_block_size);
return blkcnt;
}
int
/****************************************************/
mmc_init(int verbose)
/****************************************************/
{
int retries, rc = -ENODEV;
uchar *resp;
uchar scrs[16] ;
// Initial Host Ctrl : Timeout : max , Normal Speed mode, 4-bit data mode
// Big Endian, SD memory Card, Push_pull CMD Line
SDIO_REG_WRITE16(SDIO_HOST_CTRL,
( 0xf << SDIO_HOST_CTRL_TMOUT_SHIFT ) |
SDIO_HOST_CTRL_DATA_WIDTH_4_BITS |
SDIO_HOST_CTRL_BIG_ENDAN |
SDIO_HOST_CTRL_PUSH_PULL_EN |
SDIO_HOST_CTRL_CARD_TYPE_MEM_ONLY );
SDIO_REG_WRITE16(SDIO_CLK_CTRL, 0);
//enable status
SDIO_REG_WRITE16(SDIO_NOR_STATUS_EN, 0xffff);
SDIO_REG_WRITE16(SDIO_ERR_STATUS_EN, SDIO_ERR_INTR_MASK);
//disable interrupts
SDIO_REG_WRITE16(SDIO_NOR_INTR_EN, 0);
SDIO_REG_WRITE16(SDIO_ERR_INTR_EN, SDIO_ERR_INTR_MASK);
SDIO_REG_WRITE16(SDIO_SW_RESET,0x100);
udelay(10000);
mmc_csd.c_size = 0;
/* reset */
retries = 10;
//mmc_cmd(ulong cmd, ulong arg, ushort xfermode, ushort resptype, ushort waittype);
resp = mmc_cmd(0, 0, 0, SDIO_CMD_RSP_NONE , SDIO_NOR_CMD_DONE );
debug("cmd 0 resp : %x %x %x %x\n", resp[0], resp[1], resp[2], resp[3] );
resp = mmc_cmd(55, 0, 0, SDIO_CMD_RSP_48, SDIO_NOR_CMD_DONE );
debug("cmd 55 resp : %x %x %x %x\n", resp[0], resp[1], resp[2], resp[3] );
resp = mmc_cmd(41, 0xff8000, 0, SDIO_CMD_RSP_48, SDIO_NOR_CMD_DONE );
debug("cmd 41 resp : %x %x %x %x\n", resp[0], resp[1], resp[2], resp[3] );
while (retries-- && resp && !(resp[3] & 0x80)) {
resp = mmc_cmd(55, 0, 0, SDIO_CMD_RSP_48, SDIO_NOR_CMD_DONE );
resp = mmc_cmd(41, 0xff8000, 0, SDIO_CMD_RSP_48, SDIO_NOR_CMD_DONE );
debug("cmd 41 resp : %x %x %x %x\n", resp[0], resp[1], resp[2], resp[3] );
}
if( resp[3] & 0x80 )
printf("sd memory ready\n");
else
{
printf("Sd memory error\n");
return rc;
}
/* try to get card id */
resp = mmc_cmd(2, 0, 0, SDIO_CMD_RSP_136, SDIO_NOR_CMD_DONE );
debug("cmd 2 resp 0 : %x %x %x %x\n", resp[0], resp[1], resp[2], resp[3] );
debug("cmd 2 resp 1 : %x %x %x %x\n", resp[4], resp[5], resp[6], resp[7] );
debug("cmd 2 resp 2 : %x %x %x %x\n", resp[8], resp[9], resp[10], resp[11] );
debug("cmd 2 resp 3 : %x %x %x %x\n", resp[12], resp[13], resp[14], resp[15] );
if (resp) {
/* TODO configure mmc driver depending on card attributes */
mmc_cid_t *cid = (mmc_cid_t *)resp;
if (verbose) {
printf("MMC found. Card desciption is:\n");
printf("Manufacturer ID = %02x%02x%02x\n",
cid->id[0], cid->id[1], cid->id[2]);
printf("HW/FW Revision = %x %x\n",cid->hwrev, cid->fwrev);
cid->hwrev = cid->fwrev = 0; /* null terminate string */
printf("Product Name = %s\n",cid->name);
printf("Serial Number = %02x%02x%02x\n",
cid->sn[0], cid->sn[1], cid->sn[2]);
printf("Month = %d\n",cid->month);
printf("Year = %d\n",1997 + cid->year);
}
/* fill in device description */
mmc_dev.if_type = IF_TYPE_MMC;
mmc_dev.part_type = PART_TYPE_DOS;
mmc_dev.dev = 0;
mmc_dev.lun = 0;
mmc_dev.type = 0;
/* FIXME fill in the correct size (is set to 128MByte) */
mmc_dev.blksz = 512;
mmc_dev.lba = 0x40000;
printf(mmc_dev.vendor,"Man %02x%02x%02x Snr %02x%02x%02x",
cid->id[0], cid->id[1], cid->id[2],
cid->sn[0], cid->sn[1], cid->sn[2]);
printf(mmc_dev.product,"%s",cid->name);
printf(mmc_dev.revision,"%x %x",cid->hwrev, cid->fwrev);
mmc_dev.removable = 0;
mmc_dev.block_read = mmc_bread;
//mmc_cmd(ulong cmd, ulong arg, ushort xfermode, ushort resptype, ushort waittype);
/* MMC exists, get CSD too */
resp = mmc_cmd(MMC_CMD_SET_RCA, 0, 0, SDIO_CMD_RSP_48, SDIO_NOR_CMD_DONE );
rca = resp[2] | (resp[3] << 8 ) ;
resp = mmc_cmd(MMC_CMD_SEND_CSD, rca<<16, 0, SDIO_CMD_RSP_136,SDIO_NOR_CMD_DONE );
if (resp) {
mmc_csd_t *csd = (mmc_csd_t *)resp;
memcpy(&mmc_csd, csd, sizeof(csd));
debug("cmd 9 resp 0 : %x %x %x %x\n", resp[0], resp[1], resp[2], resp[3] );
debug("cmd 9 resp 1 : %x %x %x %x\n", resp[4], resp[5], resp[6], resp[7] );
debug("cmd 9 resp 2 : %x %x %x %x\n", resp[8], resp[9], resp[10], resp[11] );
debug("cmd 9 resp 3 : %x %x %x %x\n", resp[12], resp[13], resp[14], resp[15] );
rc = 0;
/* Calc device size */
debug("cmd 9 csd->c_size : %x\n", csd->c_size );
debug("cmd 9 csd->c_size_mult1 : %x\n", csd->c_size_mult1 );
debug("cmd 9 csd->read_bl_len : %x\n", csd->read_bl_len );
debug("cmd 9 csd->tran_speed : %x\n", csd->tran_speed );
debug("cmd 9 csd->nsac : %x\n", csd->nsac );
debug("cmd 9 csd->taac : %x\n", csd->taac );
/* FIXME add verbose printout for csd */
mmc_ready = 1;
}
}
resp = mmc_cmd(MMC_CMD_SELECT_CARD, rca<<16, 0, SDIO_CMD_RSP_48BUSY, SDIO_NOR_CMD_DONE);
#if 0
resp = mmc_cmd(MMC_CMD_SELECT_CARD, 0, 0, SDIO_CMD_RSP_48BUSY, SDIO_NOR_CMD_DONE);
resp = mmc_cmd(MMC_CMD_SELECT_CARD, rca<<16, 0, SDIO_CMD_RSP_48BUSY, SDIO_NOR_CMD_DONE);
#endif
resp = mmc_cmd(55, rca<<16, 0, SDIO_CMD_RSP_48, SDIO_NOR_CMD_DONE );
resp = mmc_cmd(6, (rca<<16) | 0x2 , 0, SDIO_CMD_RSP_48, SDIO_NOR_CMD_DONE );
#if 0
// prepare for dma transfer
SDIO_REG_WRITE16(SDIO_BLK_SIZE,8);
SDIO_REG_WRITE16(SDIO_BLK_COUNT,1);
SDIO_REG_WRITE16(SDIO_SYS_ADDR_LOW,((ulong)(scrs))&0xffff);
SDIO_REG_WRITE16(SDIO_SYS_ADDR_HI,((ulong)(scrs)>>16)&0xffff);
//ACMD 51
resp = mmc_cmd(51, 0, 0x12, SDIO_CMD_RSP_48, SDIO_NOR_DMA_INI );
printf("scrs : %x %x %x %x %x %x %x %x\n", scrs[0], scrs[1], scrs[2], scrs[3], scrs[4], scrs[5], scrs[6], scrs[7] );
#endif
fat_register_device(&mmc_dev,1); /* partitions start counting with 1 */
return rc;
}
int
mmc_ident(block_dev_desc_t *dev)
{
return 0;
}
int
mmc2info(ulong addr)
{
/* FIXME hard codes to 256 MB device */
if (addr >= CFG_MMC_BASE && addr < CFG_MMC_BASE + 0xffffffff) {
return 1;
}
return 0;
}
#endif /* CONFIG_MMC */

211
board/mv_feroceon/USP/sdio/mustang_sdiodef.h Normal file
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#define MUSTANG_SDHC_BASE 0xf1080000 // from 00-4c
#define INTEGRATOR_GPIO_BASE 0x1b000000
//#define SC_BASE
#define P(x) (MUSTANG_SDHC_BASE + (2 * x))
#define GPIO_REG_READ32(addr) (*(volatile unsigned int*)(INTEGRATOR_GPIO_BASE+addr))
#define GPIO_REG_WRITE32(addr, val) (*(volatile unsigned int*)(INTEGRATOR_GPIO_BASE+addr)=val)
#define SDIO_REG_WRITE16(addr,val) (*(volatile unsigned short*)(P(addr)) = val)
#define SDIO_REG_READ16(addr) (*(volatile unsigned short*)(P(addr)))
/* SDIO register offset */
#define SDIO_SYS_ADDR_LOW 0x000
#define SDIO_SYS_ADDR_HI 0x002
#define SDIO_BLK_SIZE 0x004
#define SDIO_BLK_COUNT 0x006
#define SDIO_ARG_LOW 0x008
#define SDIO_ARG_HI 0x00A
#define SDIO_XFER_MODE 0x00C
#define SDIO_CMD 0x00E
#define SDIO_RSP0 0x010
#define SDIO_RSP1 0x012
#define SDIO_RSP2 0x014
#define SDIO_RSP3 0x016
#define SDIO_RSP4 0x018
#define SDIO_RSP5 0x01A
#define SDIO_RSP6 0x01C
#define SDIO_RSP7 0x01E
#define SDIO_BUF_DATA_PORT 0x020
#define SDIO_RSVED 0x022
#define SDIO_PRESENT_STATE0 0x024
#define CARD_BUSY ((unsigned short)(0x1 << 1))
#define SDIO_PRESENT_STATE1 0x026
#define SDIO_HOST_CTRL 0x028
#define SDIO_BLK_GAP_CTRL 0x02A
#define SDIO_CLK_CTRL 0x02C
#define SDIO_SW_RESET 0x02E
#define SDIO_NOR_INTR_STATUS 0x030
#define SDIO_ERR_INTR_STATUS 0x032
#define SDIO_NOR_STATUS_EN 0x034
#define SDIO_ERR_STATUS_EN 0x036
#define SDIO_NOR_INTR_EN 0x038
#define SDIO_ERR_INTR_EN 0x03A
#define SDIO_AUTOCMD12_ERR_STATUS 0x03C
#define SDIO_CURR_BLK_SIZE 0x03E
#define SDIO_CURR_BLK_COUNT 0x040
#define SDIO_AUTOCMD12_ARG_LOW 0x042
#define SDIO_AUTOCMD12_ARG_HI 0x044
#define SDIO_AUTOCMD12_INDEX 0x046
#define SDIO_AUTO_RSP0 0x048
#define SDIO_AUTO_RSP1 0x04A
#define SDIO_AUTO_RSP2 0x04C
/************** SDIO_HOST_CTRL ****/
#define SDIO_HOST_CTRL_PUSH_PULL_EN 1
#define SDIO_HOST_CTRL_CARD_TYPE_MEM_ONLY 0
#define SDIO_HOST_CTRL_CARD_TYPE_IO_ONLY (1<<1)
#define SDIO_HOST_CTRL_CARD_TYPE_IO_MEM_COMBO (2<<1)
#define SDIO_HOST_CTRL_CARD_TYPE_IO_MMC (3<<1)
#define SDIO_HOST_CTRL_BIG_ENDAN (1<<3)
#define SDIO_HOST_CTRL_LSB_FIRST (1<<4)
#define SDIO_HOST_CTRL_ID_MODE_LOW_FREQ (1<<5)
#define SDIO_HOST_CTRL_HALF_SPEED (1<<6)
#define SDIO_HOST_CTRL_DATA_WIDTH_4_BITS (1<<9)
#define SDIO_HOST_CTRL_HI_SPEED_EN (1<<10)
#define SDIO_HOST_CTRL_TMOUT_SHIFT 11
#define SDIO_HOST_CTRL_TMOUT_EN (1<<15)
#define SDIO_HOST_CTRL_DFAULT_OPEN_DRAIN (0xF<<SDIO_HOST_CTRL_TMOUT_SHIFT)
#define SDIO_HOST_CTRL_DFAULT_PUSH_PULL ((0xF<<SDIO_HOST_CTRL_TMOUT_SHIFT)|SDIO_HOST_CTRL_PUSH_PULL_EN)
/* nor status mask */
#define SDIO_NOR_UNEXP_RSP ((unsigned short)0x1 << 14)
#define SDIO_NOR_AUTOCMD12_DONE ((unsigned short)0x1 << 13)
#define SDIO_NOR_SUSPENSE_ON ((unsigned short)0x1 << 12)
#define SDIO_NOR_LMB_FF_8W_AVAIL ((unsigned short)0x1 << 11)
#define SDIO_NOR_LMB_FF_8W_FILLED ((unsigned short)0x1 << 10)
#define SDIO_NOR_READ_WAIT_ON ((unsigned short)0x1 << 9)
#define SDIO_NOR_CARD_INT ((unsigned short)0x1 << 8)
#define SDIO_NOR_READ_READY ((unsigned short)0x1 << 5)
#define SDIO_NOR_WRITE_READY ((unsigned short)0x1 << 4)
#define SDIO_NOR_DMA_INI ((unsigned short)0x1 << 3)
#define SDIO_NOR_BLK_GAP_EVT ((unsigned short)0x1 << 2)
#define SDIO_NOR_XFER_DONE ((unsigned short)0x1 << 1)
#define SDIO_NOR_CMD_DONE ((unsigned short)0x1 << 0)
/* err status mask */
#define SDIO_ERR_CRC_STATUS ((unsigned short)0x1 << 14)
#define SDIO_ERR_CRC_STARTBIT ((unsigned short)0x1 << 13)
#define SDIO_ERR_CRC_ENDBIT ((unsigned short)0x1 << 12)
#define SDIO_ERR_RESP_TBIT ((unsigned short)0x1 << 11)
#define SDIO_ERR_SIZE ((unsigned short)0x1 << 10)
#define SDIO_ERR_CMD_STARTBIT ((unsigned short)0x1 << 9)
#define SDIO_ERR_AUTOCMD12 ((unsigned short)0x1 << 8)
#define SDIO_ERR_DATA_ENDBIT ((unsigned short)0x1 << 6)
#define SDIO_ERR_DATA_CRC ((unsigned short)0x1 << 5)
#define SDIO_ERR_DATA_TIMEOUT ((unsigned short)0x1 << 4)
#define SDIO_ERR_CMD_INDEX ((unsigned short)0x1 << 3)
#define SDIO_ERR_CMD_ENDBIT ((unsigned short)0x1 << 2)
#define SDIO_ERR_CMD_CRC ((unsigned short)0x1 << 1)
#define SDIO_ERR_CMD_TIMEOUT ((unsigned short)0x1 << 0)
#define SDIO_ERR_INTR_MASK 0xFFFF
#define SDIO_CMD_RSP_NONE ((unsigned short)0x0)
#define SDIO_CMD_RSP_136 ((unsigned short)0x1)
#define SDIO_CMD_RSP_48 ((unsigned short)0x2)
#define SDIO_CMD_RSP_48BUSY ((unsigned short)0x3)
#define MMC_BLOCK_SIZE 512
#define MMC_CMD_RESET 0
#define MMC_CMD_SEND_OP_COND 1
#define MMC_CMD_ALL_SEND_CID 2
#define MMC_CMD_SET_RCA 3
#define MMC_CMD_SELECT_CARD 7
#define MMC_CMD_SEND_CSD 9
#define MMC_CMD_SEND_CID 10
#define MMC_CMD_SEND_STATUS 13
#define MMC_CMD_SET_BLOCKLEN 16
#define MMC_CMD_READ_BLOCK 17
#define MMC_CMD_RD_BLK_MULTI 18
#define MMC_CMD_WRITE_BLOCK 24
#define MMC_MAX_BLOCK_SIZE 512
//*****************************************************************************
// GPIO definition for SD host controller
// GPIO1 => EXTINT1 (IRQ24) a can be used as SD_CARD_IN
// GPIO6 => can be used as SD_WP
// GPIO7 => can be used as SD_ON
#define SDHC_GPIO_CARD_IN 0x00000002
#define SDHC_GPIO_WP 0x00000040
#define SDHC_GPIO_POWER 0x00000080
#define MUSTANG_GPIO_DIRECTION_OFFSET 8
#define MUSTANG_GPIO_CLEAR_OFFSET 4
#define MUSTANG_GPIO_SET_OFFSET 0
#define MUSTANG_GPIO_DATAIN 0
//SC Flag bit 0 for Card Detection
// if bit 0 of 0x11000030 is zero,
// Card Insertion interrupt will be detected
// if bit 0 of 0x11000030 is 1
// card Removal interrupt will be detected
#define MUSTANG_SCFLAG_STATUS_OFFSET 0x0
#define MUSTANG_SCFLAG_SET_OFFSET 0x0
#define MUSTANG_SCFLAG_CLEAR_OFFSET 0x4
#define MUSTANG_SD_CARDDET_TOGGLE_BIT 0x1
typedef struct mmc_cid
{
/* FIXME: BYTE_ORDER */
uchar year:4,
month:4;
uchar sn[3];
uchar fwrev:4,
hwrev:4;
uchar name[6];
uchar id[3];
} mmc_cid_t;
typedef struct mmc_csd
{
uchar ecc:2,
file_format:2,
tmp_write_protect:1,
perm_write_protect:1,
copy:1,
file_format_grp:1;
uint64_t content_prot_app:1,
rsvd3:4,
write_bl_partial:1,
write_bl_len:4,
r2w_factor:3,
default_ecc:2,
wp_grp_enable:1,
wp_grp_size:5,
erase_grp_mult:5,
erase_grp_size:5,
c_size_mult1:3,
vdd_w_curr_max:3,
vdd_w_curr_min:3,
vdd_r_curr_max:3,
vdd_r_curr_min:3,
c_size:12,
rsvd2:2,
dsr_imp:1,
read_blk_misalign:1,
write_blk_misalign:1,
read_bl_partial:1;
ushort read_bl_len:4,
ccc:12;
uchar tran_speed;
uchar nsac;
uchar taac;
uchar rsvd1:2,
spec_vers:4,
csd_structure:2;
} mmc_csd_t;

207
board/mv_feroceon/common/mv802_3.h Normal file
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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
This software file (the "File") is owned and distributed by Marvell
International Ltd. and/or its affiliates ("Marvell") under the following
alternative licensing terms. Once you have made an election to distribute the
File under one of the following license alternatives, please (i) delete this
introductory statement regarding license alternatives, (ii) delete the two
license alternatives that you have not elected to use and (iii) preserve the
Marvell copyright notice above.
********************************************************************************
Marvell Commercial License Option
If you received this File from Marvell and you have entered into a commercial
license agreement (a "Commercial License") with Marvell, the File is licensed
to you under the terms of the applicable Commercial License.
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
********************************************************************************
Marvell BSD License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File under the following licensing terms.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Marvell nor the names of its contributors may be
used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#ifndef __INCmv802_3h
#define __INCmv802_3h
/* includes */
#include "mvTypes.h"
/* Defines */
#define MV_MAX_ETH_DATA 1500
/* 802.3 types */
#define MV_IP_TYPE 0x0800
#define MV_IP_ARP_TYPE 0x0806
#define MV_APPLE_TALK_ARP_TYPE 0x80F3
#define MV_NOVELL_IPX_TYPE 0x8137
#define MV_EAPOL_TYPE 0x888e
/* Encapsulation header for RFC1042 and Ethernet_tunnel */
#define MV_RFC1042_SNAP_HEADER {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00}
#define MV_ETH_SNAP_LSB 0xF8
#define MV_MAC_ADDR_SIZE (6)
#define MV_MAC_STR_SIZE (20)
#define MV_VLAN_HLEN (4)
/* This macro checks for a multicast mac address */
#define MV_IS_MULTICAST_MAC(mac) (((mac)[0] & 0x1) == 1)
/* This macro checks for an broadcast mac address */
#define MV_IS_BROADCAST_MAC(mac) \
(((mac)[0] == 0xFF) && \
((mac)[1] == 0xFF) && \
((mac)[2] == 0xFF) && \
((mac)[3] == 0xFF) && \
((mac)[4] == 0xFF) && \
((mac)[5] == 0xFF))
/* Typedefs */
typedef struct
{
MV_U8 pDA[MV_MAC_ADDR_SIZE];
MV_U8 pSA[MV_MAC_ADDR_SIZE];
MV_U16 typeOrLen;
} MV_802_3_HEADER;
enum {
MV_IP_PROTO_NULL = 0, /* Dummy protocol for TCP */
MV_IP_PROTO_ICMP = 1, /* Internet Control Message Protocol */
MV_IP_PROTO_IGMP = 2, /* Internet Group Management Protocol */
MV_IP_PROTO_IPIP = 4, /* IPIP tunnels (older KA9Q tunnels use 94) */
MV_IP_PROTO_TCP = 6, /* Transmission Control Protocol */
MV_IP_PROTO_EGP = 8, /* Exterior Gateway Protocol */
MV_IP_PROTO_PUP = 12, /* PUP protocol */
MV_IP_PROTO_UDP = 17, /* User Datagram Protocol */
MV_IP_PROTO_IDP = 22, /* XNS IDP protocol */
MV_IP_PROTO_DCCP = 33, /* Datagram Congestion Control Protocol */
MV_IP_PROTO_IPV6 = 41, /* IPv6-in-IPv4 tunnelling */
MV_IP_PROTO_RSVP = 46, /* RSVP protocol */
MV_IP_PROTO_GRE = 47, /* Cisco GRE tunnels (rfc 1701,1702) */
MV_IP_PROTO_ESP = 50, /* Encapsulation Security Payload protocol */
MV_IP_PROTO_AH = 51, /* Authentication Header protocol */
MV_IP_PROTO_BEETPH = 94, /* IP option pseudo header for BEET */
MV_IP_PROTO_PIM = 103,
MV_IP_PROTO_COMP = 108, /* Compression Header protocol */
MV_IP_PROTO_ZERO_HOP = 114, /* Any 0 hop protocol (IANA) */
MV_IP_PROTO_SCTP = 132, /* Stream Control Transport Protocol */
MV_IP_PROTO_UDPLITE = 136, /* UDP-Lite (RFC 3828) */
MV_IP_PROTO_RAW = 255, /* Raw IP packets */
MV_IP_PROTO_MAX
};
typedef struct
{
MV_U8 version;
MV_U8 tos;
MV_U16 totalLength;
MV_U16 identifier;
MV_U16 fragmentCtrl;
MV_U8 ttl;
MV_U8 protocol;
MV_U16 checksum;
MV_U32 srcIP;
MV_U32 dstIP;
} MV_IP_HEADER;
#define MV_ICMP_ECHOREPLY 0 /* Echo Reply */
#define MV_ICMP_DEST_UNREACH 3 /* Destination Unreachable */
#define MV_ICMP_SOURCE_QUENCH 4 /* Source Quench */
#define MV_ICMP_REDIRECT 5 /* Redirect (change route) */
#define MV_ICMP_ECHO 8 /* Echo Request */
#define MV_ICMP_TIME_EXCEEDED 11 /* Time Exceeded */
#define MV_ICMP_PARAMETERPROB 12 /* Parameter Problem */
#define MV_ICMP_TIMESTAMP 13 /* Timestamp Request */
#define MV_ICMP_TIMESTAMPREPLY 14 /* Timestamp Reply */
#define MV_ICMP_INFO_REQUEST 15 /* Information Request */
#define MV_ICMP_INFO_REPLY 16 /* Information Reply */
#define MV_ICMP_ADDRESS 17 /* Address Mask Request */
#define MV_ICMP_ADDRESSREPLY 18 /* Address Mask Reply */
typedef struct
{
MV_U8 type;
MV_U8 code;
MV_U16 checksum;
MV_U16 id;
MV_U16 sequence;
} MV_ICMP_ECHO_HEADER;
typedef struct
{
MV_U16 source;
MV_U16 dest;
MV_U32 seq;
MV_U32 ack_seq;
MV_U16 flags;
MV_U16 window;
MV_U16 chksum;
MV_U16 urg_offset;
} MV_TCP_HEADER;
typedef struct
{
MV_U16 source;
MV_U16 dest;
MV_U16 len;
MV_U16 check;
} MV_UDP_HEADER;
#endif /* __INCmv802_3h */

277
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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
This software file (the "File") is owned and distributed by Marvell
International Ltd. and/or its affiliates ("Marvell") under the following
alternative licensing terms. Once you have made an election to distribute the
File under one of the following license alternatives, please (i) delete this
introductory statement regarding license alternatives, (ii) delete the two
license alternatives that you have not elected to use and (iii) preserve the
Marvell copyright notice above.
********************************************************************************
Marvell Commercial License Option
If you received this File from Marvell and you have entered into a commercial
license agreement (a "Commercial License") with Marvell, the File is licensed
to you under the terms of the applicable Commercial License.
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
********************************************************************************
Marvell BSD License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File under the following licensing terms.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Marvell nor the names of its contributors may be
used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#include "mvOs.h"
#include "mv802_3.h"
#include "mvCommon.h"
/*******************************************************************************
* mvMacStrToHex - Convert MAC format string to hex.
*
* DESCRIPTION:
* This function convert MAC format string to hex.
*
* INPUT:
* macStr - MAC address string. Fornat of address string is
* uu:vv:ww:xx:yy:zz, where ":" can be any delimiter.
*
* OUTPUT:
* macHex - MAC in hex format.
*
* RETURN:
* None.
*
*******************************************************************************/
MV_STATUS mvMacStrToHex(const char* macStr, MV_U8* macHex)
{
int i;
char tmp[3];
for(i = 0; i < MV_MAC_ADDR_SIZE; i++)
{
tmp[0] = macStr[(i * 3) + 0];
tmp[1] = macStr[(i * 3) + 1];
tmp[2] = '\0';
macHex[i] = (MV_U8) (strtol(tmp, NULL, 16));
}
return MV_OK;
}
/*******************************************************************************
* mvMacHexToStr - Convert MAC in hex format to string format.
*
* DESCRIPTION:
* This function convert MAC in hex format to string format.
*
* INPUT:
* macHex - MAC in hex format.
*
* OUTPUT:
* macStr - MAC address string. String format is uu:vv:ww:xx:yy:zz.
*
* RETURN:
* None.
*
*******************************************************************************/
MV_STATUS mvMacHexToStr(MV_U8* macHex, char* macStr)
{
int i;
for(i = 0; i < MV_MAC_ADDR_SIZE; i++)
{
mvOsSPrintf(&macStr[i * 3], "%02x:", macHex[i]);
}
macStr[(i * 3) - 1] = '\0';
return MV_OK;
}
/*******************************************************************************
* mvSizePrint - Print the given size with size unit description.
*
* DESCRIPTION:
* This function print the given size with size unit description.
* FOr example when size paramter is 0x180000, the function prints:
* "size 1MB+500KB"
*
* INPUT:
* size - Size in bytes.
*
* OUTPUT:
* None.
*
* RETURN:
* None.
*
*******************************************************************************/
MV_VOID mvSizePrint(MV_U32 size)
{
mvOsOutput("size ");
if(size >= _1G)
{
mvOsOutput("%3dGB ", size / _1G);
size %= _1G;
if(size)
mvOsOutput("+");
}
if(size >= _1M )
{
mvOsOutput("%3dMB ", size / _1M);
size %= _1M;
if(size)
mvOsOutput("+");
}
if(size >= _1K)
{
mvOsOutput("%3dKB ", size / _1K);
size %= _1K;
if(size)
mvOsOutput("+");
}
if(size > 0)
{
mvOsOutput("%3dB ", size);
}
}
/*******************************************************************************
* mvHexToBin - Convert hex to binary
*
* DESCRIPTION:
* This function Convert hex to binary.
*
* INPUT:
* pHexStr - hex buffer pointer.
* size - Size to convert.
*
* OUTPUT:
* pBin - Binary buffer pointer.
*
* RETURN:
* None.
*
*******************************************************************************/
MV_VOID mvHexToBin(const char* pHexStr, MV_U8* pBin, int size)
{
int j, i;
char tmp[3];
MV_U8 byte;
for(j=0, i=0; j<size; j++, i+=2)
{
tmp[0] = pHexStr[i];
tmp[1] = pHexStr[i+1];
tmp[2] = '\0';
byte = (MV_U8) (strtol(tmp, NULL, 16) & 0xFF);
pBin[j] = byte;
}
}
void mvAsciiToHex(const char* asciiStr, char* hexStr)
{
int i=0;
while(asciiStr[i] != 0)
{
mvOsSPrintf(&hexStr[i*2], "%02x", asciiStr[i]);
i++;
}
hexStr[i*2] = 0;
}
void mvBinToHex(const MV_U8* bin, char* hexStr, int size)
{
int i;
for(i=0; i<size; i++)
{
mvOsSPrintf(&hexStr[i*2], "%02x", bin[i]);
}
hexStr[i*2] = '\0';
}
void mvBinToAscii(const MV_U8* bin, char* asciiStr, int size)
{
int i;
for(i=0; i<size; i++)
{
mvOsSPrintf(&asciiStr[i*2], "%c", bin[i]);
}
asciiStr[i*2] = '\0';
}
/*******************************************************************************
* mvLog2 -
*
* DESCRIPTION:
* Calculate the Log2 of a given number.
*
* INPUT:
* num - A number to calculate the Log2 for.
*
* OUTPUT:
* None.
*
* RETURN:
* Log 2 of the input number, or 0xFFFFFFFF if input is 0.
*
*******************************************************************************/
MV_U32 mvLog2(MV_U32 num)
{
MV_U32 result = 0;
if(num == 0)
return 0xFFFFFFFF;
while(num != 1)
{
num = num >> 1;
result++;
}
return result;
}

308
board/mv_feroceon/common/mvCommon.h Normal file
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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
This software file (the "File") is owned and distributed by Marvell
International Ltd. and/or its affiliates ("Marvell") under the following
alternative licensing terms. Once you have made an election to distribute the
File under one of the following license alternatives, please (i) delete this
introductory statement regarding license alternatives, (ii) delete the two
license alternatives that you have not elected to use and (iii) preserve the
Marvell copyright notice above.
********************************************************************************
Marvell Commercial License Option
If you received this File from Marvell and you have entered into a commercial
license agreement (a "Commercial License") with Marvell, the File is licensed
to you under the terms of the applicable Commercial License.
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
********************************************************************************
Marvell BSD License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File under the following licensing terms.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Marvell nor the names of its contributors may be
used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#ifndef __INCmvCommonh
#define __INCmvCommonh
#include "mvTypes.h"
/* Swap tool */
/* 16bit nibble swap. For example 0x1234 -> 0x2143 */
#define MV_NIBBLE_SWAP_16BIT(X) (((X&0xf) << 4) | \
((X&0xf0) >> 4) | \
((X&0xf00) << 4) | \
((X&0xf000) >> 4))
/* 32bit nibble swap. For example 0x12345678 -> 0x21436587 */
#define MV_NIBBLE_SWAP_32BIT(X) (((X&0xf) << 4) | \
((X&0xf0) >> 4) | \
((X&0xf00) << 4) | \
((X&0xf000) >> 4) | \
((X&0xf0000) << 4) | \
((X&0xf00000) >> 4) | \
((X&0xf000000) << 4) | \
((X&0xf0000000) >> 4))
/* 16bit byte swap. For example 0x1122 -> 0x2211 */
#define MV_BYTE_SWAP_16BIT(X) ((((X)&0xff)<<8) | (((X)&0xff00)>>8))
/* 32bit byte swap. For example 0x11223344 -> 0x44332211 */
#define MV_BYTE_SWAP_32BIT(X) ((((X)&0xff)<<24) | \
(((X)&0xff00)<<8) | \
(((X)&0xff0000)>>8) | \
(((X)&0xff000000)>>24))
/* 64bit byte swap. For example 0x11223344.55667788 -> 0x88776655.44332211 */
#define MV_BYTE_SWAP_64BIT(X) ((l64) ((((X)&0xffULL)<<56) | \
(((X)&0xff00ULL)<<40) | \
(((X)&0xff0000ULL)<<24) | \
(((X)&0xff000000ULL)<<8) | \
(((X)&0xff00000000ULL)>>8) | \
(((X)&0xff0000000000ULL)>>24) | \
(((X)&0xff000000000000ULL)>>40) | \
(((X)&0xff00000000000000ULL)>>56)))
/* Endianess macros. */
#if defined(MV_CPU_LE)
#define MV_16BIT_LE(X) (X)
#define MV_32BIT_LE(X) (X)
#define MV_64BIT_LE(X) (X)
#define MV_16BIT_BE(X) MV_BYTE_SWAP_16BIT(X)
#define MV_32BIT_BE(X) MV_BYTE_SWAP_32BIT(X)
#define MV_64BIT_BE(X) MV_BYTE_SWAP_64BIT(X)
#elif defined(MV_CPU_BE)
#define MV_16BIT_LE(X) MV_BYTE_SWAP_16BIT(X)
#define MV_32BIT_LE(X) MV_BYTE_SWAP_32BIT(X)
#define MV_64BIT_LE(X) MV_BYTE_SWAP_64BIT(X)
#define MV_16BIT_BE(X) (X)
#define MV_32BIT_BE(X) (X)
#define MV_64BIT_BE(X) (X)
#else
#error "CPU endianess isn't defined!\n"
#endif
/* Bit field definitions */
#define NO_BIT 0x00000000
#define BIT0 0x00000001
#define BIT1 0x00000002
#define BIT2 0x00000004
#define BIT3 0x00000008
#define BIT4 0x00000010
#define BIT5 0x00000020
#define BIT6 0x00000040
#define BIT7 0x00000080
#define BIT8 0x00000100
#define BIT9 0x00000200
#define BIT10 0x00000400
#define BIT11 0x00000800
#define BIT12 0x00001000
#define BIT13 0x00002000
#define BIT14 0x00004000
#define BIT15 0x00008000
#define BIT16 0x00010000
#define BIT17 0x00020000
#define BIT18 0x00040000
#define BIT19 0x00080000
#define BIT20 0x00100000
#define BIT21 0x00200000
#define BIT22 0x00400000
#define BIT23 0x00800000
#define BIT24 0x01000000
#define BIT25 0x02000000
#define BIT26 0x04000000
#define BIT27 0x08000000
#define BIT28 0x10000000
#define BIT29 0x20000000
#define BIT30 0x40000000
#define BIT31 0x80000000
/* Handy sizes */
#define _1K 0x00000400
#define _2K 0x00000800
#define _4K 0x00001000
#define _8K 0x00002000
#define _16K 0x00004000
#define _32K 0x00008000
#define _64K 0x00010000
#define _128K 0x00020000
#define _256K 0x00040000
#define _512K 0x00080000
#define _1M 0x00100000
#define _2M 0x00200000
#define _4M 0x00400000
#define _8M 0x00800000
#define _16M 0x01000000
#define _32M 0x02000000
#define _64M 0x04000000
#define _128M 0x08000000
#define _256M 0x10000000
#define _512M 0x20000000
#define _1G 0x40000000
#define _2G 0x80000000
/* Tclock and Sys clock define */
#define _100MHz 100000000
#define _125MHz 125000000
#define _133MHz 133333334
#define _150MHz 150000000
#define _160MHz 160000000
#define _166MHz 166666667
#define _175MHz 175000000
#define _178MHz 178000000
#define _183MHz 183333334
#define _187MHz 187000000
#define _192MHz 192000000
#define _194MHz 194000000
#define _200MHz 200000000
#define _233MHz 233333334
#define _250MHz 250000000
#define _266MHz 266666667
#define _300MHz 300000000
/* For better address window table readability */
#define EN MV_TRUE
#define DIS MV_FALSE
#define N_A -1 /* Not applicable */
/* Cache configuration options for memory (DRAM, SRAM, ... ) */
/* Memory uncached, HW or SW cache coherency is not needed */
#define MV_UNCACHED 0
/* Memory cached, HW cache coherency supported in WriteThrough mode */
#define MV_CACHE_COHER_HW_WT 1
/* Memory cached, HW cache coherency supported in WriteBack mode */
#define MV_CACHE_COHER_HW_WB 2
/* Memory cached, No HW cache coherency, Cache coherency must be in SW */
#define MV_CACHE_COHER_SW 3
/* Macro for testing aligment. Positive if number is NOT aligned */
#define MV_IS_NOT_ALIGN(number, align) ((number) & ((align) - 1))
/* Macro for alignment up. For example, MV_ALIGN_UP(0x0330, 0x20) = 0x0340 */
#define MV_ALIGN_UP(number, align) \
(((number) & ((align) - 1)) ? (((number) + (align)) & ~((align)-1)) : (number))
/* Macro for alignment down. For example, MV_ALIGN_UP(0x0330, 0x20) = 0x0320 */
#define MV_ALIGN_DOWN(number, align) ((number) & ~((align)-1))
/* This macro returns absolute value */
#define MV_ABS(number) (((int)(number) < 0) ? -(int)(number) : (int)(number))
/* Bit fields manipulation macros */
/* An integer word which its 'x' bit is set */
#define MV_BIT_MASK(bitNum) (1 << (bitNum) )
/* Checks wheter bit 'x' in integer word is set */
#define MV_BIT_CHECK(word, bitNum) ( (word) & MV_BIT_MASK(bitNum) )
/* Clear (reset) bit 'x' in integer word (RMW - Read-Modify-Write) */
#define MV_BIT_CLEAR(word, bitNum) ( (word) &= ~(MV_BIT_MASK(bitNum)) )
/* Set bit 'x' in integer word (RMW) */
#define MV_BIT_SET(word, bitNum) ( (word) |= MV_BIT_MASK(bitNum) )
/* Invert bit 'x' in integer word (RMW) */
#define MV_BIT_INV(word, bitNum) ( (word) ^= MV_BIT_MASK(bitNum) )
/* Get the min between 'a' or 'b' */
#define MV_MIN(a,b) (((a) < (b)) ? (a) : (b))
/* Get the max between 'a' or 'b' */
#define MV_MAX(a,b) (((a) < (b)) ? (b) : (a))
/* Temporary */
#define mvOsDivide(num, div) \
({ \
int i=0, rem=(num); \
\
while(rem >= (div)) \
{ \
rem -= (div); \
i++; \
} \
(i); \
})
/* Temporary */
#define mvOsReminder(num, div) \
({ \
int rem = (num); \
\
while(rem >= (div)) \
rem -= (div); \
(rem); \
})
#define MV_IP_QUAD(ipAddr) ((ipAddr >> 24) & 0xFF), ((ipAddr >> 16) & 0xFF), \
((ipAddr >> 8) & 0xFF), ((ipAddr >> 0) & 0xFF)
#define MV_IS_POWER_OF_2(num) ((num != 0) && ((num & (num - 1)) == 0))
#ifndef MV_ASMLANGUAGE
/* mvCommon API list */
MV_VOID mvHexToBin(const char* pHexStr, MV_U8* pBin, int size);
void mvAsciiToHex(const char* asciiStr, char* hexStr);
void mvBinToHex(const MV_U8* bin, char* hexStr, int size);
void mvBinToAscii(const MV_U8* bin, char* asciiStr, int size);
MV_STATUS mvMacStrToHex(const char* macStr, MV_U8* macHex);
MV_STATUS mvMacHexToStr(MV_U8* macHex, char* macStr);
void mvSizePrint(MV_U32);
MV_U32 mvLog2(MV_U32 num);
#endif /* MV_ASMLANGUAGE */
#endif /* __INCmvCommonh */

326
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@ -0,0 +1,326 @@
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
This software file (the "File") is owned and distributed by Marvell
International Ltd. and/or its affiliates ("Marvell") under the following
alternative licensing terms. Once you have made an election to distribute the
File under one of the following license alternatives, please (i) delete this
introductory statement regarding license alternatives, (ii) delete the two
license alternatives that you have not elected to use and (iii) preserve the
Marvell copyright notice above.
********************************************************************************
Marvell Commercial License Option
If you received this File from Marvell and you have entered into a commercial
license agreement (a "Commercial License") with Marvell, the File is licensed
to you under the terms of the applicable Commercial License.
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
********************************************************************************
Marvell BSD License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File under the following licensing terms.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Marvell nor the names of its contributors may be
used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
/* includes */
#include "mvOs.h"
#include "mv802_3.h"
#include "mvCommon.h"
#include "mvDebug.h"
/* Global variables effect on behave MV_DEBUG_PRINT and MV_DEBUG_CODE macros
* mvDebug - map of bits (one for each module) bit=1 means enable
* debug code and messages for this module
* mvModuleDebug - array of 32 bits varables one for each module
*/
MV_U32 mvDebug = 0;
MV_U32 mvDebugModules[MV_MODULE_MAX];
/* Init mvModuleDebug array to default values */
void mvDebugInit(void)
{
int bit;
mvDebug = 0;
for(bit=0; bit<MV_MODULE_MAX; bit++)
{
mvDebugModules[bit] = MV_DEBUG_FLAG_ERR | MV_DEBUG_FLAG_STATS;
mvDebug |= MV_BIT_MASK(bit);
}
}
void mvDebugModuleEnable(MV_MODULE_ID module, MV_BOOL isEnable)
{
if (isEnable)
{
MV_BIT_SET(mvDebug, module);
}
else
MV_BIT_CLEAR(mvDebug, module);
}
void mvDebugModuleSetFlags(MV_MODULE_ID module, MV_U32 flags)
{
mvDebugModules[module] |= flags;
}
void mvDebugModuleClearFlags(MV_MODULE_ID module, MV_U32 flags)
{
mvDebugModules[module] &= ~flags;
}
/* Dump memory in specific format:
* address: X1X1X1X1 X2X2X2X2 ... X8X8X8X8
*/
void mvDebugMemDump(void* addr, int size, int access)
{
int i, j;
MV_U32 memAddr = (MV_U32)addr;
if(access == 0)
access = 1;
if( (access != 4) && (access != 2) && (access != 1) )
{
mvOsPrintf("%d wrong access size. Access must be 1 or 2 or 4\n",
access);
return;
}
memAddr = MV_ALIGN_DOWN( (unsigned int)addr, 4);
size = MV_ALIGN_UP(size, 4);
addr = (void*)MV_ALIGN_DOWN( (unsigned int)addr, access);
while(size > 0)
{
mvOsPrintf("%08x: ", memAddr);
i = 0;
/* 32 bytes in the line */
while(i < 32)
{
if(memAddr >= (MV_U32)addr)
{
switch(access)
{
case 1:
if( memAddr == CPU_PHY_MEM(memAddr) )
{
mvOsPrintf("%02x ", MV_MEMIO8_READ(memAddr));
}
else
{
mvOsPrintf("%02x ", *((MV_U8*)memAddr));
}
break;
case 2:
if( memAddr == CPU_PHY_MEM(memAddr) )
{
mvOsPrintf("%04x ", MV_MEMIO16_READ(memAddr));
}
else
{
mvOsPrintf("%04x ", *((MV_U16*)memAddr));
}
break;
case 4:
if( memAddr == CPU_PHY_MEM(memAddr) )
{
mvOsPrintf("%08x ", MV_MEMIO32_READ(memAddr));
}
else
{
mvOsPrintf("%08x ", *((MV_U32*)memAddr));
}
break;
}
}
else
{
for(j=0; j<(access*2+1); j++)
mvOsPrintf(" ");
}
i += access;
memAddr += access;
size -= access;
if(size <= 0)
break;
}
mvOsPrintf("\n");
}
}
void mvDebugPrintBufInfo(BUF_INFO* pBufInfo, int size, int access)
{
if(pBufInfo == NULL)
{
mvOsPrintf("\n!!! pBufInfo = NULL\n");
return;
}
mvOsPrintf("\n*** pBufInfo=0x%x, cmdSts=0x%08x, pBuf=0x%x, bufSize=%d\n",
(unsigned int)pBufInfo,
(unsigned int)pBufInfo->cmdSts,
(unsigned int)pBufInfo->pBuff,
(unsigned int)pBufInfo->bufSize);
mvOsPrintf("pData=0x%x, byteCnt=%d, pNext=0x%x, uInfo1=0x%x, uInfo2=0x%x\n",
(unsigned int)pBufInfo->pData,
(unsigned int)pBufInfo->byteCnt,
(unsigned int)pBufInfo->pNextBufInfo,
(unsigned int)pBufInfo->userInfo1,
(unsigned int)pBufInfo->userInfo2);
if(pBufInfo->pData != NULL)
{
if(size > pBufInfo->byteCnt)
size = pBufInfo->byteCnt;
mvDebugMemDump(pBufInfo->pData, size, access);
}
}
void mvDebugPrintPktInfo(MV_PKT_INFO* pPktInfo, int size, int access)
{
int frag, len;
if(pPktInfo == NULL)
{
mvOsPrintf("\n!!! pPktInfo = NULL\n");
return;
}
mvOsPrintf("\npPkt=%p, stat=0x%08x, numFr=%d, size=%d, pFr=%p, osInfo=0x%lx\n",
pPktInfo, pPktInfo->status, pPktInfo->numFrags, pPktInfo->pktSize,
pPktInfo->pFrags, pPktInfo->osInfo);
for(frag=0; frag<pPktInfo->numFrags; frag++)
{
mvOsPrintf("#%2d. bufVirt=%p, bufSize=%d\n",
frag, pPktInfo->pFrags[frag].bufVirtPtr,
pPktInfo->pFrags[frag].bufSize);
if(size > 0)
{
len = MV_MIN((int)pPktInfo->pFrags[frag].bufSize, size);
mvDebugMemDump(pPktInfo->pFrags[frag].bufVirtPtr, len, access);
size -= len;
}
}
}
void mvDebugPrintIpAddr(MV_U32 ipAddr)
{
mvOsPrintf("%d.%d.%d.%d", ((ipAddr >> 24) & 0xFF), ((ipAddr >> 16) & 0xFF),
((ipAddr >> 8) & 0xFF), ((ipAddr >> 0) & 0xFF));
}
void mvDebugPrintMacAddr(const MV_U8* pMacAddr)
{
int i;
mvOsPrintf("%02x", (unsigned int)pMacAddr[0]);
for(i=1; i<MV_MAC_ADDR_SIZE; i++)
{
mvOsPrintf(":%02x", pMacAddr[i]);
}
/* mvOsPrintf("\n");*/
}
/******* There are three functions deals with MV_DEBUG_TIMES structure ********/
/* Reset MV_DEBUG_TIMES entry */
void mvDebugResetTimeEntry(MV_DEBUG_TIMES* pTimeEntry, int count, char* pName)
{
pTimeEntry->begin = 0;
pTimeEntry->count = count;
pTimeEntry->end = 0;
pTimeEntry->left = pTimeEntry->count;
pTimeEntry->total = 0;
pTimeEntry->min = 0xFFFFFFFF;
pTimeEntry->max = 0x0;
strncpy(pTimeEntry->name, pName, sizeof(pTimeEntry->name)-1);
pTimeEntry->name[sizeof(pTimeEntry->name)-1] = '\0';
}
/* Print out MV_DEBUG_TIMES entry */
void mvDebugPrintTimeEntry(MV_DEBUG_TIMES* pTimeEntry, MV_BOOL isTitle)
{
int num;
if(isTitle == MV_TRUE)
mvOsPrintf("Event NumOfEvents TotalTime Average Min Max\n");
num = pTimeEntry->count-pTimeEntry->left;
if(num > 0)
{
mvOsPrintf("%-11s %6u 0x%08lx %6lu %6lu %6lu\n",
pTimeEntry->name, num, pTimeEntry->total, pTimeEntry->total/num,
pTimeEntry->min, pTimeEntry->max);
}
}
/* Update MV_DEBUG_TIMES entry */
void mvDebugUpdateTimeEntry(MV_DEBUG_TIMES* pTimeEntry)
{
MV_U32 delta;
if(pTimeEntry->left > 0)
{
if(pTimeEntry->end <= pTimeEntry->begin)
{
delta = pTimeEntry->begin - pTimeEntry->end;
}
else
{
delta = ((MV_U32)0x10000 - pTimeEntry->end) + pTimeEntry->begin;
}
pTimeEntry->total += delta;
if(delta < pTimeEntry->min)
pTimeEntry->min = delta;
if(delta > pTimeEntry->max)
pTimeEntry->max = delta;
pTimeEntry->left--;
}
}

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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
This software file (the "File") is owned and distributed by Marvell
International Ltd. and/or its affiliates ("Marvell") under the following
alternative licensing terms. Once you have made an election to distribute the
File under one of the following license alternatives, please (i) delete this
introductory statement regarding license alternatives, (ii) delete the two
license alternatives that you have not elected to use and (iii) preserve the
Marvell copyright notice above.
********************************************************************************
Marvell Commercial License Option
If you received this File from Marvell and you have entered into a commercial
license agreement (a "Commercial License") with Marvell, the File is licensed
to you under the terms of the applicable Commercial License.
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
********************************************************************************
Marvell BSD License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File under the following licensing terms.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Marvell nor the names of its contributors may be
used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#ifndef __INCmvDebugh
#define __INCmvDebugh
/* includes */
#include "mvTypes.h"
typedef enum
{
MV_MODULE_INVALID = -1,
MV_MODULE_ETH = 0,
MV_MODULE_IDMA,
MV_MODULE_XOR,
MV_MODULE_TWASI,
MV_MODULE_MGI,
MV_MODULE_USB,
MV_MODULE_CESA,
MV_MODULE_MAX
}MV_MODULE_ID;
/* Define generic flags useful for most of modules */
#define MV_DEBUG_FLAG_ALL (0)
#define MV_DEBUG_FLAG_INIT (1 << 0)
#define MV_DEBUG_FLAG_RX (1 << 1)
#define MV_DEBUG_FLAG_TX (1 << 2)
#define MV_DEBUG_FLAG_ERR (1 << 3)
#define MV_DEBUG_FLAG_TRACE (1 << 4)
#define MV_DEBUG_FLAG_DUMP (1 << 5)
#define MV_DEBUG_FLAG_CACHE (1 << 6)
#define MV_DEBUG_FLAG_IOCTL (1 << 7)
#define MV_DEBUG_FLAG_STATS (1 << 8)
extern MV_U32 mvDebug;
extern MV_U32 mvDebugModules[MV_MODULE_MAX];
#ifdef MV_DEBUG
# define MV_DEBUG_PRINT(module, flags, msg) mvOsPrintf msg
# define MV_DEBUG_CODE(module, flags, code) code
#elif defined(MV_RT_DEBUG)
# define MV_DEBUG_PRINT(module, flags, msg) \
if( (mvDebug & (1<<(module))) && \
((mvDebugModules[(module)] & (flags)) == (flags)) ) \
mvOsPrintf msg
# define MV_DEBUG_CODE(module, flags, code) \
if( (mvDebug & (1<<(module))) && \
((mvDebugModules[(module)] & (flags)) == (flags)) ) \
code
#else
# define MV_DEBUG_PRINT(module, flags, msg)
# define MV_DEBUG_CODE(module, flags, code)
#endif
/* typedefs */
/* time measurement structure used to check how much time pass between
* two points
*/
typedef struct {
char name[20]; /* name of the entry */
unsigned long begin; /* time measured on begin point */
unsigned long end; /* time measured on end point */
unsigned long total; /* Accumulated time */
unsigned long left; /* The rest measurement actions */
unsigned long count; /* Maximum measurement actions */
unsigned long min; /* Minimum time from begin to end */
unsigned long max; /* Maximum time from begin to end */
} MV_DEBUG_TIMES;
/* mvDebug.h API list */
/****** Error Recording ******/
/* Dump memory in specific format:
* address: X1X1X1X1 X2X2X2X2 ... X8X8X8X8
*/
void mvDebugMemDump(void* addr, int size, int access);
void mvDebugPrintBufInfo(BUF_INFO* pBufInfo, int size, int access);
void mvDebugPrintPktInfo(MV_PKT_INFO* pPktInfo, int size, int access);
void mvDebugPrintIpAddr(MV_U32 ipAddr);
void mvDebugPrintMacAddr(const MV_U8* pMacAddr);
/**** There are three functions deals with MV_DEBUG_TIMES structure ****/
/* Reset MV_DEBUG_TIMES entry */
void mvDebugResetTimeEntry(MV_DEBUG_TIMES* pTimeEntry, int count, char* name);
/* Update MV_DEBUG_TIMES entry */
void mvDebugUpdateTimeEntry(MV_DEBUG_TIMES* pTimeEntry);
/* Print out MV_DEBUG_TIMES entry */
void mvDebugPrintTimeEntry(MV_DEBUG_TIMES* pTimeEntry, MV_BOOL isTitle);
/******** General ***********/
/* Change value of mvDebugPrint global variable */
void mvDebugInit(void);
void mvDebugModuleEnable(MV_MODULE_ID module, MV_BOOL isEnable);
void mvDebugModuleSetFlags(MV_MODULE_ID module, MV_U32 flags);
void mvDebugModuleClearFlags(MV_MODULE_ID module, MV_U32 flags);
#endif /* __INCmvDebug.h */

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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
This software file (the "File") is owned and distributed by Marvell
International Ltd. and/or its affiliates ("Marvell") under the following
alternative licensing terms. Once you have made an election to distribute the
File under one of the following license alternatives, please (i) delete this
introductory statement regarding license alternatives, (ii) delete the two
license alternatives that you have not elected to use and (iii) preserve the
Marvell copyright notice above.
********************************************************************************
Marvell Commercial License Option
If you received this File from Marvell and you have entered into a commercial
license agreement (a "Commercial License") with Marvell, the File is licensed
to you under the terms of the applicable Commercial License.
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
********************************************************************************
Marvell BSD License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File under the following licensing terms.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Marvell nor the names of its contributors may be
used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#ifndef __INCmvDeviceIdh
#define __INCmvDeviceIdh
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
/* defines */
#define MARVELL_VEN_ID 0x11ab
/* Disco-3 */
#define MV64460_DEV_ID 0x6480
#define MV64460B_DEV_ID 0x6485
#define MV64430_DEV_ID 0x6420
/* Disco-5 */
#define MV64560_DEV_ID 0x6450
/* Disco-6 */
#define MV64660_DEV_ID 0x6460
/* Orion */
#define MV_1181_DEV_ID 0x1181
#define MV_5181_DEV_ID 0x5181
#define MV_5281_DEV_ID 0x5281
#define MV_5182_DEV_ID 0x5182
#define MV_8660_DEV_ID 0x8660
#define MV_5180_DEV_ID 0x5180
#define MV_5082_DEV_ID 0x5082
#define MV_1281_DEV_ID 0x1281
#define MV_6082_DEV_ID 0x6082
#define MV_6183_DEV_ID 0x6183
#define MV_6183L_DEV_ID 0x6083
#define MV_5281_D0_REV 0x4
#define MV_5281_D0_ID ((MV_5281_DEV_ID << 16) | MV_5281_D0_REV)
#define MV_5281_D0_NAME "88F5281 D0"
#define MV_5281_D1_REV 0x5
#define MV_5281_D1_ID ((MV_5281_DEV_ID << 16) | MV_5281_D1_REV)
#define MV_5281_D1_NAME "88F5281 D1"
#define MV_5281_D2_REV 0x6
#define MV_5281_D2_ID ((MV_5281_DEV_ID << 16) | MV_5281_D2_REV)
#define MV_5281_D2_NAME "88F5281 D2"
#define MV_5181L_A0_REV 0x8 /* need for PCIE Er */
#define MV_5181_A1_REV 0x1 /* for USB Er ..*/
#define MV_5181_B0_REV 0x2
#define MV_5181_B1_REV 0x3
#define MV_5182_A1_REV 0x1
#define MV_5180N_B1_REV 0x3
#define MV_5181L_A0_ID ((MV_5181_DEV_ID << 16) | MV_5181L_A0_REV)
/* kw */
#define MV_6281_DEV_ID 0x6281
#define MV_6192_DEV_ID 0x6192
#define MV_6190_DEV_ID 0x6190
#define MV_6180_DEV_ID 0x6180
#define MV_6281_A0_REV 0x2
#define MV_6281_A0_ID ((MV_6281_DEV_ID << 16) | MV_6281_A0_REV)
#define MV_6281_A0_NAME "88F6281 A0"
#define MV_6192_A0_REV 0x2
#define MV_6192_A0_ID ((MV_6192_DEV_ID << 16) | MV_6192_A0_REV)
#define MV_6192_A0_NAME "88F6192 A0"
#define MV_6190_A0_REV 0x2
#define MV_6190_A0_ID ((MV_6190_DEV_ID << 16) | MV_6190_A0_REV)
#define MV_6190_A0_NAME "88F6190 A0"
#define MV_6180_A0_REV 0x2
#define MV_6180_A0_ID ((MV_6180_DEV_ID << 16) | MV_6180_A0_REV)
#define MV_6180_A0_NAME "88F6180 A0"
/* Disco-Duo */
#define MV_78XX0_ZY_DEV_ID 0x6381
#define MV_78XX0_ZY_NAME "MV78X00"
#define MV_78XX0_Z0_REV 0x1
#define MV_78XX0_Z0_ID ((MV_78XX0_ZY_DEV_ID << 16) | MV_78XX0_Z0_REV)
#define MV_78XX0_Z0_NAME "78X00 Z0"
#define MV_78XX0_Y0_REV 0x2
#define MV_78XX0_Y0_ID ((MV_78XX0_ZY_DEV_ID << 16) | MV_78XX0_Y0_REV)
#define MV_78XX0_Y0_NAME "78X00 Y0"
#define MV_78XX0_DEV_ID 0x7800
#define MV_78XX0_NAME "MV78X00"
#define MV_78200_DEV_ID 0x7820
#define MV_78100_DEV_ID 0x7810
#define MV_78XX0_A0_REV 0x1
#define MV_78100_NAME "MV78100"
#define MV_78200_NAME "MV78200"
#define MV_78100_A0_ID ((MV_78100_DEV_ID << 16) | MV_78XX0_A0_REV)
#define MV_78200_A0_ID ((MV_78200_DEV_ID << 16) | MV_78XX0_A0_REV)
#define MV_78100_A0_NAME "MV78100 A0"
#define MV_78200_A0_NAME "MV78200 A0"
#define MV_78XX0_A0_NAME "MV78XX0 A0"
#endif /* __INCmvDeviceIdh */

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/*******************************************************************************
* Copyright 2003, Marvell Semiconductor Israel LTD. *
* THIS CODE CONTAINS CONFIDENTIAL INFORMATION OF MARVELL. *
* NO RIGHTS ARE GRANTED HEREIN UNDER ANY PATENT, MASK WORK RIGHT OR COPYRIGHT *
* OF MARVELL OR ANY THIRD PARTY. MARVELL RESERVES THE RIGHT AT ITS SOLE *
* DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO MARVELL. *
* THIS CODE IS PROVIDED "AS IS". MARVELL MAKES NO WARRANTIES, EXPRESSED, *
* IMPLIED OR OTHERWISE, REGARDING ITS ACCURACY, COMPLETENESS OR PERFORMANCE. *
* *
* MARVELL COMPRISES MARVELL TECHNOLOGY GROUP LTD. (MTGL) AND ITS SUBSIDIARIES, *
* MARVELL INTERNATIONAL LTD. (MIL), MARVELL TECHNOLOGY, INC. (MTI), MARVELL *
* SEMICONDUCTOR, INC. (MSI), MARVELL ASIA PTE LTD. (MAPL), MARVELL JAPAN K.K. *
* (MJKK), MARVELL SEMICONDUCTOR ISRAEL LTD (MSIL). *
********************************************************************************
* mvQueue.c
*
* FILENAME: $Workfile: mvStack.c $
* REVISION: $Revision: 1.1.1.1 $
* LAST UPDATE: $Modtime: $
*
* DESCRIPTION:
* This file implements simple Stack LIFO functionality.
*******************************************************************************/
/* includes */
#include "mvOs.h"
#include "mvTypes.h"
#include "mvDebug.h"
#include "mvStack.h"
/* defines */
/* Public functions */
/* Purpose: Create new stack
* Inputs:
* - MV_U32 noOfElements - maximum number of elements in the stack.
* Each element 4 bytes size
* Return: void* - pointer to created stack.
*/
void* mvStackCreate(int numOfElements)
{
MV_STACK* pStack;
MV_U32* pStackElements;
pStack = (MV_STACK*)mvOsMalloc(sizeof(MV_STACK));
pStackElements = (MV_U32*)mvOsMalloc(numOfElements*sizeof(MV_U32));
if( (pStack == NULL) || (pStackElements == NULL) )
{
mvOsPrintf("mvStack: Can't create new stack\n");
return NULL;
}
memset(pStackElements, 0, numOfElements*sizeof(MV_U32));
pStack->numOfElements = numOfElements;
pStack->stackIdx = 0;
pStack->stackElements = pStackElements;
return pStack;
}
/* Purpose: Delete existing stack
* Inputs:
* - void* stackHndl - Stack handle as returned by "mvStackCreate()" function
*
* Return: MV_STATUS MV_NOT_FOUND - Failure. StackHandle is not valid.
* MV_OK - Success.
*/
MV_STATUS mvStackDelete(void* stackHndl)
{
MV_STACK* pStack = (MV_STACK*)stackHndl;
if( (pStack == NULL) || (pStack->stackElements == NULL) )
return MV_NOT_FOUND;
mvOsFree(pStack->stackElements);
mvOsFree(pStack);
return MV_OK;
}
/* PrintOut status of the stack */
void mvStackStatus(void* stackHndl, MV_BOOL isPrintElements)
{
int i;
MV_STACK* pStack = (MV_STACK*)stackHndl;
mvOsPrintf("StackHandle=%p, pElements=%p, numElements=%d, stackIdx=%d\n",
stackHndl, pStack->stackElements, pStack->numOfElements,
pStack->stackIdx);
if(isPrintElements == MV_TRUE)
{
for(i=0; i<pStack->stackIdx; i++)
{
mvOsPrintf("%3d. Value=0x%x\n", i, pStack->stackElements[i]);
}
}
}

140
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/*******************************************************************************
* Copyright 2003, Marvell Semiconductor Israel LTD. *
* THIS CODE CONTAINS CONFIDENTIAL INFORMATION OF MARVELL. *
* NO RIGHTS ARE GRANTED HEREIN UNDER ANY PATENT, MASK WORK RIGHT OR COPYRIGHT *
* OF MARVELL OR ANY THIRD PARTY. MARVELL RESERVES THE RIGHT AT ITS SOLE *
* DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO MARVELL. *
* THIS CODE IS PROVIDED "AS IS". MARVELL MAKES NO WARRANTIES, EXPRESSED, *
* IMPLIED OR OTHERWISE, REGARDING ITS ACCURACY, COMPLETENESS OR PERFORMANCE. *
* *
* MARVELL COMPRISES MARVELL TECHNOLOGY GROUP LTD. (MTGL) AND ITS SUBSIDIARIES, *
* MARVELL INTERNATIONAL LTD. (MIL), MARVELL TECHNOLOGY, INC. (MTI), MARVELL *
* SEMICONDUCTOR, INC. (MSI), MARVELL ASIA PTE LTD. (MAPL), MARVELL JAPAN K.K. *
* (MJKK), MARVELL SEMICONDUCTOR ISRAEL LTD (MSIL). *
********************************************************************************
* mvStack.h - Header File for :
*
* FILENAME: $Workfile: mvStack.h $
* REVISION: $Revision: 1.1.1.1 $
* LAST UPDATE: $Modtime: $
*
* DESCRIPTION:
* This file defines simple Stack (LIFO) functionality.
*
*******************************************************************************/
#ifndef __mvStack_h__
#define __mvStack_h__
/* includes */
#include "mvTypes.h"
/* defines */
/* typedefs */
/* Data structure describes general purpose Stack */
typedef struct
{
int stackIdx;
int numOfElements;
MV_U32* stackElements;
} MV_STACK;
static INLINE MV_BOOL mvStackIsFull(void* stackHndl)
{
MV_STACK* pStack = (MV_STACK*)stackHndl;
if(pStack->stackIdx == pStack->numOfElements)
return MV_TRUE;
return MV_FALSE;
}
static INLINE MV_BOOL mvStackIsEmpty(void* stackHndl)
{
MV_STACK* pStack = (MV_STACK*)stackHndl;
if(pStack->stackIdx == 0)
return MV_TRUE;
return MV_FALSE;
}
/* Purpose: Push new element to stack
* Inputs:
* - void* stackHndl - Stack handle as returned by "mvStackCreate()" function.
* - MV_U32 value - New element.
*
* Return: MV_STATUS MV_FULL - Failure. Stack is full.
* MV_OK - Success. Element is put to stack.
*/
static INLINE void mvStackPush(void* stackHndl, MV_U32 value)
{
MV_STACK* pStack = (MV_STACK*)stackHndl;
#ifdef MV_RT_DEBUG
if(pStack->stackIdx == pStack->numOfElements)
{
mvOsPrintf("mvStackPush: Stack is FULL\n");
return;
}
#endif /* MV_RT_DEBUG */
pStack->stackElements[pStack->stackIdx] = value;
pStack->stackIdx++;
}
/* Purpose: Pop element from the top of stack and copy it to "pValue"
* Inputs:
* - void* stackHndl - Stack handle as returned by "mvStackCreate()" function.
* - MV_U32 value - Element in the top of stack.
*
* Return: MV_STATUS MV_EMPTY - Failure. Stack is empty.
* MV_OK - Success. Element is removed from the stack and
* copied to pValue argument
*/
static INLINE MV_U32 mvStackPop(void* stackHndl)
{
MV_STACK* pStack = (MV_STACK*)stackHndl;
#ifdef MV_RT_DEBUG
if(pStack->stackIdx == 0)
{
mvOsPrintf("mvStackPop: Stack is EMPTY\n");
return 0;
}
#endif /* MV_RT_DEBUG */
pStack->stackIdx--;
return pStack->stackElements[pStack->stackIdx];
}
static INLINE int mvStackIndex(void* stackHndl)
{
MV_STACK* pStack = (MV_STACK*)stackHndl;
return pStack->stackIdx;
}
static INLINE int mvStackFreeElements(void* stackHndl)
{
MV_STACK* pStack = (MV_STACK*)stackHndl;
return (pStack->numOfElements - pStack->stackIdx);
}
/* mvStack.h API list */
/* Create new Stack */
void* mvStackCreate(int numOfElements);
/* Delete existing stack */
MV_STATUS mvStackDelete(void* stackHndl);
/* Print status of the stack */
void mvStackStatus(void* stackHndl, MV_BOOL isPrintElements);
#endif /* __mvStack_h__ */

245
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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
This software file (the "File") is owned and distributed by Marvell
International Ltd. and/or its affiliates ("Marvell") under the following
alternative licensing terms. Once you have made an election to distribute the
File under one of the following license alternatives, please (i) delete this
introductory statement regarding license alternatives, (ii) delete the two
license alternatives that you have not elected to use and (iii) preserve the
Marvell copyright notice above.
********************************************************************************
Marvell Commercial License Option
If you received this File from Marvell and you have entered into a commercial
license agreement (a "Commercial License") with Marvell, the File is licensed
to you under the terms of the applicable Commercial License.
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
********************************************************************************
Marvell BSD License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File under the following licensing terms.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Marvell nor the names of its contributors may be
used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#ifndef __INCmvTypesh
#define __INCmvTypesh
/* Defines */
/* The following is a list of Marvell status */
#define MV_ERROR (-1)
#define MV_OK (0x00) /* Operation succeeded */
#define MV_FAIL (0x01) /* Operation failed */
#define MV_BAD_VALUE (0x02) /* Illegal value (general) */
#define MV_OUT_OF_RANGE (0x03) /* The value is out of range */
#define MV_BAD_PARAM (0x04) /* Illegal parameter in function called */
#define MV_BAD_PTR (0x05) /* Illegal pointer value */
#define MV_BAD_SIZE (0x06) /* Illegal size */
#define MV_BAD_STATE (0x07) /* Illegal state of state machine */
#define MV_SET_ERROR (0x08) /* Set operation failed */
#define MV_GET_ERROR (0x09) /* Get operation failed */
#define MV_CREATE_ERROR (0x0A) /* Fail while creating an item */
#define MV_NOT_FOUND (0x0B) /* Item not found */
#define MV_NO_MORE (0x0C) /* No more items found */
#define MV_NO_SUCH (0x0D) /* No such item */
#define MV_TIMEOUT (0x0E) /* Time Out */
#define MV_NO_CHANGE (0x0F) /* Parameter(s) is already in this value */
#define MV_NOT_SUPPORTED (0x10) /* This request is not support */
#define MV_NOT_IMPLEMENTED (0x11) /* Request supported but not implemented */
#define MV_NOT_INITIALIZED (0x12) /* The item is not initialized */
#define MV_NO_RESOURCE (0x13) /* Resource not available (memory ...) */
#define MV_FULL (0x14) /* Item is full (Queue or table etc...) */
#define MV_EMPTY (0x15) /* Item is empty (Queue or table etc...) */
#define MV_INIT_ERROR (0x16) /* Error occured while INIT process */
#define MV_HW_ERROR (0x17) /* Hardware error */
#define MV_TX_ERROR (0x18) /* Transmit operation not succeeded */
#define MV_RX_ERROR (0x19) /* Recieve operation not succeeded */
#define MV_NOT_READY (0x1A) /* The other side is not ready yet */
#define MV_ALREADY_EXIST (0x1B) /* Tried to create existing item */
#define MV_OUT_OF_CPU_MEM (0x1C) /* Cpu memory allocation failed. */
#define MV_NOT_STARTED (0x1D) /* Not started yet */
#define MV_BUSY (0x1E) /* Item is busy. */
#define MV_TERMINATE (0x1F) /* Item terminates it's work. */
#define MV_NOT_ALIGNED (0x20) /* Wrong alignment */
#define MV_NOT_ALLOWED (0x21) /* Operation NOT allowed */
#define MV_WRITE_PROTECT (0x22) /* Write protected */
#define MV_INVALID (int)(-1)
#define MV_FALSE 0
#define MV_TRUE (!(MV_FALSE))
#ifndef NULL
#define NULL ((void*)0)
#endif
#ifndef MV_ASMLANGUAGE
/* typedefs */
typedef char MV_8;
typedef unsigned char MV_U8;
typedef int MV_32;
typedef unsigned int MV_U32;
typedef short MV_16;
typedef unsigned short MV_U16;
#ifdef MV_PPC64
typedef long MV_64;
typedef unsigned long MV_U64;
#else
typedef long long MV_64;
typedef unsigned long long MV_U64;
#endif
typedef long MV_LONG; /* 32/64 */
typedef unsigned long MV_ULONG; /* 32/64 */
typedef int MV_STATUS;
typedef int MV_BOOL;
typedef void MV_VOID;
typedef float MV_FLOAT;
typedef int (*MV_FUNCPTR) (void); /* ptr to function returning int */
typedef void (*MV_VOIDFUNCPTR) (void); /* ptr to function returning void */
typedef double (*MV_DBLFUNCPTR) (void); /* ptr to function returning double*/
typedef float (*MV_FLTFUNCPTR) (void); /* ptr to function returning float */
typedef MV_U32 MV_KHZ;
typedef MV_U32 MV_MHZ;
typedef MV_U32 MV_HZ;
/* This enumerator describes the set of commands that can be applied on */
/* an engine (e.g. IDMA, XOR). Appling a comman depends on the current */
/* status (see MV_STATE enumerator) */
/* Start can be applied only when status is IDLE */
/* Stop can be applied only when status is IDLE, ACTIVE or PAUSED */
/* Pause can be applied only when status is ACTIVE */
/* Restart can be applied only when status is PAUSED */
typedef enum _mvCommand
{
MV_START, /* Start */
MV_STOP, /* Stop */
MV_PAUSE, /* Pause */
MV_RESTART /* Restart */
} MV_COMMAND;
/* This enumerator describes the set of state conditions. */
/* Moving from one state to other is stricted. */
typedef enum _mvState
{
MV_IDLE,
MV_ACTIVE,
MV_PAUSED,
MV_UNDEFINED_STATE
} MV_STATE;
/* This structure describes address space window. Window base can be */
/* 64 bit, window size up to 4GB */
typedef struct _mvAddrWin
{
MV_U32 baseLow; /* 32bit base low */
MV_U32 baseHigh; /* 32bit base high */
MV_U32 size; /* 32bit size */
}MV_ADDR_WIN;
/* This binary enumerator describes protection attribute status */
typedef enum _mvProtRight
{
ALLOWED, /* Protection attribute allowed */
FORBIDDEN /* Protection attribute forbidden */
}MV_PROT_RIGHT;
/* Unified struct for Rx and Tx packet operations. The user is required to */
/* be familier only with Tx/Rx descriptor command status. */
typedef struct _bufInfo
{
MV_U32 cmdSts; /* Tx/Rx command status */
MV_U16 byteCnt; /* Size of valid data in the buffer */
MV_U16 bufSize; /* Total size of the buffer */
MV_U8 *pBuff; /* Pointer to Buffer */
MV_U8 *pData; /* Pointer to data in the Buffer */
MV_U32 userInfo1; /* Tx/Rx attached user information 1 */
MV_U32 userInfo2; /* Tx/Rx attached user information 2 */
struct _bufInfo *pNextBufInfo; /* Next buffer in packet */
} BUF_INFO;
/* This structure contains information describing one of buffers
* (fragments) they are built Ethernet packet.
*/
typedef struct
{
MV_U8* bufVirtPtr;
MV_ULONG bufPhysAddr;
MV_U32 bufSize;
MV_U32 dataSize;
MV_U32 memHandle;
} MV_BUF_INFO;
/* This structure contains information describing Ethernet packet.
* The packet can be divided for few buffers (fragments)
*/
typedef struct
{
MV_ULONG osInfo;
MV_BUF_INFO *pFrags;
MV_U32 status;
MV_U16 pktSize;
MV_U16 numFrags;
char srcIdx;
MV_U32 fragIP;
} MV_PKT_INFO;
#endif /* MV_ASMLANGUAGE */
#endif /* __INCmvTypesh */

245
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/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
This software file (the "File") is owned and distributed by Marvell
International Ltd. and/or its affiliates ("Marvell") under the following
alternative licensing terms. Once you have made an election to distribute the
File under one of the following license alternatives, please (i) delete this
introductory statement regarding license alternatives, (ii) delete the two
license alternatives that you have not elected to use and (iii) preserve the
Marvell copyright notice above.
********************************************************************************
Marvell Commercial License Option
If you received this File from Marvell and you have entered into a commercial
license agreement (a "Commercial License") with Marvell, the File is licensed
to you under the terms of the applicable Commercial License.
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
********************************************************************************
Marvell BSD License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File under the following licensing terms.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Marvell nor the names of its contributors may be
used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#ifndef __INCmvTypesh
#define __INCmvTypesh
/* Defines */
/* The following is a list of Marvell status */
#define MV_ERROR (-1)
#define MV_OK (0x00) /* Operation succeeded */
#define MV_FAIL (0x01) /* Operation failed */
#define MV_BAD_VALUE (0x02) /* Illegal value (general) */
#define MV_OUT_OF_RANGE (0x03) /* The value is out of range */
#define MV_BAD_PARAM (0x04) /* Illegal parameter in function called */
#define MV_BAD_PTR (0x05) /* Illegal pointer value */
#define MV_BAD_SIZE (0x06) /* Illegal size */
#define MV_BAD_STATE (0x07) /* Illegal state of state machine */
#define MV_SET_ERROR (0x08) /* Set operation failed */
#define MV_GET_ERROR (0x09) /* Get operation failed */
#define MV_CREATE_ERROR (0x0A) /* Fail while creating an item */
#define MV_NOT_FOUND (0x0B) /* Item not found */
#define MV_NO_MORE (0x0C) /* No more items found */
#define MV_NO_SUCH (0x0D) /* No such item */
#define MV_TIMEOUT (0x0E) /* Time Out */
#define MV_NO_CHANGE (0x0F) /* Parameter(s) is already in this value */
#define MV_NOT_SUPPORTED (0x10) /* This request is not support */
#define MV_NOT_IMPLEMENTED (0x11) /* Request supported but not implemented */
#define MV_NOT_INITIALIZED (0x12) /* The item is not initialized */
#define MV_NO_RESOURCE (0x13) /* Resource not available (memory ...) */
#define MV_FULL (0x14) /* Item is full (Queue or table etc...) */
#define MV_EMPTY (0x15) /* Item is empty (Queue or table etc...) */
#define MV_INIT_ERROR (0x16) /* Error occured while INIT process */
#define MV_HW_ERROR (0x17) /* Hardware error */
#define MV_TX_ERROR (0x18) /* Transmit operation not succeeded */
#define MV_RX_ERROR (0x19) /* Recieve operation not succeeded */
#define MV_NOT_READY (0x1A) /* The other side is not ready yet */
#define MV_ALREADY_EXIST (0x1B) /* Tried to create existing item */
#define MV_OUT_OF_CPU_MEM (0x1C) /* Cpu memory allocation failed. */
#define MV_NOT_STARTED (0x1D) /* Not started yet */
#define MV_BUSY (0x1E) /* Item is busy. */
#define MV_TERMINATE (0x1F) /* Item terminates it's work. */
#define MV_NOT_ALIGNED (0x20) /* Wrong alignment */
#define MV_NOT_ALLOWED (0x21) /* Operation NOT allowed */
#define MV_WRITE_PROTECT (0x22) /* Write protected */
#define MV_INVALID (int)(-1)
#define MV_FALSE 0
#define MV_TRUE (!(MV_FALSE))
#ifndef NULL
#define NULL ((void*)0)
#endif
#ifndef MV_ASMLANGUAGE
/* typedefs */
typedef char MV_8;
typedef unsigned char MV_U8;
typedef int MV_32;
typedef unsigned int MV_U32;
typedef short MV_16;
typedef unsigned short MV_U16;
#ifdef MV_PPC64
typedef long MV_64;
typedef unsigned long MV_U64;
#else
typedef long long MV_64;
typedef unsigned long long MV_U64;
#endif
typedef long MV_LONG; /* 32/64 */
typedef unsigned long MV_ULONG; /* 32/64 */
typedef int MV_STATUS;
typedef int MV_BOOL;
typedef void MV_VOID;
typedef float MV_FLOAT;
typedef int (*MV_FUNCPTR) (void); /* ptr to function returning int */
typedef void (*MV_VOIDFUNCPTR) (void); /* ptr to function returning void */
typedef double (*MV_DBLFUNCPTR) (void); /* ptr to function returning double*/
typedef float (*MV_FLTFUNCPTR) (void); /* ptr to function returning float */
typedef MV_U32 MV_KHZ;
typedef MV_U32 MV_MHZ;
typedef MV_U32 MV_HZ;
/* This enumerator describes the set of commands that can be applied on */
/* an engine (e.g. IDMA, XOR). Appling a comman depends on the current */
/* status (see MV_STATE enumerator) */
/* Start can be applied only when status is IDLE */
/* Stop can be applied only when status is IDLE, ACTIVE or PAUSED */
/* Pause can be applied only when status is ACTIVE */
/* Restart can be applied only when status is PAUSED */
typedef enum _mvCommand
{
MV_START, /* Start */
MV_STOP, /* Stop */
MV_PAUSE, /* Pause */
MV_RESTART /* Restart */
} MV_COMMAND;
/* This enumerator describes the set of state conditions. */
/* Moving from one state to other is stricted. */
typedef enum _mvState
{
MV_IDLE,
MV_ACTIVE,
MV_PAUSED,
MV_UNDEFINED_STATE
} MV_STATE;
/* This structure describes address space window. Window base can be */
/* 64 bit, window size up to 4GB */
typedef struct _mvAddrWin
{
MV_U32 baseLow; /* 32bit base low */
MV_U32 baseHigh; /* 32bit base high */
MV_U32 size; /* 32bit size */
}MV_ADDR_WIN;
/* This binary enumerator describes protection attribute status */
typedef enum _mvProtRight
{
ALLOWED, /* Protection attribute allowed */
FORBIDDEN /* Protection attribute forbidden */
}MV_PROT_RIGHT;
/* Unified struct for Rx and Tx packet operations. The user is required to */
/* be familier only with Tx/Rx descriptor command status. */
typedef struct _bufInfo
{
MV_U32 cmdSts; /* Tx/Rx command status */
MV_U16 byteCnt; /* Size of valid data in the buffer */
MV_U16 bufSize; /* Total size of the buffer */
MV_U8 *pBuff; /* Pointer to Buffer */
MV_U8 *pData; /* Pointer to data in the Buffer */
MV_U32 userInfo1; /* Tx/Rx attached user information 1 */
MV_U32 userInfo2; /* Tx/Rx attached user information 2 */
struct _bufInfo *pNextBufInfo; /* Next buffer in packet */
} BUF_INFO;
/* This structure contains information describing one of buffers
* (fragments) they are built Ethernet packet.
*/
typedef struct
{
MV_U8* bufVirtPtr;
MV_ULONG bufPhysAddr;
MV_U32 bufSize;
MV_U32 dataSize;
MV_U32 memHandle;
} MV_BUF_INFO;
/* This structure contains information describing Ethernet packet.
* The packet can be divided for few buffers (fragments)
*/
typedef struct
{
MV_ULONG osInfo;
MV_BUF_INFO *pFrags;
MV_U32 status;
MV_U16 pktSize;
MV_U16 numFrags;
char srcIdx;
MV_U32 fragIP;
} MV_PKT_INFO;
#endif /* MV_ASMLANGUAGE */
#endif /* __INCmvTypesh */

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include mvRules.mk
# Objects list
COMMON_OBJS = $(COMMON_DIR)/mvCommon.o
OSSERVICES_OBJS = $(OSSERVICES_DIR)/mvOs.o $(OSSERVICES_DIR)/mvOsSata.o
BOARD_OBJS = $(BOARD_ENV_DIR)/mvBoardEnvLib.o $(BOARD_ENV_DIR)/mvBoardEnvSpec.o
HAL_OBJS = $(HAL_FLASH_DIR)/mvFlash.o $(HAL_FLASH_DIR)/mvAmdFlash.o $(HAL_FLASH_DIR)/mvIntelFlash.o \
$(HAL_FLASH_DIR)/mvFlashCom.o $(HAL_DRAM_DIR)/mvDram.o $(HAL_DRAM_DIR)/mvDramIf.o \
$(HAL_SATA_CORE_DIR)/mvSata.o $(HAL_SATA_CORE_DIR)/mvStorageDev.o \
$(HAL_SATA_CORE_DIR)/mvLog.o $(HAL_SFLASH_DIR)/mvSFlash.o \
$(HAL_ETHPHY_DIR)/mvEthPhy.o $(HAL_RTC_DIR)/mvDS133x.o \
$(HAL_CNTMR_DIR)/mvCntmr.o $(HAL_TWSI_DIR)/mvTwsi.o \
$(HAL_UART_DIR)/mvUart.o $(HAL_GPP_DIR)/mvGpp.o \
$(HAL_MFLASH_DIR)/mvMFlash.o $(HAL_SPI_DIR)/mvSpi.o \
$(HAL_MFLASH_DIR)/mvSMFlash.o $(HAL_MFLASH_DIR)/mvPMFlash.o \
$(HAL_SPI_DIR)/mvSpiCmnd.o $(HAL_PCI_DIR)/mvPci.o $(HAL_USB_DIR)/mvUsb.o \
$(HAL_IDMA_DIR)/mvIdma.o $(HAL_XOR_DIR)/mvXor.o \
$(HAL_ETH_GBE_DIR)/mvEth.o $(HAL_PCIIF_DIR)/mvPciIf.o \
$(HAL_PEX_DIR)/mvPex.o $(HAL_ETH_SWITCH_DIR)/mvSwitch.o
SOC_OBJS = $(SOC_DIR)/mv_cmd.o $(SOC_DIR)/mv_dram.o $(SOC_DIR)/mv_main.o \
$(SOC_ENV_DIR)/mvCtrlEnvLib.o $(SOC_ENV_DIR)/mvCtrlEnvPadCalibration.o \
$(SOC_ENV_DIR)/mvCtrlEnvAddrDec.o $(SOC_SYS_DIR)/mvAhbToMbus.o \
$(SOC_SYS_DIR)/mvCpuIf.o $(SOC_SYS_DIR)/mvSysXor.o \
$(SOC_SYS_DIR)/mvSysGbe.o $(SOC_SYS_DIR)/mvSysIdma.o $(SOC_SYS_DIR)/mvSysPci.o \
$(SOC_SYS_DIR)/mvSysPex.o $(SOC_SYS_DIR)/mvSysSata.o $(SOC_SYS_DIR)/mvSysUsb.o \
$(SOC_CPU_DIR)/mvCpuArm.o $(SOC_DEVICE_DIR)/mvDevice.o
ifneq ($(MV_TINY_IMAGE), y)
SOC_OBJS += $(HAL_PCIIF_DIR)/pci_util/mvPciUtils.o
endif
USP_OBJS = $(USP_DIR)/mv_flash.o $(USP_DIR)/mv_serial.o \
$(USP_DIR)/mv_pageTable.o $(USP_DIR)/mv_rtc.o $(USP_DIR)/mv_mon_init.o \
$(USP_DIR)/mv_pci.o $(USP_DIR)/mv_nand.o \
$(USP_DIR)/mv_ide.o $(USP_DIR)/mv_egiga.o \
$(USP_DIR)/mv_fs.o $(USP_DIR)/mv_loadnet.o $(USP_DIR)/mv_protectionUnit.o \
$(USP_DIR)/mv_i2c.o $(USP_DIR)/mv_ext2_boot.o
ifeq ($(NAND_BOOT), y)
USP_OBJS += $(USP_DIR)/nBootloader.o
endif
SOBJS = ../USP/jump.o \
../mv_orion/platform.o \
$(HAL_DRAM_DIR)/mvDramIfBasicInit.o \
$(HAL_DRAM_DIR)/mvDramIfConfig.o \
$(HAL_DIR)/twsi/mvTwsiEeprom.o \
$(SOC_SYS_DIR)/mvCpuIfInit.o
ifeq ($(NAND_BOOT), y)
ifeq ($(NAND_LARGE_PAGE), y)
SOBJS += ../mv_orion/nBootstrap_LP.o
else
SOBJS += ../mv_orion/nBootstrap.o
endif
endif
OBJS = $(COMMON_OBJS) $(OSSERVICES_OBJS) $(HAL_OBJS) $(SOC_OBJS) $(BOARD_OBJS) $(USP_OBJS)
LIB = lib$(BOARD).a
all: $(LIB)
$(LIB): .depend $(SOBJS) $(OBJS)
$(AR) crv $@ $(SOBJS) $(OBJS)
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) $(USB_OBJS:.o=.c)
$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) $(USB_OBJS:.o=.c) > $@
sinclude .depend
#########################################################################

5
board/mv_feroceon/config/config.mk Normal file
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#
# image should be loaded at 0x00f10000
#
TEXT_BASE = 0x00200000

4
board/mv_feroceon/config/config_16mb.mk Normal file
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#
# image should be loaded at 0x00c00000
#
TEXT_BASE = 0x00c10000

5
board/mv_feroceon/config/config_def.mk Normal file
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#
# image should be loaded at 0x00f10000
#
TEXT_BASE = 0x00200000

15
board/mv_feroceon/config/config_nand.mk Normal file
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BOOT_TEXT_BASE = 0x00020000
NAND_LDSCRIPT = ./board/$(BOARDDIR)/u-boot-nand.lds
NAND_LDFLAGS += -Bdynamic -T $(NAND_LDSCRIPT) -Ttext $(BOOT_TEXT_BASE) $(PLATFORM_LDFLAGS)
ifeq ($(NAND_LARGE_PAGE), y)
NAND_OBJS = ./board/mv_feroceon/USP/nBootstrap_LP.o
else
NAND_OBJS = ./board/mv_feroceon/USP/nBootstrap.o
endif
NAND_OBJS += ./board/mv_feroceon/USP/nBootloader.o

5
board/mv_feroceon/config/config_prpmc.mk Normal file
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#
# image should be loaded at 0x02f00000
#
TEXT_BASE = 0x02f10000

77
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# This flags will be used only by the Marvell arch files compilation.
include $(TOPDIR)/config.mk
include $(TOPDIR)/include/config.mk
# General definitions
CPU_ARCH = ARM
CHIP = orion
VENDOR = Marvell
ENDIAN = LE
LD_ENDIAN = -EL
ifeq ($(BIG_ENDIAN),y)
ENDIAN = BE
LD_ENDIAN = -EB
endif
# Main directory structure
SRC_PATH = $(TOPDIR)/board/mv_feroceon
HAL_DIR = $(SRC_PATH)/mv_hal
COMMON_DIR = $(SRC_PATH)/common
USP_DIR = $(SRC_PATH)/USP
SOC_DIR = $(SRC_PATH)/mv_$(CHIP)
SYS_DIR = $(SRC_PATH)/mv_$(CHIP)/$(CHIP)_sys
ORION_FAM_DIR = $(SOC_DIR)/$(CHIP)_family
SOC_ENV_DIR = $(ORION_FAM_DIR)/ctrlEnv
SOC_SYS_DIR = $(ORION_FAM_DIR)/ctrlEnv/sys
SOC_CPU_DIR = $(ORION_FAM_DIR)/cpu
SOC_DEVICE_DIR = $(ORION_FAM_DIR)/device
BOARD_ENV_DIR = $(ORION_FAM_DIR)/boardEnv
# HAL components
HAL_DRAM_DIR = $(HAL_DIR)/ddr1_2
HAL_ETHPHY_DIR = $(HAL_DIR)/eth-phy
HAL_ETH_SWITCH_DIR = $(HAL_DIR)/ethswitch
HAL_FLASH_DIR = $(HAL_DIR)/norflash
HAL_PCI_DIR = $(HAL_DIR)/pci
HAL_PCIIF_DIR = $(HAL_DIR)/pci-if
HAL_RTC_DIR = $(HAL_DIR)/rtc/ext_rtc
HAL_SFLASH_DIR = $(HAL_DIR)/sflash
HAL_SATA_CORE_DIR = $(HAL_DIR)/sata/CoreDriver/
HAL_CNTMR_DIR = $(HAL_DIR)/cntmr
HAL_GPP_DIR = $(HAL_DIR)/gpp
HAL_IDMA_DIR = $(HAL_DIR)/idma
HAL_PEX_DIR = $(HAL_DIR)/pex
HAL_TWSI_DIR = $(HAL_DIR)/twsi
HAL_ETH_DIR = $(HAL_DIR)/eth
HAL_ETH_GBE_DIR = $(HAL_DIR)/eth/gbe
HAL_UART_DIR = $(HAL_DIR)/uart
HAL_XOR_DIR = $(HAL_DIR)/xor
HAL_USB_DIR = $(HAL_DIR)/usb
HAL_SATA_DIR = $(HAL_DIR)/sata
HAL_MFLASH_DIR = $(HAL_DIR)/mflash
HAL_SPI_DIR = $(HAL_DIR)/spi
# OS services
OSSERVICES_DIR = $(SRC_PATH)/uboot_oss
# Internal definitions
MV_DEFINE = -DMV_UBOOT -DMV_CPU_$(ENDIAN) -DMV_$(CPU_ARCH)
# Internal include path
HAL_PATH = -I$(HAL_DIR) -I$(HAL_SATA_CORE_DIR)
COMMON_PATH = -I$(COMMON_DIR)
OSSERVICES_PATH = -I$(OSSERVICES_DIR)
USP_PATH = -I$(USP_DIR)
SOC_PATH = -I$(ORION_FAM_DIR) -I$(SOC_DIR) -I$(SOC_ENV_DIR) -I$(SOC_SYS_DIR) -I$(SOC_CPU_DIR) -I$(SOC_DEVICE_DIR)
BOARD_PATH = -I$(BOARD_ENV_DIR)
SYS_PATH = -I$(SYS_DIR)
CFLAGS += $(MV_DEFINE) $(OSSERVICES_PATH) $(HAL_PATH) $(COMMON_PATH) \
$(USP_PATH) $(SOC_PATH) $(BOARD_PATH) $(SYS_PATH)
AFLAGS += $(MV_DEFINE) $(OSSERVICES_PATH) $(HAL_PATH) $(COMMON_PATH) \
$(USP_PATH) $(SOC_PATH) $(BOARD_PATH) $(SYS_PATH)

64
board/mv_feroceon/config/u-boot-nand.lds Normal file
View File

@ -0,0 +1,64 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
.text : { *(.text) }
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
__u_boot_cmd_end = .;
. = ALIGN(4);
_bss_start = .;
.bss : { *(.bss) }
_end = .;
}

73
board/mv_feroceon/config/u-boot-sec128k-tiny.lds Normal file
View File

@ -0,0 +1,73 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start - 0x20000;
.dummy : { board/mv_feroceon/USP/jump.o (.dummy) }
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = _start + 0x30000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

79
board/mv_feroceon/config/u-boot-sec128k.lds Normal file
View File

@ -0,0 +1,79 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start - 0x20000;
.dummy : { board/mv_feroceon/USP/jump.o (.dummy) }
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.got : { *(.got) }
. = _start + 0x70000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x7FFF0;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

79
board/mv_feroceon/config/u-boot-sec256k.lds Normal file
View File

@ -0,0 +1,79 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start - 0x40000;
.dummy : { board/mv_feroceon/USP/jump.o (.dummy) }
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.got : { *(.got) }
. = _start + 0x70000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x7FFF0;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

75
board/mv_feroceon/config/u-boot-sec4k-header-tiny.lds Normal file
View File

@ -0,0 +1,75 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x3ec00;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = _start + 0x3ee00;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

74
board/mv_feroceon/config/u-boot-sec4k-tiny.lds Normal file
View File

@ -0,0 +1,74 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = _start + 0x30000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x3c000;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

74
board/mv_feroceon/config/u-boot-sec4k.lds Normal file
View File

@ -0,0 +1,74 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x70000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

75
board/mv_feroceon/config/u-boot-sec64k-header-nand.lds Normal file
View File

@ -0,0 +1,75 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.got : { *(.got) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x7DC00;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = _start + 0x7DE00;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

76
board/mv_feroceon/config/u-boot-sec64k-header.lds Normal file
View File

@ -0,0 +1,76 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.got : { *(.got) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x6FE00;
.dummy : { board/mv_feroceon/USP/jump.o (.dummy) }
. = _start + 0x7DE00;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

72
board/mv_feroceon/config/u-boot-sec64k-tiny.lds Normal file
View File

@ -0,0 +1,72 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start - 0x10000;
.dummy : { board/mv_feroceon/USP/jump.o (.dummy) }
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = _start + 0x30000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

79
board/mv_feroceon/config/u-boot-sec64k.lds Normal file
View File

@ -0,0 +1,79 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start - 0x10000;
.dummy : { board/mv_feroceon/USP/jump.o (.dummy) }
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.got : { *(.got) }
. = _start + 0x60000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x6FFF0;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

75
board/mv_feroceon/config/u-boot.lds Normal file
View File

@ -0,0 +1,75 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.got : { *(.got) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x7DC00;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = _start + 0x7DE00;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

74
board/mv_feroceon/config/u-boot_16mb.lds Normal file
View File

@ -0,0 +1,74 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
.dummy 0x00c00000 : { board/mv_feroceon/USP/jump.o (.dummy) }
. = 0x0c10000;
. = ALIGN(4);
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
.reset_vector_sect 0x00c70000 : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

77
board/mv_feroceon/config_dd/Makefile Normal file
View File

@ -0,0 +1,77 @@
include mvRules.mk
# Objects list
COMMON_OBJS = $(COMMON_DIR)/mvCommon.o
OSSERVICES_OBJS = $(OSSERVICES_DIR)/mvOs.o $(OSSERVICES_DIR)/mvOsSata.o
BOARD_OBJS = $(BOARD_ENV_DIR)/mvBoardEnvLib.o $(BOARD_ENV_DIR)/mvBoardEnvSpec.o
HAL_OBJS = $(HAL_FLASH_DIR)/mvFlash.o $(HAL_FLASH_DIR)/mvAmdFlash.o $(HAL_FLASH_DIR)/mvIntelFlash.o \
$(HAL_FLASH_DIR)/mvFlashCom.o $(HAL_SPD_DIR)/mvSpd.o $(HAL_DRAM_DIR)/mvDramIf.o \
$(HAL_SATA_CORE_DIR)/mvSata.o $(HAL_SATA_CORE_DIR)/mvStorageDev.o \
$(HAL_SATA_CORE_DIR)/mvLog.o $(HAL_SFLASH_DIR)/mvSFlash.o \
$(HAL_ETHPHY_DIR)/mvEthPhy.o $(HAL_RTC_DIR)/mvDS133x.o \
$(HAL_CNTMR_DIR)/mvCntmr.o $(HAL_TWSI_DIR)/mvTwsi.o \
$(HAL_UART_DIR)/mvUart.o $(HAL_GPP_DIR)/mvGpp.o \
$(HAL_MFLASH_DIR)/mvMFlash.o $(HAL_SPI_DIR)/mvSpi.o \
$(HAL_MFLASH_DIR)/mvSMFlash.o $(HAL_MFLASH_DIR)/mvPMFlash.o \
$(HAL_SPI_DIR)/mvSpiCmnd.o $(HAL_USB_DIR)/mvUsb.o \
$(HAL_IDMA_DIR)/mvIdma.o $(HAL_XOR_DIR)/mvXor.o \
$(HAL_ETH_GBE_DIR)/mvEth.o $(HAL_PCIIF_DIR)/mvPciIf.o \
$(HAL_ETH_GBE_DIR)/mvEthDebug.o $(HAL_PEX_DIR)/mvPex.o \
$(HAL_CESA_DIR)/mvMD5.o
SOC_OBJS = $(SOC_DIR)/mv_cmd.o $(SOC_DIR)/mv_dram.o $(SOC_DIR)/mv_main.o \
$(SOC_DIR)/mv_service.o $(SOC_ENV_DIR)/mvCtrlEnvLib.o \
$(SOC_ENV_DIR)/mvCtrlEnvAddrDec.o $(SOC_SYS_DIR)/mvAhbToMbus.o \
$(SOC_SYS_DIR)/mvCpuIf.o $(SOC_SYS_DIR)/mvSysXor.o $(SOC_SYS_DIR)/mvSysDram.o\
$(SOC_SYS_DIR)/mvSysGbe.o $(SOC_SYS_DIR)/mvSysIdma.o \
$(SOC_SYS_DIR)/mvSysPex.o $(SOC_SYS_DIR)/mvSysSata.o $(SOC_SYS_DIR)/mvSysUsb.o \
$(SOC_DEVICE_DIR)/mvDevice.o $(SOC_CPU_DIR)/mvCpu.o $(HAL_PCIIF_DIR)/pci_util/mvPciUtils.o
USP_OBJS = $(USP_DIR)/mv_flash.o $(USP_DIR)/mv_serial.o \
$(USP_DIR)/mv_pageTable.o $(USP_DIR)/mv_rtc.o $(USP_DIR)/mv_mon_init.o \
$(USP_DIR)/mv_pci.o $(USP_DIR)/mv_nand.o \
$(USP_DIR)/mv_ide.o $(USP_DIR)/mv_egiga.o \
$(USP_DIR)/mv_fs.o $(USP_DIR)/mv_loadnet.o $(USP_DIR)/mv_protectionUnit.o \
$(USP_DIR)/mv_i2c.o $(USP_DIR)/mv_ext2_boot.o \
$(USP_DIR)/ethSwitch/mv_switch.o
ifeq ($(NAND_BOOT), y)
USP_OBJS += $(USP_DIR)/nBootloader.o
endif
SOBJS = $(USP_DIR)/jump.o \
$(SOC_DIR)/platform.o \
$(HAL_DRAM_DIR)/mvDramIfBasicInit.o \
$(HAL_DRAM_DIR)/mvDramIfConfig.o \
$(HAL_TWSI_DIR)/mvTwsiEeprom.o
# $(SOC_SYS_DIR)/mvCpuIfInit.o
ifeq ($(NAND_BOOT), y)
SOBJS += $(USP_DIR)/nBootstrap.o
endif
OBJS = $(COMMON_OBJS) $(OSSERVICES_OBJS) $(HAL_OBJS) $(SOC_OBJS) $(BOARD_OBJS) $(USP_OBJS)
LIB = lib$(BOARD).a
all: $(LIB)
$(LIB): .depend $(SOBJS) $(OBJS)
$(AR) crv $@ $(SOBJS) $(OBJS)
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) $(USB_OBJS:.o=.c)
$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) $(USB_OBJS:.o=.c) > $@
sinclude .depend
#########################################################################

5
board/mv_feroceon/config_dd/config.mk Normal file
View File

@ -0,0 +1,5 @@
#
# image should be loaded at 0x00f10000
#
TEXT_BASE = 0x00600000

5
board/mv_feroceon/config_dd/config_def.mk Normal file
View File

@ -0,0 +1,5 @@
#
# image should be loaded at 0x00f10000
#
TEXT_BASE = 0x00600000

15
board/mv_feroceon/config_dd/config_nand.mk Normal file
View File

@ -0,0 +1,15 @@
BOOT_TEXT_BASE = 0x00020000
NAND_LDSCRIPT = ./board/$(BOARDDIR)/u-boot-nand.lds
NAND_LDFLAGS += -Bdynamic -T $(NAND_LDSCRIPT) -Ttext $(BOOT_TEXT_BASE) $(PLATFORM_LDFLAGS)
ifeq ($(NAND_LARGE_PAGE), y)
NAND_OBJS = ./board/disco/USP/nBootstrap_LP.o
else
NAND_OBJS = ./board/disco/USP/nBootstrap.o
endif
NAND_OBJS += ./board/disco/USP/nBootloader.o

79
board/mv_feroceon/config_dd/mvRules.mk Normal file
View File

@ -0,0 +1,79 @@
# This flags will be used only by the Marvell arch files compilation.
include $(TOPDIR)/config.mk
include $(TOPDIR)/include/config.mk
# General definitions
CPU_ARCH = ARM
CHIP = dd
VENDOR = Marvell
ENDIAN = LE
LD_ENDIAN = -EL
ifeq ($(BIG_ENDIAN),y)
ENDIAN = BE
LD_ENDIAN = -EB
endif
# Main directory structure
SRC_PATH = $(TOPDIR)/board/mv_feroceon
HAL_DIR = $(SRC_PATH)/mv_hal
COMMON_DIR = $(SRC_PATH)/common
USP_DIR = $(SRC_PATH)/USP
SOC_DIR = $(SRC_PATH)/mv_$(CHIP)
ORION_FAM_DIR = $(SOC_DIR)/$(CHIP)_family
SOC_ENV_DIR = $(ORION_FAM_DIR)/ctrlEnv
SOC_SYS_DIR = $(ORION_FAM_DIR)/ctrlEnv/sys
SOC_CPU_DIR = $(ORION_FAM_DIR)/cpu
SOC_DEVICE_DIR = $(ORION_FAM_DIR)/device
BOARD_ENV_DIR = $(ORION_FAM_DIR)/boardEnv
# HAL components
HAL_DRAM_DIR = $(HAL_DIR)/ddr2
HAL_SPD_DIR = $(HAL_DRAM_DIR)/spd
HAL_ETHPHY_DIR = $(HAL_DIR)/eth-phy
HAL_FLASH_DIR = $(HAL_DIR)/norflash
HAL_PCI_DIR = $(HAL_DIR)/pci
HAL_PCIIF_DIR = $(HAL_DIR)/pci-if
HAL_RTC_DIR = $(HAL_DIR)/rtc/ext_rtc
HAL_SFLASH_DIR = $(HAL_DIR)/sflash
HAL_SATA_CORE_DIR = $(HAL_DIR)/sata/CoreDriver/
HAL_CNTMR_DIR = $(HAL_DIR)/cntmr
HAL_GPP_DIR = $(HAL_DIR)/gpp
HAL_IDMA_DIR = $(HAL_DIR)/idma
HAL_PEX_DIR = $(HAL_DIR)/pex
HAL_TWSI_DIR = $(HAL_DIR)/twsi
HAL_TWSI_ARCH_DIR = $(HAL_TWSI_DIR)/Arch$(CPU_ARCH)
HAL_ETH_DIR = $(HAL_DIR)/eth
HAL_ETH_GBE_DIR = $(HAL_ETH_DIR)/gbe
HAL_UART_DIR = $(HAL_DIR)/uart
HAL_XOR_DIR = $(HAL_DIR)/xor
HAL_USB_DIR = $(HAL_DIR)/usb
HAL_SATA_DIR = $(HAL_DIR)/sata
HAL_MFLASH_DIR = $(HAL_DIR)/mflash
HAL_SPI_DIR = $(HAL_DIR)/spi
HAL_TS_DIR = $(HAL_DIR)/ts
HAL_AUDIO_DIR = $(HAL_DIR)/audio
HAL_CESA_DIR = $(HAL_DIR)/cesa
# OS services
OSSERVICES_DIR = $(SRC_PATH)/uboot_oss
# Internal definitions
MV_DEFINE = -DMV_UBOOT -DMV_CPU_$(ENDIAN) -DMV_$(CPU_ARCH)
# Internal include path
HAL_PATH = -I$(HAL_DIR) -I$(HAL_SATA_CORE_DIR)
COMMON_PATH = -I$(COMMON_DIR)
OSSERVICES_PATH = -I$(OSSERVICES_DIR)
USP_PATH = -I$(USP_DIR)
SOC_PATH = -I$(ORION_FAM_DIR) -I$(SOC_DIR) -I$(SOC_ENV_DIR) -I$(SOC_SYS_DIR) -I$(SOC_CPU_DIR) -I$(SOC_DEVICE_DIR)
BOARD_PATH = -I$(BOARD_ENV_DIR)
CFLAGS += $(MV_DEFINE) $(OSSERVICES_PATH) $(HAL_PATH) $(COMMON_PATH) \
$(USP_PATH) $(SOC_PATH) $(BOARD_PATH) $(SYS_PATH)
AFLAGS += $(MV_DEFINE) $(OSSERVICES_PATH) $(HAL_PATH) $(COMMON_PATH) \
$(USP_PATH) $(SOC_PATH) $(BOARD_PATH) $(SYS_PATH)

64
board/mv_feroceon/config_dd/u-boot-nand.lds Normal file
View File

@ -0,0 +1,64 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
.text : { *(.text) }
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
__u_boot_cmd_end = .;
. = ALIGN(4);
_bss_start = .;
.bss : { *(.bss) }
_end = .;
}

79
board/mv_feroceon/config_dd/u-boot-sec128k.lds Normal file
View File

@ -0,0 +1,79 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start - 0x20000;
.dummy : { board/disco/USP/jump.o (.dummy) }
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.got : { *(.got) }
. = _start + 0x70000;
.reset_vector_sect : { board/disco/USP/jump.o (.reset_vector_sect) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x7FFF0;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

79
board/mv_feroceon/config_dd/u-boot.lds Normal file
View File

@ -0,0 +1,79 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start - 0x10000;
.dummy : { board/mv_feroceon/USP/jump.o (.dummy) }
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.got : { *(.got) }
. = _start + 0x60000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x6FFF0;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

79
board/mv_feroceon/config_dd/u-boot_def.lds Normal file
View File

@ -0,0 +1,79 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start - 0x10000;
.dummy : { board/mv_feroceon/USP/jump.o (.dummy) }
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.got : { *(.got) }
. = _start + 0x60000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x6FFF0;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

77
board/mv_feroceon/config_kw/Makefile Normal file
View File

@ -0,0 +1,77 @@
include mvRules.mk
# Objects list
COMMON_OBJS = $(COMMON_DIR)/mvCommon.o
OSSERVICES_OBJS = $(OSSERVICES_DIR)/mvOs.o $(OSSERVICES_DIR)/mvOsSata.o
BOARD_OBJS = $(BOARD_ENV_DIR)/mvBoardEnvLib.o $(BOARD_ENV_DIR)/mvBoardEnvSpec.o
HAL_OBJS = $(HAL_FLASH_DIR)/mvFlash.o $(HAL_FLASH_DIR)/mvAmdFlash.o $(HAL_FLASH_DIR)/mvIntelFlash.o \
$(HAL_FLASH_DIR)/mvFlashCom.o $(HAL_SPD_DIR)/mvSpd.o $(HAL_DRAM_DIR)/mvDramIf.o \
$(HAL_SATA_CORE_DIR)/mvSata.o $(HAL_SATA_CORE_DIR)/mvStorageDev.o \
$(HAL_SATA_CORE_DIR)/mvLog.o $(HAL_SFLASH_DIR)/mvSFlash.o \
$(HAL_ETHPHY_DIR)/mvEthPhy.o $(HAL_RTC_DIR)/mvRtc.o \
$(HAL_CNTMR_DIR)/mvCntmr.o $(HAL_TWSI_DIR)/mvTwsi.o \
$(HAL_UART_DIR)/mvUart.o $(HAL_GPP_DIR)/mvGpp.o \
$(HAL_SPI_DIR)/mvSpi.o $(HAL_SPI_DIR)/mvSpiCmnd.o $(HAL_USB_DIR)/mvUsb.o \
$(HAL_XOR_DIR)/mvXor.o $(HAL_ETH_GBE_DIR)/mvEth.o $(HAL_PCIIF_DIR)/mvPciIf.o \
$(HAL_ETH_GBE_DIR)/mvEthDebug.o $(HAL_PEX_DIR)/mvPex.o $(HAL_AUDIO_DIR)/mvAudio.o \
$(HAL_TS_DIR)/mvTsu.o $(HAL_CESA_DIR)/mvMD5.o $(HAL_ETH_SWITCH_DIR)/mvSwitch.o
SOC_OBJS = $(SOC_DIR)/mv_cmd.o $(SOC_DIR)/mv_dram.o $(SOC_DIR)/mv_main.o \
$(SOC_ENV_DIR)/mvCtrlEnvLib.o \
$(SOC_ENV_DIR)/mvCtrlEnvAddrDec.o $(SOC_SYS_DIR)/mvAhbToMbus.o \
$(SOC_SYS_DIR)/mvCpuIf.o $(SOC_SYS_DIR)/mvSysXor.o $(SOC_SYS_DIR)/mvSysDram.o \
$(SOC_SYS_DIR)/mvSysGbe.o $(SOC_SYS_DIR)/mvSysAudio.o $(SOC_SYS_DIR)/mvSysTs.o\
$(SOC_SYS_DIR)/mvSysPex.o $(SOC_SYS_DIR)/mvSysSata.o $(SOC_SYS_DIR)/mvSysUsb.o \
$(SOC_CPU_DIR)/mvCpu.o $(SOC_DEVICE_DIR)/mvDevice.o
ifneq ($(MV_TINY_IMAGE), y)
SOC_OBJS += $(HAL_PCIIF_DIR)/pci_util/mvPciUtils.o
endif
USP_OBJS = $(USP_DIR)/mv_flash.o $(USP_DIR)/mv_serial.o \
$(USP_DIR)/mv_pageTable.o $(USP_DIR)/mv_rtc.o $(USP_DIR)/mv_mon_init.o \
$(USP_DIR)/mv_pci.o $(USP_DIR)/mv_nand.o \
$(USP_DIR)/mv_ide.o $(USP_DIR)/mv_egiga.o \
$(USP_DIR)/mv_fs.o $(USP_DIR)/mv_loadnet.o $(USP_DIR)/mv_protectionUnit.o \
$(USP_DIR)/mv_i2c.o $(USP_DIR)/mv_ext2_boot.o
ifeq ($(NAND_BOOT), y)
USP_OBJS += $(USP_DIR)/nBootloader.o
endif
SOBJS = $(USP_DIR)/jump.o \
$(SOC_DIR)/platform.o \
$(HAL_DRAM_DIR)/mvDramIfBasicInit.o \
$(HAL_DRAM_DIR)/mvDramIfConfig.o \
$(HAL_TWSI_DIR)/mvTwsiEeprom.o \
$(SOC_SYS_DIR)/mvCpuIfInit.o
ifeq ($(NAND_BOOT), y)
SOBJS += ../mv_kw/nBootstrap.o
endif
OBJS = $(COMMON_OBJS) $(OSSERVICES_OBJS) $(HAL_OBJS) $(SOC_OBJS) $(BOARD_OBJS) $(USP_OBJS)
LIB = lib$(BOARD).a
all: $(LIB)
$(LIB): .depend $(SOBJS) $(OBJS)
$(AR) crv $@ $(SOBJS) $(OBJS)
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) $(USB_OBJS:.o=.c)
$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) $(USB_OBJS:.o=.c) > $@
sinclude .depend
#########################################################################

13
board/mv_feroceon/config_kw/config.mk Normal file
View File

@ -0,0 +1,13 @@
#
# image should be loaded at 0x00600000
#
TEXT_BASE = 0x00600000
BOOT_TEXT_BASE = 0x00020000
NAND_LDSCRIPT = ./board/$(BOARDDIR)/u-boot-nand.lds
NAND_LDFLAGS += -Bdynamic -T $(NAND_LDSCRIPT) -Ttext $(BOOT_TEXT_BASE) $(PLATFORM_LDFLAGS)
NAND_OBJS = ./board/mv_feroceon/mv_kw/nBootstrap.o
NAND_OBJS += ./board/mv_feroceon/USP/nBootloader.o

4
board/mv_feroceon/config_kw/config_16mb.mk Normal file
View File

@ -0,0 +1,4 @@
#
# image should be loaded at 0x00c00000
#
TEXT_BASE = 0x00c10000

5
board/mv_feroceon/config_kw/config_def.mk Normal file
View File

@ -0,0 +1,5 @@
#
# image should be loaded at 0x00600000
#
TEXT_BASE = 0x00600000

8
board/mv_feroceon/config_kw/config_nand.mk Normal file
View File

@ -0,0 +1,8 @@
BOOT_TEXT_BASE = 0x00020000
NAND_LDSCRIPT = ./board/$(BOARDDIR)/u-boot-nand.lds
NAND_LDFLAGS += -Bdynamic -T $(NAND_LDSCRIPT) -Ttext $(BOOT_TEXT_BASE) $(PLATFORM_LDFLAGS)
NAND_OBJS = ./board/mv_feroceon/mv_kw/nBootstrap.o
NAND_OBJS += ./board/mv_feroceon/USP/nBootloader.o

5
board/mv_feroceon/config_kw/config_prpmc.mk Normal file
View File

@ -0,0 +1,5 @@
#
# image should be loaded at 0x02f00000
#
TEXT_BASE = 0x02f10000

80
board/mv_feroceon/config_kw/mvRules.mk Normal file
View File

@ -0,0 +1,80 @@
# This flags will be used only by the Marvell arch files compilation.
include $(TOPDIR)/config.mk
include $(TOPDIR)/include/config.mk
# General definitions
CPU_ARCH = ARM
CHIP = kw
VENDOR = Marvell
ENDIAN = LE
LD_ENDIAN = -EL
ifeq ($(BIG_ENDIAN),y)
ENDIAN = BE
LD_ENDIAN = -EB
endif
# Main directory structure
SRC_PATH = $(TOPDIR)/board/mv_feroceon
HAL_DIR = $(SRC_PATH)/mv_hal
COMMON_DIR = $(SRC_PATH)/common
USP_DIR = $(SRC_PATH)/USP
SOC_DIR = $(SRC_PATH)/mv_$(CHIP)
ORION_FAM_DIR = $(SOC_DIR)/$(CHIP)_family
SOC_ENV_DIR = $(ORION_FAM_DIR)/ctrlEnv
SOC_SYS_DIR = $(ORION_FAM_DIR)/ctrlEnv/sys
SOC_CPU_DIR = $(ORION_FAM_DIR)/cpu
SOC_DEVICE_DIR = $(ORION_FAM_DIR)/device
BOARD_ENV_DIR = $(ORION_FAM_DIR)/boardEnv
# HAL components
HAL_DRAM_DIR = $(HAL_DIR)/ddr2
HAL_SPD_DIR = $(HAL_DRAM_DIR)/spd
HAL_ETHPHY_DIR = $(HAL_DIR)/eth-phy
HAL_ETH_SWITCH_DIR = $(HAL_DIR)/ethswitch
HAL_FLASH_DIR = $(HAL_DIR)/norflash
HAL_PCI_DIR = $(HAL_DIR)/pci
HAL_PCIIF_DIR = $(HAL_DIR)/pci-if
HAL_RTC_DIR = $(HAL_DIR)/rtc/integ_rtc
HAL_SFLASH_DIR = $(HAL_DIR)/sflash
HAL_SATA_CORE_DIR = $(HAL_DIR)/sata/CoreDriver/
HAL_CNTMR_DIR = $(HAL_DIR)/cntmr
HAL_GPP_DIR = $(HAL_DIR)/gpp
HAL_IDMA_DIR = $(HAL_DIR)/idma
HAL_PEX_DIR = $(HAL_DIR)/pex
HAL_TWSI_DIR = $(HAL_DIR)/twsi
HAL_TWSI_ARCH_DIR = $(HAL_TWSI_DIR)/Arch$(CPU_ARCH)
HAL_ETH_DIR = $(HAL_DIR)/eth
HAL_ETH_GBE_DIR = $(HAL_ETH_DIR)/gbe
HAL_UART_DIR = $(HAL_DIR)/uart
HAL_XOR_DIR = $(HAL_DIR)/xor
HAL_USB_DIR = $(HAL_DIR)/usb
HAL_SATA_DIR = $(HAL_DIR)/sata
HAL_MFLASH_DIR = $(HAL_DIR)/mflash
HAL_SPI_DIR = $(HAL_DIR)/spi
HAL_TS_DIR = $(HAL_DIR)/ts
HAL_AUDIO_DIR = $(HAL_DIR)/audio
HAL_CESA_DIR = $(HAL_DIR)/cesa
# OS services
OSSERVICES_DIR = $(SRC_PATH)/uboot_oss
# Internal definitions
MV_DEFINE = -DMV_UBOOT -DMV_CPU_$(ENDIAN) -DMV_$(CPU_ARCH)
# Internal include path
HAL_PATH = -I$(HAL_DIR) -I$(HAL_SATA_CORE_DIR)
COMMON_PATH = -I$(COMMON_DIR)
OSSERVICES_PATH = -I$(OSSERVICES_DIR)
USP_PATH = -I$(USP_DIR)
SOC_PATH = -I$(ORION_FAM_DIR) -I$(SOC_DIR) -I$(SOC_ENV_DIR) -I$(SOC_SYS_DIR) -I$(SOC_CPU_DIR) -I$(SOC_DEVICE_DIR)
BOARD_PATH = -I$(BOARD_ENV_DIR)
CFLAGS += $(MV_DEFINE) $(OSSERVICES_PATH) $(HAL_PATH) $(COMMON_PATH) \
$(USP_PATH) $(SOC_PATH) $(BOARD_PATH) $(SYS_PATH)
AFLAGS += $(MV_DEFINE) $(OSSERVICES_PATH) $(HAL_PATH) $(COMMON_PATH) \
$(USP_PATH) $(SOC_PATH) $(BOARD_PATH) $(SYS_PATH)

64
board/mv_feroceon/config_kw/u-boot-nand.lds Normal file
View File

@ -0,0 +1,64 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
.text : { *(.text) }
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
__u_boot_cmd_end = .;
. = ALIGN(4);
_bss_start = .;
.bss : { *(.bss) }
_end = .;
}

73
board/mv_feroceon/config_kw/u-boot-sec128k-tiny.lds Normal file
View File

@ -0,0 +1,73 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start - 0x20000;
.dummy : { board/mv_feroceon/USP/jump.o (.dummy) }
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = _start + 0x30000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

77
board/mv_feroceon/config_kw/u-boot-sec128k.lds Normal file
View File

@ -0,0 +1,77 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.got : { *(.got) }
. = _start + 0x70000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x7FFF0;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

77
board/mv_feroceon/config_kw/u-boot-sec256k.lds Normal file
View File

@ -0,0 +1,77 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.got : { *(.got) }
. = _start + 0x70000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x7FFF0;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

75
board/mv_feroceon/config_kw/u-boot-sec4k-header-tiny.lds Normal file
View File

@ -0,0 +1,75 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x3ec00;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = _start + 0x3ee00;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

74
board/mv_feroceon/config_kw/u-boot-sec4k-tiny.lds Normal file
View File

@ -0,0 +1,74 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = _start + 0x30000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x3c000;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

74
board/mv_feroceon/config_kw/u-boot-sec4k.lds Normal file
View File

@ -0,0 +1,74 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x70000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

75
board/mv_feroceon/config_kw/u-boot-sec64k-header-nand.lds Normal file
View File

@ -0,0 +1,75 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.got : { *(.got) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x7DC00;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = _start + 0x7DE00;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

76
board/mv_feroceon/config_kw/u-boot-sec64k-header.lds Normal file
View File

@ -0,0 +1,76 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.got : { *(.got) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x6FE00;
.dummy : { board/mv_feroceon/USP/jump.o (.dummy) }
. = _start + 0x7DE00;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

72
board/mv_feroceon/config_kw/u-boot-sec64k-tiny.lds Normal file
View File

@ -0,0 +1,72 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start - 0x10000;
.dummy : { board/mv_feroceon/USP/jump.o (.dummy) }
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = _start + 0x30000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

77
board/mv_feroceon/config_kw/u-boot-sec64k.lds Normal file
View File

@ -0,0 +1,77 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.got : { *(.got) }
. = _start + 0x60000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x6FFF0;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

77
board/mv_feroceon/config_kw/u-boot.lds Normal file
View File

@ -0,0 +1,77 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = _start;
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.got : { *(.got) }
. = _start + 0x70000;
.reset_vector_sect : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = _start + 0x7FFF0;
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

74
board/mv_feroceon/config_kw/u-boot_16mb.lds Normal file
View File

@ -0,0 +1,74 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*******************************************************************************
Copyright (C) Marvell International Ltd. and its affiliates
********************************************************************************
Marvell GPL License Option
If you received this File from Marvell, you may opt to use, redistribute and/or
modify this File in accordance with the terms and conditions of the General
Public License Version 2, June 1991 (the "GPL License"), a copy of which is
available along with the File in the license.txt file or by writing to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
DISCLAIMED. The GPL License provides additional details about this warranty
disclaimer.
*******************************************************************************/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
.dummy 0x00c00000 : { board/mv_feroceon/USP/jump.o (.dummy) }
. = 0x0c10000;
. = ALIGN(4);
.text :
{
cpu/arm926ejs/start.o (.text)
*(.text)
}
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
.reset_vector_sect 0x00c70000 : { board/mv_feroceon/USP/jump.o (.reset_vector_sect) }
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

1420
board/mv_feroceon/mv_dd/dd_family/boardEnv/mvBoardEnvLib.c Normal file
View File

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