110 lines
5.0 KiB
C
110 lines
5.0 KiB
C
/*******************************************************************************
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Copyright (C) Marvell International Ltd. and its affiliates
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This software file (the "File") is owned and distributed by Marvell
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International Ltd. and/or its affiliates ("Marvell") under the following
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alternative licensing terms. Once you have made an election to distribute the
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File under one of the following license alternatives, please (i) delete this
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introductory statement regarding license alternatives, (ii) delete the two
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license alternatives that you have not elected to use and (iii) preserve the
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Marvell copyright notice above.
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********************************************************************************
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Marvell Commercial License Option
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If you received this File from Marvell and you have entered into a commercial
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license agreement (a "Commercial License") with Marvell, the File is licensed
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to you under the terms of the applicable Commercial License.
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********************************************************************************
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Marvell GPL License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File in accordance with the terms and conditions of the General
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Public License Version 2, June 1991 (the "GPL License"), a copy of which is
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available along with the File in the license.txt file or by writing to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
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on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
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THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
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WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
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DISCLAIMED. The GPL License provides additional details about this warranty
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disclaimer.
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********************************************************************************
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Marvell BSD License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File under the following licensing terms.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of Marvell nor the names of its contributors may be
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used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************/
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#ifndef __INCethswitchregsh
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#define __INCethswitchregsh
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#define MV_SWITCH_PORT_CONTROL_REG 0x4
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#define MV_SWITCH_PORT_VMAP_REG 0x6
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#define MV_SWITCH_PORT_VID_REG 0x7
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#define MV_SWITCH_PORT_OFFSET(port) (switchPortsOffset+port)
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/* E6063 related */
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#define MV_E6063_CPU_PORT 5
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#define MV_E6063_PORTS_OFFSET 0x8
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#define MV_E6063_MAX_PORTS_NUM 7
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#define MV_E6063_ENABLED_PORTS ((1 << 0)|(1 << 1)|(1 << 2)| \
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(1 << 3)|(1 << 4)|(1 << 5))
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/* E6065 related */
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#define MV_E6065_CPU_PORT 5
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#define MV_E6065_PORTS_OFFSET 0x8
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#define MV_E6065_MAX_PORTS_NUM 6
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#define MV_E6065_ENABLED_PORTS ((1 << 0)|(1 << 1)|(1 << 2)|(1 << 3)|(1 << 4)|(1 << 5))
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/* E6063 related */
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#define MV_E6131_CPU_PORT 0x3
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#define MV_E6131_PORTS_OFFSET 0x10
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#define MV_E6131_MAX_PORTS_NUM 8
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#define MV_E6131_ENABLED_PORTS ((1 << 0)|(1 << 1)|(1 << 2)| \
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(1 << 3)|(1 << 5)|(1 << 7))
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/* E6161 related */
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#define MV_E6161_CPU_PORT 0x5
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#define MV_E6161_PORTS_OFFSET 0x10
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#define MV_E6161_SMI_PHY_COMMAND 0x18
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#define MV_E6161_SMI_PHY_DATA 0x19
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#define MV_E6161_GLOBAL_2_REG_DEV_ADDR 0x1C
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#define MV_E6161_MAX_PORTS_NUM 6
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#define MV_E6161_ENABLED_PORTS ((1 << 0)|(1 << 1)|(1 << 2)|(1 << 3)|(1 << 4)|(1 << 5))
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#define E6161_PHY_TIMEOUT 10000
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#define E6161_PHY_SMI_BUSY_BIT 15 /* Busy */
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#define E6161_PHY_SMI_BUSY_MASK (1 << ETH_PHY_SMI_BUSY_BIT)
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#endif /* __INCethswitchregsh */
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