549 lines
17 KiB
C
549 lines
17 KiB
C
/*
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* (C) Copyright 2001
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* Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* board/config.h - configuration options, board specific
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include "../../board/mv_feroceon/mv_dd/mvSysHwConfig.h"
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/************/
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/* VERSIONS */
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/************/
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#define BUILD_TAG "3.2.5"
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#define CONFIG_IDENT_STRING " Marvell version: 3.2.5"
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/* version number passing when loading Kernel */
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#define VER_NUM 0x03020500 /* 3.2.5 */
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/* magic word pass when booting Kernel */
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#define MV_UBOOT_MAGIC 0xa0b1c2d3
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/********************/
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/* MV DEV SUPPORTS */
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/********************/
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#define CONFIG_PCI /* pci support */
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#define CONFIG_PCI_1 /* sec pci interface support */
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#define CONFIG_INTERNAL_SRAM /* internal SRAM */
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#undef CONFIG_SNOOP_SUPPORT /* Snoop Support */
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#define CONFIG_XOR /* Xor engine Support */
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/**********************************/
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/* Marvell Monitor Extension */
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/**********************************/
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#define enaMonExt() ( /*(!getenv("enaMonExt")) ||\ */ \
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( getenv("enaMonExt") && \
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((!strcmp(getenv("enaMonExt"),"yes")) ||\
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(!strcmp(getenv("enaMonExt"),"Yes"))) \
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)\
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)
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/*Dual CPU support*/
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#define MASTER_CPU 0
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#define SLAVE_CPU 1
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/********/
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/* CLKs */
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/********/
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#ifndef __ASSEMBLY__
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extern unsigned int mvSysClkGet(void);
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extern unsigned int mvTclkGet(void);
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extern unsigned int mvMclkGet(void);
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#define UBOOT_CNTR 0 /* counter to use for uboot timer */
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#define CFG_HZ 1000
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#define CFG_TCLK mvTclkGet()
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#define CFG_BUS_HZ mvSysClkGet()
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#define CFG_BUS_CLK CFG_BUS_HZ
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#endif
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/********************/
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/* PT settings */
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/********************/
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#define CFG_MV_PT
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#ifdef CFG_MV_PT
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#define TOTAL_PAGE_TABLE (8<<20) /* 8M */
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#else
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#define TOTAL_PAGE_TABLE 0
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#endif
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/*************************************/
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/* High Level Configuration Options */
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/* (easy to change) */
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/*************************************/
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#define CONFIG_MARVELL
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/* commands */
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#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
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CONFIG_BOOTP_BOOTFILESIZE)
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#if defined(DB_MV78XX0)
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#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
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| CFG_CMD_I2C \
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| CFG_CMD_EEPROM \
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| CFG_CMD_DATE \
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| CFG_CMD_PCI \
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| CFG_CMD_NET \
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| CFG_CMD_PING \
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| CFG_CMD_JFFS2 \
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| CFG_CMD_BSP \
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| CFG_CMD_EXT2 \
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| CFG_CMD_IDE \
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| CFG_CMD_MISC \
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| CFG_CMD_NAND) \
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& ~CFG_CMD_RCVR)
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#elif defined(RD_MV78XX0_H3C)
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#define CONFIG_COMMANDS (((CONFIG_CMD_DFL \
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| CFG_CMD_I2C \
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| CFG_CMD_EEPROM \
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| CFG_CMD_DATE \
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| CFG_CMD_PCI \
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| CFG_CMD_NET \
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| CFG_CMD_PING \
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| CFG_CMD_BSP \
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| CFG_CMD_EXT2 \
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| CFG_CMD_IDE) \
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| CFG_CMD_FLASH) \
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& ~CFG_CMD_IMLS \
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& ~CFG_CMD_NAND)
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#elif defined(RD_MV78XX0_AMC) || defined(RD_MV78XX0_MASA)
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#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
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| CFG_CMD_I2C \
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| CFG_CMD_EEPROM \
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| CFG_CMD_DATE \
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| CFG_CMD_PCI \
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| CFG_CMD_NET \
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| CFG_CMD_PING \
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| CFG_CMD_BSP \
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| CFG_CMD_EXT2 \
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| CFG_CMD_IDE \
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| CFG_CMD_NAND) \
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& ~CFG_CMD_IMLS \
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& ~CFG_CMD_FLASH)
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#endif
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/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
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#include <cmd_confdefs.h>
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#define CFG_MAXARGS 16 /* max number of command args */
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/* which initialization functions to call for this board */
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#define CONFIG_MISC_INIT_F /* before relloc */
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#define CONFIG_MISC_INIT_R /* after relloc initialization*/
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#define CONFIG_BOARD_EARLY_INIT_F /* first c function, will initialize the board */
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#define CONFIG_BOARD_EARLY_INIT_R
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#define CFG_BOARD_ASM_INIT 1 /* init in asm before moving to c code*/
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#undef CONFIG_DISPLAY_MEMMAP /* at the end of the bootprocess show the memory map*/
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#define CONFIG_ENV_OVERWRITE /*allow to change env parameters */
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#undef CONFIG_WATCHDOG /* watchdog disabled */
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#undef CONFIG_ALTIVEC /* undef to disable */
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/* Boot Flags*/
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#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
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#define BOOTFLAG_WARM 0x02 /* Software reboot */
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/* L2 Cache */
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/* see also env parameter enaL2 */
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#define CFG_L2
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#define L2_INIT 0
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#define L2_ENABLE (L2_INIT | L2CR_L2E)
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#define CFG_CACHELINE_SIZE 32 /* For all CPUs */
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/* global definetions. */
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#define CFG_SDRAM_BASE 0x00000000
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#define CFG_FLASH_BASE BOOTDEV_CS_BASE
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#define CFG_FLASH_SIZE BOOTDEV_CS_SIZE
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#define CFG_RESET_ADDRESS 0xffff0000
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#define CFG_MONITOR_LEN (448 << 10) /* Reserve 448 kB for Monitor */
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#define CFG_MONITOR_BASE (0xFFFFFFFF - CFG_MONITOR_LEN + 1)
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/* change memory map, the U-boot will sit in 7M */
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/* the malloc area will be 1M */
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#define CFG_UBOOT_TOP (8 << 20) /* 8M */
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#define CFG_MALLOC_LEN (1 << 20) /* (default) Reserve 1MB for malloc*/
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#define CFG_MALLOC_BASE (TEXT_BASE + (1 << 20)) /* 7M */
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#define CFG_GUNZIP_LEN (1 << 20)
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#undef CONFIG_VERY_BIG_RAM
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/*
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* When locking data in cache you should point the CFG_INIT_RAM_ADDRESS
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* To an unused memory region. The stack will remain in cache until RAM
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* is initialized
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*/
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#undef CFG_INIT_RAM_LOCK
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#define CFG_INIT_RAM_ADDR 0x42000000 /* Internal SRAM */
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#define CFG_INIT_RAM_END 0x1000
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#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for init data */
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#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
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#define isync() __asm__ __volatile__ ("isync")
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/********/
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/* DRAM */
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/********/
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/* we don't use the global CONFIG_ECC, since in the global ecc we initialize
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the DRAM for ECC in the phase we are relocating to it, which isn't so
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sufficient.
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so we will define our ECC CONFIG and initilize the DRAM for ECC in the DRAM
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initialization phase, see sdram_init.c */
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#undef CONFIG_ECC /* enable ECC support */
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#define CONFIG_MV_ECC
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/* this defines whether we want to use the lowest CAL or the highest CAL available,*/
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/* we also check for the env parameter CASset. */
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#define MV_MIN_CAL
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#undef CFG_DISPLAY_DIMM_SPD_CONTENT /* show SPD content during boot */
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/* default values for mtest : 4 ... 12 MB in DRAM */
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#define CFG_MEMTEST_START 0x00800000
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#define CFG_MEMTEST_END 0x00C00000
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/********/
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/* RTC */
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/********/
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#if (CONFIG_COMMANDS & CFG_CMD_DATE)
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#define CFG_NVRAM_SIZE 0x00 /* dummy */
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#define CFG_NVRAM_BASE_ADDR DEVICE_CS1_BASE /* dummy */
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#define CONFIG_RTC_DS1338_DS1339
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#endif
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/********************/
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/* Serial + parser */
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/********************/
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/*
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* The following defines let you select what serial you want to use
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* for your console driver.
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*
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*/
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#define CONFIG_BAUDRATE 115200 /* console baudrate = 115000 */
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
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#if defined(RD_MV78XX0_H3C)
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#define CFG_DUART_CHAN 1 /* channel 1 to use for console */
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#else
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#define CFG_DUART_CHAN 0 /* channel 0 to use for console */
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#endif
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#define CFG_INIT_CHAN1
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#define CFG_INIT_CHAN2
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#define CONFIG_LOADS_ECHO 0 /* echo off for serial download */
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#define CFG_LOADS_BAUD_CHANGE /* allow baudrate changes */
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#define CFG_CONSOLE_INFO_QUIET /* don't print In/Out/Err console assignment. */
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/* parser */
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/* don't chang the parser if you want to load Linux(if you cahnge it to HUSH the cmdline will
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not pass to the kernel correctlly???) */
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/*#define CFG_HUSH_PARSER */
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#undef CFG_HUSH_PARSER
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#define CONFIG_AUTO_COMPLETE
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#define CFG_PROMPT_HUSH_PS2 "> "
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "Marvell>> " /* Monitor Command Prompt */
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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/************/
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/* ETHERNET */
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/************/
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/* to change the default ethernet port, use this define (options: 0, 1, 2) */
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#define CONFIG_NET_MULTI
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#define CONFIG_HAS_ETH1
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#define CONFIG_HAS_ETH2
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#define ENV_ETH_PRIME "egiga0"
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#if defined(RD_MV78XX0_H3C)
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#define YUK_ETHADDR "00:00:00:EE:51:81"
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#undef ENV_ETH_PRIME
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#define ENV_ETH_PRIME "SK98#0"
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#endif
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#define ETHADDR "64:00:00:00:00:00"
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#define ETH1ADDR "64:00:00:00:00:01"
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#define ETH2ADDR "64:00:00:00:00:02"
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#define CONFIG_IPADDR 10.4.50.165
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#define CONFIG_SERVERIP 10.4.50.5
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#define CONFIG_NETMASK 255.255.255.0
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/*-----------------------------------------------------------------------
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* IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
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*-----------------------------------------------------------------------
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*/
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#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
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#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
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#undef CONFIG_IDE_LED /* LED for ide not supported */
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#undef CONFIG_IDE_RESET /* reset for ide not supported */
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#define CFG_IDE_MAXBUS 4 /* max. 1 IDE bus */
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#define CFG_IDE_MAXDEVICE CFG_IDE_MAXBUS * 8 /* max. 1 drive per IDE bus */
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#define CFG_ATA_IDE0_OFFSET 0x0000
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#undef CONFIG_MAC_PARTITION
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#define CONFIG_DOS_PARTITION
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#define CONFIG_LBA48
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/***************************************/
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/* LINUX BOOT and other ENV PARAMETERS */
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/***************************************/
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#define CFG_BOOTARGS_END ":::DB78xx0:eth0:none"
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#define RCVR_IP_ADDR "169.254.100.100"
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#define RCVR_LOAD_ADDR "0x00800000"
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#define CONFIG_ZERO_BOOTDELAY_CHECK
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#define CFG_LOAD_ADDR 0x00400000 /* default load address */
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#undef CONFIG_BOOTARGS
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/* auto boot*/
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#define CONFIG_BOOTDELAY 3 /* by default no autoboot */
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#if (CONFIG_BOOTDELAY >= 0)
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#define CONFIG_ROOTPATH /mnt/ARM_FS/
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#define CONFIG_BOOTCOMMAND "tftpboot 0x2000000 $(image_name);\
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setenv bootargs $(bootargs) $(bootargs_root) nfsroot=$(serverip):$(rootpath) \
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ip=$(ipaddr):$(serverip)$(bootargs_end); bootm 0x2000000; "
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#define CONFIG_BOOTARGS "console=ttyS0,115200 mtdparts=physmapped-flash.0:32m(root)"
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#endif
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CFG_BOOTMAPSZ (8<<20) /* Initial Memory map for Linux */
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#define BRIDGE_REG_BASE_BOOTM 0xfbe00000 /* this paramaters are used when booting the linux kernel */
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/********/
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/* USB */
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/********/
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#if defined(RD_MV78XX0_AMC) || defined(RD_MV78XX0_H3C)
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#define ENV_USB0_MODE "device"
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#define ENV_USB1_MODE "host"
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#define ENV_USB2_MODE "device"
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#elif RD_MV78XX0_MASA
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#define ENV_USB0_MODE "host"
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#define ENV_USB1_MODE "host"
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#define ENV_USB2_MODE "host"
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#else
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#define ENV_USB0_MODE "host"
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#define ENV_USB1_MODE "host"
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#define ENV_USB2_MODE "device"
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#endif
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/********/
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/* I2C */
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/********/
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#define CFG_I2C_EEPROM_ADDR_LEN 1
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#define CFG_I2C_MULTI_EEPROMS
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#define CFG_I2C_SPEED 100000 /* I2C speed default */
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/* I2C addresses for the two DIMM SPD chips */
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#define DIMM0_I2C_ADDR 0x56
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#define DIMM1_I2C_ADDR 0x54
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/* CPU I2C settings */
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#define CPU_I2C
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#define I2C_CPU0_EEPROM_ADDR 0x51
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/********/
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/* PCI */
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/********/
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#ifdef CONFIG_PCI
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#define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
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#define CONFIG_PCI_PNP /* do pci plug-and-play */
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#define CONFIG_EEPRO100 /* Support for Intel 82557/82559/82559ER chips */
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#endif
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#if defined(RD_MV78XX0_AMC)
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/* Disable PCI-E scan over PCI-E switch */
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#define VIRTUAL_BRIDGE_SUPPORT
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#define PCI_DIS_INTERFACE 8
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#elif defined(RD_MV78XX0_H3C)
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#define PCI_DIS_INTERFACE 3
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#elif defined (RD_MV78XX0_MASA)
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#define PCI_DIS_INTERFACE 8
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#elif defined (DB_MV78XX0)
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#define PCI_DIS_INTERFACE 2
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#endif
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#define PCI_HOST_ADAPTER 0 /* configure as pci adapter */
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#define PCI_HOST_FORCE 1 /* configure as pci host */
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#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
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#define CFG_PCI_IDSEL 0x30
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/*-----------------------------------------------------------------------
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* NAND-FLASH stuff
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*-----------------------------------------------------------------------*/
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/* Use the new NAND code. */
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#undef CFG_NAND_LEGACY
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#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
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#define NAND_MAX_CHIPS CFG_MAX_NAND_DEVICE
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#define __mem_pci(x) x
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/* Boot from NAND settings */
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/* Duplicate defines from nBootstrap.h */
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#ifdef MV_NAND_BOOT
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#define CFG_NAND_BOOT
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#define CFG_ENV_IS_IN_NAND 1
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#if defined(MV_LARGE_PAGE)
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#define CFG_ENV_OFFSET (128 << 10) /* environment starts here */
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#undef CFG_ENV_SECT_SIZE
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#define CFG_ENV_SECT_SIZE (128 << 10) /* environment take 1 block */
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#undef CFG_ENV_SIZE
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#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE /* environment take 1 block */
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#define CFG_NBOOT_BASE 0
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#define CFG_NBOOT_LEN (4 << 10) /* Reserved 4KB for boot strap */
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#undef CFG_MONITOR_LEN
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#define CFG_MONITOR_LEN (640 << 10) /* Reserve 4 * 128KB + ENV = 640KB for Monitor */
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#undef CFG_MONITOR_BASE
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#define CFG_MONITOR_BASE (CFG_ENV_OFFSET)
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#undef CFG_ENV_IS_IN_FLASH
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#undef CFG_MONITOR_IMAGE_OFFSET
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#define CFG_MONITOR_IMAGE_OFFSET CFG_ENV_SECT_SIZE /* offset of the monitor from the u-boot image */
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#define CFG_MONITOR_IMAGE_DST TEXT_BASE - CFG_ENV_SECT_SIZE /* Load NUB to this addr */
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#undef CFG_ENV_ADDR
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#define CFG_ENV_ADDR CFG_MONITOR_IMAGE_DST
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#else /* ! LARGE PAGE NAND */
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#define CFG_ENV_OFFSET (16 << 10) /* environment starts here */
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#undef CFG_ENV_SECT_SIZE
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#define CFG_ENV_SECT_SIZE (128 << 10)
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#undef CFG_ENV_SIZE
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#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE /* environment take 1 block */
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#define CFG_NBOOT_BASE 0
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#define CFG_NBOOT_LEN (4 << 10) /* Reserved 16kB for boot strap */
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#undef CFG_MONITOR_LEN
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#define CFG_MONITOR_LEN (640 << 10) /* Reserve 4 * 128KB + ENV = 640KB for Monitor */
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#undef CFG_MONITOR_BASE
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#define CFG_MONITOR_BASE (CFG_ENV_OFFSET)
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#undef CFG_ENV_IS_IN_FLASH
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#undef CFG_MONITOR_IMAGE_OFFSET
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#define CFG_MONITOR_IMAGE_OFFSET CFG_ENV_SECT_SIZE /* offset of the monitor from the u-boot image */
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#define CFG_MONITOR_IMAGE_DST TEXT_BASE - CFG_ENV_SECT_SIZE /* Load NUB to this addr */
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#undef CFG_ENV_ADDR
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|
#define CFG_ENV_ADDR CFG_MONITOR_IMAGE_DST
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#endif /* defined(MV_LARGE_PAGE) */
|
|
#else /* NOT BOOT FROM NAND */
|
|
|
|
#define CFG_MONITOR_IMAGE_OFFSET CFG_ENV_SECT_SIZE /* offset of the monitor from the u-boot image */
|
|
#endif /* MV_NAND_BOOT */
|
|
|
|
/***************************/
|
|
/* CFI FLASH organization */
|
|
/***************************/
|
|
#define CFG_FLASH_CFI_DRIVER
|
|
#define CFG_FLASH_CFI 1
|
|
#define CFG_FLASH_USE_BUFFER_WRITE
|
|
#define CFG_FLASH_QUIET_TEST
|
|
#define CFG_FLASH_BANKS_LIST {BOOTDEV_CS_BASE}
|
|
#if defined(__BE)
|
|
#define CFG_WRITE_SWAPPED_DATA
|
|
#endif
|
|
|
|
/***********************/
|
|
/* FLASH organization */
|
|
/***********************/
|
|
|
|
/*
|
|
* When CFG_MAX_FLASH_BANKS_DETECT is defined, the actual number of Flash
|
|
* banks has to be determined at runtime and stored in a gloabl variable
|
|
* mv_board_num_flash_banks. The value of CFG_MAX_FLASH_BANKS_DETECT is only
|
|
* used instead of CFG_MAX_FLASH_BANKS to allocate the array flash_info, and
|
|
* should be made sufficiently large to accomodate the number of banks that
|
|
* might actually be detected. Since most (all?) Flash related functions use
|
|
* CFG_MAX_FLASH_BANKS as the number of actual banks on the board, it is
|
|
* defined as mv_board_num_flash_banks.
|
|
*/
|
|
#define CFG_MAX_FLASH_BANKS_DETECT 5
|
|
#ifndef __ASSEMBLY__
|
|
extern int mv_board_num_flash_banks;
|
|
#endif
|
|
#define CFG_MAX_FLASH_BANKS (mv_board_num_flash_banks)
|
|
|
|
#define CFG_MAX_FLASH_SECT 300 /* max number of sectors on one chip */
|
|
#define CFG_FLASH_PROTECTION 1
|
|
|
|
#ifndef MV_NAND_BOOT
|
|
#define CFG_ENV_IS_IN_FLASH 1
|
|
#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
|
|
#define CFG_ENV_SECT_SIZE 0x10000
|
|
#define CFG_ENV_OFFSET 0x0
|
|
#define CFG_ENV_ADDR (0xFFFFFFFF - CFG_MONITOR_LEN - CFG_ENV_SECT_SIZE + 1)
|
|
#endif
|
|
|
|
#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
|
|
#define CONFIG_JFFS2_CMDLINE
|
|
#endif
|
|
|
|
/*****************/
|
|
/* others */
|
|
/*****************/
|
|
#define CFG_INTERNAL_RAM_ADDR 0xf2400000 /* Internal RAM */
|
|
#define CFG_DFL_MV_REGS 0xD0000000 /* boot time MV_REGS */
|
|
#define CFG_MV_REGS 0xf1000000 /* MV Registers will be mapped here */
|
|
|
|
/***************************/
|
|
/* Relevent for ARM only */
|
|
/***************************/
|
|
#if defined(RD_MV78XX0_H3C)
|
|
#define CONFIG_SK98
|
|
#endif
|
|
#define CONFIG_STACKSIZE (1 << 20) /* regular stack - up to 4M (in case of exception)*/
|
|
#define CONFIG_NR_DRAM_BANKS 4
|
|
#undef SYSCLK_AUTO_DETECT
|
|
#define CFG_PT_BASE (CFG_MALLOC_BASE - 0x20000)
|
|
#define CFG_PT_BASE_SLAVE_CPU (CFG_PT_BASE - 0x20000)
|
|
|
|
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
|
#define CONFIG_INITRD_TAG 1 /* enable INITRD tag for ramdisk data */
|
|
#define CONFIG_SETUP_MEMORY_TAGS 1
|
|
#define CONFIG_MARVELL_TAG 1
|
|
#define ATAG_MARVELL 0x41000403
|
|
|
|
#endif /* __CONFIG_H */
|