mega88 version

This commit is contained in:
Olaf Rempel 2008-06-21 14:34:57 +02:00
parent a41be6d7ca
commit 639c0e9bb9
6 changed files with 83 additions and 61 deletions

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@ -1,6 +1,6 @@
PRG = bl_test PRG = bl_test
OBJ = blmc.o eeprom.o i2c-slave.o main.o OBJ = blmc.o eeprom.o i2c-slave.o main.o
MCU_TARGET = atmega8 MCU_TARGET = atmega88
OPTIMIZE = -Os OPTIMIZE = -Os
DEFS = DEFS =
@ -61,4 +61,4 @@ ebin: $(PRG)_eeprom.bin
install: text install: text
# uisp -dprog=avr910 -dserial=/dev/ttyS0 -dspeed=115200 -dpart=M8 --erase --upload if=$(PRG).hex # uisp -dprog=avr910 -dserial=/dev/ttyS0 -dspeed=115200 -dpart=M8 --erase --upload if=$(PRG).hex
avrdude -p m8 -c butterfly -b 115200 -P /dev/ttyUSB1 -u -e -V -U flash:w:$(PRG).hex avrdude -p m88 -c butterfly -b 115200 -u -e -V -U flash:w:$(PRG).hex

64
blmc.c
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@ -49,48 +49,66 @@ void next_phase(void)
/* Disable Analog Comperator */ /* Disable Analog Comperator */
ACSR &= ~(1<<ACIE); ACSR &= ~(1<<ACIE);
TCNT1 = 0x00; TCNT0 = 0x00;
TCNT2 = 0x00; TCNT2 = 0x00;
switch (phase) { switch (phase) {
case 0: PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_B_L; case 0: /* A: PWM, B: LOW, C: SENSE */
TCCR1A = (TCCR1A & ~(1<<COM1B1)) | (1<<COM1A1); PORTB |= PHASE_A_EN;
TCCR2 &= ~(1<<COM21); PORTD = (PORTD & ~PHASE_C_EN) | PHASE_B_EN;
TCCR0A &= ~PHASE_B_OC;
TCCR2A = (TCCR2A & ~PHASE_C_OC) | PHASE_A_OC;
ACSR = (1<<ACIS1); ACSR = (1<<ACIS1);
next_sense = SENSE_C; next_sense = SENSE_C;
break; break;
case 1: PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_B_L; case 1: /* A: SENSE, B: LOW, C: PWM */
TCCR1A &= ~((1<<COM1A1) | (1<<COM1B1)); PORTB &= ~PHASE_A_EN;
TCCR2 |= (1<<COM21); PORTD |= PHASE_B_EN | PHASE_C_EN;
TCCR0A &= ~PHASE_B_OC;
TCCR2A = (TCCR2A & ~PHASE_A_OC) | PHASE_C_OC;
ACSR = (1<<ACIS1) | (1<<ACIS0); ACSR = (1<<ACIS1) | (1<<ACIS0);
next_sense = SENSE_A; next_sense = SENSE_A;
break; break;
case 2: PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_A_L; case 2: /* A: LOW, B: SENSE, C: PWM */
TCCR1A &= ~((1<<COM1A1) | (1<<COM1B1)); PORTB |= PHASE_A_EN;
TCCR2 |= (1<<COM21); PORTD = (PORTD & ~PHASE_B_EN) | PHASE_C_EN;
TCCR0A &= ~PHASE_B_OC;
TCCR2A = (TCCR2A & ~PHASE_A_OC) | PHASE_C_OC;
ACSR = (1<<ACIS1); ACSR = (1<<ACIS1);
next_sense = SENSE_B; next_sense = SENSE_B;
break; break;
case 3: PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_A_L; case 3: /* A: LOW, B: PWM, C: SENSE */
TCCR1A = (TCCR1A & ~(1<<COM1A1)) | (1<<COM1B1); PORTB |= PHASE_A_EN;
TCCR2 &= ~(1<<COM21); PORTD = (PORTD & ~PHASE_C_EN) | PHASE_B_EN;
TCCR0A |= PHASE_B_OC;
TCCR2A &= ~(PHASE_A_OC | PHASE_C_OC);
ACSR = (1<<ACIS1) | (1<<ACIS0); ACSR = (1<<ACIS1) | (1<<ACIS0);
next_sense = SENSE_C; next_sense = SENSE_C;
break; break;
case 4: PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_C_L; case 4: /* A: SENSE, B: PWM, C: LOW */
TCCR1A = (TCCR1A & ~(1<<COM1A1)) | (1<<COM1B1); PORTB &= ~PHASE_A_EN;
TCCR2 &= ~(1<<COM21); PORTD = (PORTD & ~PHASE_B_EN) | PHASE_C_EN;
TCCR0A |= PHASE_B_OC;
TCCR2A &= ~(PHASE_A_OC | PHASE_C_OC);
ACSR = (1<<ACIS1); ACSR = (1<<ACIS1);
next_sense = SENSE_A; next_sense = SENSE_A;
break; break;
case 5: PORTD = (PORTD & ~PHASE_L_MASK) | PHASE_C_L; case 5: /* A: PWM, B: SENSE, C: LOW */
TCCR1A = (TCCR1A & ~(1<<COM1B1)) | (1<<COM1A1); PORTB |= PHASE_A_EN;
TCCR2 &= ~(1<<COM21); PORTD = (PORTD & ~PHASE_B_EN) | PHASE_C_EN;
TCCR0A &= ~PHASE_B_OC;
TCCR2A = (TCCR2A & ~PHASE_C_OC) | PHASE_A_OC;
ACSR = (1<<ACIS1) | (1<<ACIS0); ACSR = (1<<ACIS1) | (1<<ACIS0);
next_sense = SENSE_B; next_sense = SENSE_B;
break; break;
@ -208,12 +226,12 @@ void setpwm(uint8_t pwm)
if (pwm > params.pwm_max) if (pwm > params.pwm_max)
pwm = params.pwm_max; pwm = params.pwm_max;
OCR1A = pwm; OCR0B = pwm;
OCR1B = pwm; OCR2A = pwm;
OCR2 = pwm; OCR2B = pwm;
} }
ISR(ANA_COMP_vect) ISR(ANALOG_COMP_vect)
{ {
next_phase(); next_phase();
} }

17
blmc.h
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@ -3,23 +3,6 @@
#include <avr/io.h> #include <avr/io.h>
#define PHASE_A_H (1<<PORTB1)
#define PHASE_B_H (1<<PORTB2)
#define PHASE_C_H (1<<PORTB3)
#define PHASE_H_MASK (PHASE_A_H | PHASE_B_H | PHASE_C_H)
#define PHASE_A_L (1<<PORTD4)
#define PHASE_B_L (1<<PORTD3)
#define PHASE_C_L (1<<PORTD2)
#define PHASE_L_MASK (PHASE_A_L | PHASE_B_L | PHASE_C_L)
#define SENSE_A 0
#define SENSE_B 1
#define SENSE_C 2
#define SENSE_VOLTAGE 3
#define SENSE_CURRENT 6
#define FLAG_RUN_MASK 0x00F #define FLAG_RUN_MASK 0x00F
#define FLAG_PWM_SPINUP 0x001 #define FLAG_PWM_SPINUP 0x001
#define FLAG_PWM_NORMAL 0x002 #define FLAG_PWM_NORMAL 0x002

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@ -35,7 +35,7 @@ extern struct ee_param params;
#define CMD_GET_PARAM 0x24 #define CMD_GET_PARAM 0x24
#define CMD_BOOT_LOADER 0x2F #define CMD_BOOT_LOADER 0x2F
const static uint8_t info[16] = "blctrl m8-v1.2"; const static uint8_t info[16] = "blctrl m88-v1.2";
ISR(TWI_vect) ISR(TWI_vect)
{ {

38
main.c
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@ -45,13 +45,13 @@ extern struct blmc_ blmc;
static uint8_t led[2]; static uint8_t led[2];
ISR(TIMER0_OVF_vect) ISR(TIMER1_OVF_vect)
{ {
static uint8_t timer0_cnt = 0; static uint8_t rpm_cnt = 0;
static uint8_t adc_chan = SENSE_CURRENT; static uint8_t adc_chan = SENSE_CURRENT;
/* Come back in 20ms */ /* Come back in 20ms */
TCNT0 = 0xFF - 156; TCNT1 = (0xFFFF - 20000);
/* commutations during last 20ms */ /* commutations during last 20ms */
uint16_t diff = blmc.rpm_tmp - blmc.rpm_tmp_old; uint16_t diff = blmc.rpm_tmp - blmc.rpm_tmp_old;
@ -76,16 +76,17 @@ ISR(TIMER0_OVF_vect)
blmc.flags &= ~FLAG_I2C_TIMEOUT; blmc.flags &= ~FLAG_I2C_TIMEOUT;
} }
blmc.flags &= ~FLAG_I2C_ACTIVE; // TODO: currently disabled
// blmc.flags &= ~FLAG_I2C_ACTIVE;
} }
/* set pwm again (adjust current limit) */ /* set pwm again (adjust current limit) */
setpwm(blmc.pwm); setpwm(blmc.pwm);
/* calc rpm every second */ /* calc rpm every second */
timer0_cnt++; rpm_cnt++;
if (timer0_cnt == 50) { if (rpm_cnt == 50) {
timer0_cnt = 0; rpm_cnt = 0;
blmc.rpm = blmc.rpm_tmp; blmc.rpm = blmc.rpm_tmp;
blmc.rpm_tmp = 0; blmc.rpm_tmp = 0;
@ -127,27 +128,28 @@ ISR(TIMER0_OVF_vect)
int main(void) int main(void)
{ {
DDRB = PHASE_H_MASK | LED_RT | LED_GN; DDRB = PHASE_A_EN | PHASE_A_PWM | LED_RT | LED_GN;
DDRD = PHASE_L_MASK; DDRD = PHASE_B_EN | PHASE_B_PWM | PHASE_C_EN | PHASE_C_PWM;
PORTB = 0x00; PORTB = 0x00;
PORTD = 0x00; PORTD = 0x00;
/* timer0: running with F_CPU/1024 */ /* timer0: running with F_CPU, 8bit Phase Correct PWM (16kHz) */
TCCR0 = (1<<CS02) | (1<<CS00); TCCR0A = (1<<WGM00);
TCCR0B = (1<<CS00);
/* timer1: running with F_CPU, 8bit Phase Correct PWM (16kHz) */ /* timer1: running with F_CPU/8 */
TCCR1B = (1<<CS10); TCCR1B = (1<<CS11);
TCCR1A = (1<<WGM10);
/* timer2: running with F_CPU, 8bit Phase Correct PWM (16kHz) */ /* timer2: running with F_CPU, 8bit Phase Correct PWM (16kHz) */
TCCR2 = (1<<WGM20) | (1<<CS20); TCCR2A = (1<<WGM20);
TCCR2B = (1<<CS20);
/* enable Timer0 OVF Interrupt */ /* enable Timer1 OVF Interrupt */
TIMSK = (1<<TOIE0); TIMSK1 = (1<<TOIE1);
/* Enable Analog Comparator Multiplexer */ /* Enable Analog Comparator Multiplexer */
SFIOR |= (1<<ACME); ADCSRB |= (1<<ACME);
/* I2C Init: keep Address from bootloader, Auto ACKs with Interrupts */ /* I2C Init: keep Address from bootloader, Auto ACKs with Interrupts */
TWCR = (1<<TWEA) | (1<<TWEN) | (1<<TWIE); TWCR = (1<<TWEA) | (1<<TWEN) | (1<<TWIE);

19
main.h
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@ -9,4 +9,23 @@
#define LED_RT (1<<PORTB4) #define LED_RT (1<<PORTB4)
#define LED_GN (1<<PORTB5) #define LED_GN (1<<PORTB5)
#define PHASE_A_EN (1<<PORTB2)
#define PHASE_A_PWM (1<<PORTB3)
#define PHASE_A_OC (1<<COM2A1)
#define PHASE_B_EN (1<<PORTD7)
#define PHASE_B_PWM (1<<PORTD5)
#define PHASE_B_OC (1<<COM0B1)
#define PHASE_C_EN (1<<PORTD4)
#define PHASE_C_PWM (1<<PORTD3)
#define PHASE_C_OC (1<<COM2B1)
#define SENSE_A 0
#define SENSE_B 2
#define SENSE_C 1
#define SENSE_VOLTAGE 7
#define SENSE_CURRENT 3
#endif #endif