574 lines
17 KiB
C
574 lines
17 KiB
C
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/*******************************************************************************
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Copyright (C) Marvell International Ltd. and its affiliates
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This software file (the "File") is owned and distributed by Marvell
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International Ltd. and/or its affiliates ("Marvell") under the following
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alternative licensing terms. Once you have made an election to distribute the
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File under one of the following license alternatives, please (i) delete this
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introductory statement regarding license alternatives, (ii) delete the two
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license alternatives that you have not elected to use and (iii) preserve the
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Marvell copyright notice above.
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********************************************************************************
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Marvell Commercial License Option
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If you received this File from Marvell and you have entered into a commercial
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license agreement (a "Commercial License") with Marvell, the File is licensed
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to you under the terms of the applicable Commercial License.
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********************************************************************************
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Marvell GPL License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File in accordance with the terms and conditions of the General
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Public License Version 2, June 1991 (the "GPL License"), a copy of which is
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available along with the File in the license.txt file or by writing to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or
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on the worldwide web at http://www.gnu.org/licenses/gpl.txt.
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THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
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WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
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DISCLAIMED. The GPL License provides additional details about this warranty
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disclaimer.
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********************************************************************************
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Marvell BSD License Option
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If you received this File from Marvell, you may opt to use, redistribute and/or
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modify this File under the following licensing terms.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of Marvell nor the names of its contributors may be
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used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************/
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#include "spi/mvSpi.h"
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#include "spi/mvSpiSpec.h"
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#include "ctrlEnv/mvCtrlEnvLib.h"
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/* #define MV_DEBUG */
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#ifdef MV_DEBUG
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#define DB(x) x
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#define mvOsPrintf printf
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#else
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#define DB(x)
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#endif
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/*******************************************************************************
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* mvSpi16bitDataTxRx - Transmt and receive data
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*
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* DESCRIPTION:
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* Tx data and block waiting for data to be transmitted
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*
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********************************************************************************/
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static MV_STATUS mvSpi16bitDataTxRx (MV_U16 txData, MV_U16 * pRxData)
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{
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MV_U32 i;
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MV_BOOL ready = MV_FALSE;
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/* First clear the bit in the interrupt cause register */
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MV_REG_WRITE(MV_SPI_INT_CAUSE_REG, 0x0);
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/* Transmit data */
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MV_REG_WRITE(MV_SPI_DATA_OUT_REG, MV_16BIT_LE(txData));
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/* wait with timeout for memory ready */
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for (i=0; i<MV_SPI_WAIT_RDY_MAX_LOOP; i++)
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{
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if (MV_REG_READ(MV_SPI_INT_CAUSE_REG))
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{
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ready = MV_TRUE;
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break;
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}
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#ifdef MV_SPI_SLEEP_ON_WAIT
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mvOsSleep(1);
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#endif /* MV_SPI_SLEEP_ON_WAIT */
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}
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if (!ready)
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return MV_TIMEOUT;
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/* check that the RX data is needed */
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if (pRxData)
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{
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if ((MV_U32)pRxData & 0x1) /* check if address is not alligned to 16bit */
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{
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#if defined(MV_CPU_LE)
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/* perform the data write to the buffer in two stages with 8bit each */
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MV_U8 * bptr = (MV_U8*)pRxData;
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MV_U16 data = MV_16BIT_LE(MV_REG_READ(MV_SPI_DATA_IN_REG));
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*bptr = (data & 0xFF);
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++bptr;
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*bptr = ((data >> 8) & 0xFF);
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#elif defined(MV_CPU_BE)
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/* perform the data write to the buffer in two stages with 8bit each */
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MV_U8 * bptr = (MV_U8 *)pRxData;
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MV_U16 data = MV_16BIT_LE(MV_REG_READ(MV_SPI_DATA_IN_REG));
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*bptr = ((data >> 8) & 0xFF);
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++bptr;
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*bptr = (data & 0xFF);
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#else
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#error "CPU endianess isn't defined!\n"
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#endif
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}
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else
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*pRxData = MV_16BIT_LE(MV_REG_READ(MV_SPI_DATA_IN_REG));
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}
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return MV_OK;
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}
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/*******************************************************************************
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* mvSpi8bitDataTxRx - Transmt and receive data (8bits)
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*
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* DESCRIPTION:
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* Tx data and block waiting for data to be transmitted
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*
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********************************************************************************/
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static MV_STATUS mvSpi8bitDataTxRx (MV_U8 txData, MV_U8 * pRxData)
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{
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MV_U32 i;
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MV_BOOL ready = MV_FALSE;
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/* First clear the bit in the interrupt cause register */
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MV_REG_WRITE(MV_SPI_INT_CAUSE_REG, 0x0);
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/* Transmit data */
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MV_REG_WRITE(MV_SPI_DATA_OUT_REG, txData);
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/* wait with timeout for memory ready */
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for (i=0; i<MV_SPI_WAIT_RDY_MAX_LOOP; i++)
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{
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if (MV_REG_READ(MV_SPI_INT_CAUSE_REG))
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{
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ready = MV_TRUE;
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break;
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}
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#ifdef MV_SPI_SLEEP_ON_WAIT
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mvOsSleep(1);
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#endif /* MV_SPI_SLEEP_ON_WAIT */
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}
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if (!ready)
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return MV_TIMEOUT;
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/* check that the RX data is needed */
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if (pRxData)
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*pRxData = MV_REG_READ(MV_SPI_DATA_IN_REG);
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return MV_OK;
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}
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/*
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#####################################################################################
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#####################################################################################
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*/
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/*******************************************************************************
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* mvSpiInit - Initialize the SPI controller
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*
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* DESCRIPTION:
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* Perform the neccessary initialization in order to be able to send an
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* receive over the SPI interface.
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*
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* INPUT:
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* serialBaudRate: Baud rate (SPI clock frequency)
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* use16BitMode: Whether to use 2bytes (MV_TRUE) or 1bytes (MV_FALSE)
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*
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* OUTPUT:
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* None.
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*
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* RETURN:
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* Success or Error code.
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*
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*
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*******************************************************************************/
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MV_STATUS mvSpiInit (MV_U32 serialBaudRate)
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{
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MV_STATUS ret;
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/* Set the serial clock */
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if ((ret = mvSpiBaudRateSet(serialBaudRate)) != MV_OK)
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return ret;
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/* For devices in which the SPI is muxed on the MPP with other interfaces*/
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mvMPPConfigToSPI();
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/* Configure the default SPI mode to be 16bit */
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MV_REG_BIT_SET(MV_SPI_IF_CONFIG_REG, MV_SPI_BYTE_LENGTH_MASK);
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/* Fix ac timing on SPI in 6183 and 6183L only */
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if ((mvCtrlModelGet() == MV_6183_DEV_ID) ||
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(mvCtrlModelGet() == MV_6183L_DEV_ID))
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MV_REG_BIT_SET(MV_SPI_IF_CONFIG_REG, BIT14);
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/* Verify that the CS is deasserted */
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mvSpiCsDeassert();
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return MV_OK;
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}
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/*******************************************************************************
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* mvSpiBaudRateSet - Set the Frequency of the SPI clock
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*
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* DESCRIPTION:
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* Set the Prescale bits to adapt to the requested baud rate (the clock
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* used for thr SPI).
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*
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* INPUT:
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* serialBaudRate: Baud rate (SPI clock frequency)
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*
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* OUTPUT:
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* None.
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*
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* RETURN:
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* Success or Error code.
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*
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*
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*******************************************************************************/
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MV_STATUS mvSpiBaudRateSet (MV_U32 serialBaudRate)
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{
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MV_U8 i;
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/* MV_U8 preScale[32] = {1, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
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2, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30};
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*/
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MV_U8 preScale[14] = { 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30};
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MV_U8 bestPrescaleIndx = 100;
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MV_U32 minBaudOffset = 0xFFFFFFFF;
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MV_U32 cpuClk = mvBoardTclkGet(); /*mvCpuPclkGet();*/
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MV_U32 tempReg;
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/* Find the best prescale configuration - less or equal */
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for (i=0; i<14; i++)
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{
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/* check for higher - irrelevent */
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if ((cpuClk / preScale[i]) > serialBaudRate)
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continue;
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/* check for exact fit */
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if ((cpuClk / preScale[i]) == serialBaudRate)
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{
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bestPrescaleIndx = i;
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break;
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}
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/* check if this is better than the previous one */
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if ((serialBaudRate - (cpuClk / preScale[i])) < minBaudOffset)
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{
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minBaudOffset = (serialBaudRate - (cpuClk / preScale[i]));
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bestPrescaleIndx = i;
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}
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}
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if (bestPrescaleIndx > 14)
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{
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mvOsPrintf("%s ERROR: SPI baud rate prescale error!\n", __FUNCTION__);
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return MV_OUT_OF_RANGE;
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}
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/* configure the Prescale */
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tempReg = MV_REG_READ(MV_SPI_IF_CONFIG_REG);
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tempReg = ((tempReg & ~MV_SPI_CLK_PRESCALE_MASK) | (bestPrescaleIndx + 0x12));
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MV_REG_WRITE(MV_SPI_IF_CONFIG_REG, tempReg);
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return MV_OK;
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}
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/*******************************************************************************
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* mvSpiCsAssert - Assert the Chip Select pin indicating a new transfer
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*
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* DESCRIPTION:
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* Assert The chip select - used to select an external SPI device
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*
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* INPUT:
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* None.
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*
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* OUTPUT:
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* None.
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*
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* RETURN:
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* Success or Error code.
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*
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********************************************************************************/
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MV_VOID mvSpiCsAssert(MV_VOID)
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{
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/* For devices in which the SPI is muxed on the MPP with other interfaces*/
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mvMPPConfigToSPI();
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MV_REG_BIT_SET(MV_SPI_IF_CTRL_REG, MV_SPI_CS_ENABLE_MASK);
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}
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/*******************************************************************************
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* mvSpiCsDeassert - DeAssert the Chip Select pin indicating the end of a
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* SPI transfer sequence
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*
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* DESCRIPTION:
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* DeAssert the chip select pin
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*
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* INPUT:
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* None.
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*
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* OUTPUT:
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* None.
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*
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* RETURN:
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* Success or Error code.
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*
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********************************************************************************/
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MV_VOID mvSpiCsDeassert(MV_VOID)
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{
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MV_REG_BIT_RESET(MV_SPI_IF_CTRL_REG, MV_SPI_CS_ENABLE_MASK);
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/* For devices in which the SPI is muxed on the MPP with other interfaces*/
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mvMPPConfigToDefault();
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}
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/*******************************************************************************
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* mvSpiRead - Read a buffer over the SPI interface
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*
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* DESCRIPTION:
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* Receive (read) a buffer over the SPI interface in 16bit chunks. If the
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* buffer size is odd, then the last chunk will be 8bits. Chip select is not
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* handled at this level.
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*
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* INPUT:
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* pRxBuff: Pointer to the buffer to hold the received data
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* buffSize: length of the pRxBuff
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*
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* OUTPUT:
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* pRxBuff: Pointer to the buffer with the received data
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*
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* RETURN:
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* Success or Error code.
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*
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*
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*******************************************************************************/
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MV_STATUS mvSpiRead (MV_U8* pRxBuff, MV_U32 buffSize)
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{
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MV_STATUS ret;
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MV_U32 bytesLeft = buffSize;
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MV_U16* rxPtr = (MV_U16*)pRxBuff;
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/* check for null parameters */
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if (pRxBuff == NULL)
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|
|
{
|
||
|
|
mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__);
|
||
|
|
return MV_BAD_PARAM;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Check that the buffer pointer and the buffer size are 16bit aligned */
|
||
|
|
if ((((MV_U32)buffSize & 1) == 0) && (((MV_U32)pRxBuff & 1) == 0))
|
||
|
|
{
|
||
|
|
/* Verify that the SPI mode is in 16bit mode */
|
||
|
|
MV_REG_BIT_SET(MV_SPI_IF_CONFIG_REG, MV_SPI_BYTE_LENGTH_MASK);
|
||
|
|
|
||
|
|
/* TX/RX as long we have complete 16bit chunks */
|
||
|
|
while (bytesLeft >= MV_SPI_16_BIT_CHUNK_SIZE)
|
||
|
|
{
|
||
|
|
/* Transmitted and wait for the transfer to be completed */
|
||
|
|
if ((ret = mvSpi16bitDataTxRx(MV_SPI_DUMMY_WRITE_16BITS, rxPtr)) != MV_OK)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
/* increment the pointers */
|
||
|
|
rxPtr++;
|
||
|
|
bytesLeft -= MV_SPI_16_BIT_CHUNK_SIZE;
|
||
|
|
}
|
||
|
|
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
/* Verify that the SPI mode is in 8bit mode */
|
||
|
|
MV_REG_BIT_RESET(MV_SPI_IF_CONFIG_REG, MV_SPI_BYTE_LENGTH_MASK);
|
||
|
|
|
||
|
|
/* TX/RX in 8bit chanks */
|
||
|
|
while (bytesLeft > 0)
|
||
|
|
{
|
||
|
|
/* Transmitted and wait for the transfer to be completed */
|
||
|
|
if ((ret = mvSpi8bitDataTxRx(MV_SPI_DUMMY_WRITE_8BITS, pRxBuff)) != MV_OK)
|
||
|
|
return ret;
|
||
|
|
/* increment the pointers */
|
||
|
|
pRxBuff++;
|
||
|
|
bytesLeft--;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
return MV_OK;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*******************************************************************************
|
||
|
|
* mvSpiWrite - Transmit a buffer over the SPI interface
|
||
|
|
*
|
||
|
|
* DESCRIPTION:
|
||
|
|
* Transmit a buffer over the SPI interface in 16bit chunks. If the
|
||
|
|
* buffer size is odd, then the last chunk will be 8bits. No chip select
|
||
|
|
* action is taken.
|
||
|
|
*
|
||
|
|
* INPUT:
|
||
|
|
* pTxBuff: Pointer to the buffer holding the TX data
|
||
|
|
* buffSize: length of the pTxBuff
|
||
|
|
*
|
||
|
|
* OUTPUT:
|
||
|
|
* None.
|
||
|
|
*
|
||
|
|
* RETURN:
|
||
|
|
* Success or Error code.
|
||
|
|
*
|
||
|
|
*
|
||
|
|
*******************************************************************************/
|
||
|
|
MV_STATUS mvSpiWrite(MV_U8* pTxBuff, MV_U32 buffSize)
|
||
|
|
{
|
||
|
|
MV_STATUS ret;
|
||
|
|
MV_U32 bytesLeft = buffSize;
|
||
|
|
MV_U16* txPtr = (MV_U16*)pTxBuff;
|
||
|
|
|
||
|
|
/* check for null parameters */
|
||
|
|
if (pTxBuff == NULL)
|
||
|
|
{
|
||
|
|
mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__);
|
||
|
|
return MV_BAD_PARAM;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Check that the buffer pointer and the buffer size are 16bit aligned */
|
||
|
|
if ((((MV_U32)buffSize & 1) == 0) && (((MV_U32)pTxBuff & 1) == 0))
|
||
|
|
{
|
||
|
|
/* Verify that the SPI mode is in 16bit mode */
|
||
|
|
MV_REG_BIT_SET(MV_SPI_IF_CONFIG_REG, MV_SPI_BYTE_LENGTH_MASK);
|
||
|
|
|
||
|
|
/* TX/RX as long we have complete 16bit chunks */
|
||
|
|
while (bytesLeft >= MV_SPI_16_BIT_CHUNK_SIZE)
|
||
|
|
{
|
||
|
|
/* Transmitted and wait for the transfer to be completed */
|
||
|
|
if ((ret = mvSpi16bitDataTxRx(*txPtr, NULL)) != MV_OK)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
/* increment the pointers */
|
||
|
|
txPtr++;
|
||
|
|
bytesLeft -= MV_SPI_16_BIT_CHUNK_SIZE;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
|
||
|
|
/* Verify that the SPI mode is in 8bit mode */
|
||
|
|
MV_REG_BIT_RESET(MV_SPI_IF_CONFIG_REG, MV_SPI_BYTE_LENGTH_MASK);
|
||
|
|
|
||
|
|
/* TX/RX in 8bit chanks */
|
||
|
|
while (bytesLeft > 0)
|
||
|
|
{
|
||
|
|
/* Transmitted and wait for the transfer to be completed */
|
||
|
|
if ((ret = mvSpi8bitDataTxRx(*pTxBuff, NULL)) != MV_OK)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
/* increment the pointers */
|
||
|
|
pTxBuff++;
|
||
|
|
bytesLeft--;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
return MV_OK;
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/*******************************************************************************
|
||
|
|
* mvSpiReadWrite - Read and Write a buffer simultanuosely
|
||
|
|
*
|
||
|
|
* DESCRIPTION:
|
||
|
|
* Transmit and receive a buffer over the SPI in 16bit chunks. If the
|
||
|
|
* buffer size is odd, then the last chunk will be 8bits. The SPI chip
|
||
|
|
* select is not handled implicitely.
|
||
|
|
*
|
||
|
|
* INPUT:
|
||
|
|
* pRxBuff: Pointer to the buffer to write the RX info in
|
||
|
|
* pTxBuff: Pointer to the buffer holding the TX info
|
||
|
|
* buffSize: length of both the pTxBuff and pRxBuff
|
||
|
|
*
|
||
|
|
* OUTPUT:
|
||
|
|
* pRxBuff: Pointer of the buffer holding the RX data
|
||
|
|
*
|
||
|
|
* RETURN:
|
||
|
|
* Success or Error code.
|
||
|
|
*
|
||
|
|
*
|
||
|
|
*******************************************************************************/
|
||
|
|
MV_STATUS mvSpiReadWrite(MV_U8* pRxBuff, MV_U8* pTxBuff, MV_U32 buffSize)
|
||
|
|
{
|
||
|
|
MV_STATUS ret;
|
||
|
|
MV_U32 bytesLeft = buffSize;
|
||
|
|
MV_U16* txPtr = (MV_U16*)pTxBuff;
|
||
|
|
MV_U16* rxPtr = (MV_U16*)pRxBuff;
|
||
|
|
|
||
|
|
/* check for null parameters */
|
||
|
|
if ((pRxBuff == NULL) || (pTxBuff == NULL))
|
||
|
|
{
|
||
|
|
mvOsPrintf("%s ERROR: Null pointer parameter!\n", __FUNCTION__);
|
||
|
|
return MV_BAD_PARAM;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Check that the buffer pointer and the buffer size are 16bit aligned */
|
||
|
|
if ((((MV_U32)buffSize & 1) == 0) && (((MV_U32)pTxBuff & 1) == 0) && (((MV_U32)pRxBuff & 1) == 0))
|
||
|
|
{
|
||
|
|
/* Verify that the SPI mode is in 16bit mode */
|
||
|
|
MV_REG_BIT_SET(MV_SPI_IF_CONFIG_REG, MV_SPI_BYTE_LENGTH_MASK);
|
||
|
|
|
||
|
|
/* TX/RX as long we have complete 16bit chunks */
|
||
|
|
while (bytesLeft >= MV_SPI_16_BIT_CHUNK_SIZE)
|
||
|
|
{
|
||
|
|
/* Transmitted and wait for the transfer to be completed */
|
||
|
|
if ((ret = mvSpi16bitDataTxRx(*txPtr, rxPtr)) != MV_OK)
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
/* increment the pointers */
|
||
|
|
txPtr++;
|
||
|
|
rxPtr++;
|
||
|
|
bytesLeft -= MV_SPI_16_BIT_CHUNK_SIZE;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
/* Verify that the SPI mode is in 8bit mode */
|
||
|
|
MV_REG_BIT_RESET(MV_SPI_IF_CONFIG_REG, MV_SPI_BYTE_LENGTH_MASK);
|
||
|
|
|
||
|
|
/* TX/RX in 8bit chanks */
|
||
|
|
while (bytesLeft > 0)
|
||
|
|
{
|
||
|
|
/* Transmitted and wait for the transfer to be completed */
|
||
|
|
if ( (ret = mvSpi8bitDataTxRx(*pTxBuff, pRxBuff) ) != MV_OK)
|
||
|
|
return ret;
|
||
|
|
pRxBuff++;
|
||
|
|
pTxBuff++;
|
||
|
|
bytesLeft--;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
return MV_OK;
|
||
|
|
}
|
||
|
|
|
||
|
|
|